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// SPDX-License-Identifier: MIT
/*
* Copyright © 2020 , 2021 Intel Corporation
*/
# include "i915_drv.h"
# include "intel_step.h"
/*
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* Some platforms have unusual ways of mapping PCI revision ID to GT / display
* steppings . E . g . , in some cases a higher PCI revision may translate to a
* lower stepping of the GT and / or display IP . This file provides lookup
* tables to map the PCI revision into a standard set of stepping values that
* can be compared numerically .
*
* Also note that some revisions / steppings may have been set aside as
* placeholders but never materialized in real hardware ; in those cases there
* may be jumps in the revision IDs or stepping values in the tables below .
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*/
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/*
* Some platforms always have the same stepping value for GT and display ;
* use a macro to define these to make it easier to identify the platforms
* where the two steppings can deviate .
*/
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# define COMMON_STEP(x) .graphics_step = STEP_##x, .display_step = STEP_##x, .media_step = STEP_##x
# define COMMON_GT_MEDIA_STEP(x) .graphics_step = STEP_##x, .media_step = STEP_##x
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static const struct intel_step_info skl_revids [ ] = {
[ 0x6 ] = { COMMON_STEP ( G0 ) } ,
[ 0x7 ] = { COMMON_STEP ( H0 ) } ,
[ 0x9 ] = { COMMON_STEP ( J0 ) } ,
[ 0xA ] = { COMMON_STEP ( I1 ) } ,
} ;
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static const struct intel_step_info kbl_revids [ ] = {
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[ 1 ] = { COMMON_GT_MEDIA_STEP ( B0 ) , . display_step = STEP_B0 } ,
[ 2 ] = { COMMON_GT_MEDIA_STEP ( C0 ) , . display_step = STEP_B0 } ,
[ 3 ] = { COMMON_GT_MEDIA_STEP ( D0 ) , . display_step = STEP_B0 } ,
[ 4 ] = { COMMON_GT_MEDIA_STEP ( F0 ) , . display_step = STEP_C0 } ,
[ 5 ] = { COMMON_GT_MEDIA_STEP ( C0 ) , . display_step = STEP_B1 } ,
[ 6 ] = { COMMON_GT_MEDIA_STEP ( D1 ) , . display_step = STEP_B1 } ,
[ 7 ] = { COMMON_GT_MEDIA_STEP ( G0 ) , . display_step = STEP_C0 } ,
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} ;
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static const struct intel_step_info bxt_revids [ ] = {
[ 0xA ] = { COMMON_STEP ( C0 ) } ,
[ 0xB ] = { COMMON_STEP ( C0 ) } ,
[ 0xC ] = { COMMON_STEP ( D0 ) } ,
[ 0xD ] = { COMMON_STEP ( E0 ) } ,
} ;
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static const struct intel_step_info glk_revids [ ] = {
[ 3 ] = { COMMON_STEP ( B0 ) } ,
} ;
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static const struct intel_step_info icl_revids [ ] = {
[ 7 ] = { COMMON_STEP ( D0 ) } ,
} ;
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static const struct intel_step_info jsl_ehl_revids [ ] = {
[ 0 ] = { COMMON_STEP ( A0 ) } ,
[ 1 ] = { COMMON_STEP ( B0 ) } ,
} ;
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static const struct intel_step_info tgl_uy_revids [ ] = {
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[ 0 ] = { COMMON_GT_MEDIA_STEP ( A0 ) , . display_step = STEP_A0 } ,
[ 1 ] = { COMMON_GT_MEDIA_STEP ( B0 ) , . display_step = STEP_C0 } ,
[ 2 ] = { COMMON_GT_MEDIA_STEP ( B1 ) , . display_step = STEP_C0 } ,
[ 3 ] = { COMMON_GT_MEDIA_STEP ( C0 ) , . display_step = STEP_D0 } ,
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} ;
/* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */
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static const struct intel_step_info tgl_revids [ ] = {
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[ 0 ] = { COMMON_GT_MEDIA_STEP ( A0 ) , . display_step = STEP_B0 } ,
[ 1 ] = { COMMON_GT_MEDIA_STEP ( B0 ) , . display_step = STEP_D0 } ,
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} ;
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static const struct intel_step_info rkl_revids [ ] = {
[ 0 ] = { COMMON_STEP ( A0 ) } ,
[ 1 ] = { COMMON_STEP ( B0 ) } ,
[ 4 ] = { COMMON_STEP ( C0 ) } ,
} ;
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static const struct intel_step_info dg1_revids [ ] = {
[ 0 ] = { COMMON_STEP ( A0 ) } ,
[ 1 ] = { COMMON_STEP ( B0 ) } ,
} ;
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static const struct intel_step_info adls_revids [ ] = {
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[ 0x0 ] = { COMMON_GT_MEDIA_STEP ( A0 ) , . display_step = STEP_A0 } ,
[ 0x1 ] = { COMMON_GT_MEDIA_STEP ( A0 ) , . display_step = STEP_A2 } ,
[ 0x4 ] = { COMMON_GT_MEDIA_STEP ( B0 ) , . display_step = STEP_B0 } ,
[ 0x8 ] = { COMMON_GT_MEDIA_STEP ( C0 ) , . display_step = STEP_B0 } ,
[ 0xC ] = { COMMON_GT_MEDIA_STEP ( D0 ) , . display_step = STEP_C0 } ,
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} ;
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static const struct intel_step_info adlp_revids [ ] = {
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[ 0x0 ] = { COMMON_GT_MEDIA_STEP ( A0 ) , . display_step = STEP_A0 } ,
[ 0x4 ] = { COMMON_GT_MEDIA_STEP ( B0 ) , . display_step = STEP_B0 } ,
[ 0x8 ] = { COMMON_GT_MEDIA_STEP ( C0 ) , . display_step = STEP_C0 } ,
[ 0xC ] = { COMMON_GT_MEDIA_STEP ( C0 ) , . display_step = STEP_D0 } ,
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} ;
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static const struct intel_step_info xehpsdv_revids [ ] = {
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[ 0x0 ] = { COMMON_GT_MEDIA_STEP ( A0 ) } ,
[ 0x1 ] = { COMMON_GT_MEDIA_STEP ( A1 ) } ,
[ 0x4 ] = { COMMON_GT_MEDIA_STEP ( B0 ) } ,
[ 0x8 ] = { COMMON_GT_MEDIA_STEP ( C0 ) } ,
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} ;
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static const struct intel_step_info dg2_g10_revid_step_tbl [ ] = {
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[ 0x0 ] = { COMMON_GT_MEDIA_STEP ( A0 ) , . display_step = STEP_A0 } ,
[ 0x1 ] = { COMMON_GT_MEDIA_STEP ( A1 ) , . display_step = STEP_A0 } ,
[ 0x4 ] = { COMMON_GT_MEDIA_STEP ( B0 ) , . display_step = STEP_B0 } ,
[ 0x8 ] = { COMMON_GT_MEDIA_STEP ( C0 ) , . display_step = STEP_C0 } ,
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} ;
static const struct intel_step_info dg2_g11_revid_step_tbl [ ] = {
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[ 0x0 ] = { COMMON_GT_MEDIA_STEP ( A0 ) , . display_step = STEP_B0 } ,
[ 0x4 ] = { COMMON_GT_MEDIA_STEP ( B0 ) , . display_step = STEP_C0 } ,
[ 0x5 ] = { COMMON_GT_MEDIA_STEP ( B1 ) , . display_step = STEP_C0 } ,
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} ;
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static const struct intel_step_info dg2_g12_revid_step_tbl [ ] = {
[ 0x0 ] = { COMMON_GT_MEDIA_STEP ( A0 ) , . display_step = STEP_C0 } ,
} ;
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static const struct intel_step_info adls_rpls_revids [ ] = {
[ 0x4 ] = { COMMON_GT_MEDIA_STEP ( D0 ) , . display_step = STEP_D0 } ,
[ 0xC ] = { COMMON_GT_MEDIA_STEP ( D0 ) , . display_step = STEP_C0 } ,
} ;
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static const struct intel_step_info adlp_n_revids [ ] = {
[ 0x0 ] = { COMMON_GT_MEDIA_STEP ( A0 ) , . display_step = STEP_D0 } ,
} ;
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void intel_step_init ( struct drm_i915_private * i915 )
{
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const struct intel_step_info * revids = NULL ;
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int size = 0 ;
int revid = INTEL_REVID ( i915 ) ;
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struct intel_step_info step = { } ;
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if ( IS_DG2_G10 ( i915 ) ) {
revids = dg2_g10_revid_step_tbl ;
size = ARRAY_SIZE ( dg2_g10_revid_step_tbl ) ;
} else if ( IS_DG2_G11 ( i915 ) ) {
revids = dg2_g11_revid_step_tbl ;
size = ARRAY_SIZE ( dg2_g11_revid_step_tbl ) ;
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} else if ( IS_DG2_G12 ( i915 ) ) {
revids = dg2_g12_revid_step_tbl ;
size = ARRAY_SIZE ( dg2_g12_revid_step_tbl ) ;
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} else if ( IS_XEHPSDV ( i915 ) ) {
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revids = xehpsdv_revids ;
size = ARRAY_SIZE ( xehpsdv_revids ) ;
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} else if ( IS_ADLP_N ( i915 ) ) {
revids = adlp_n_revids ;
size = ARRAY_SIZE ( adlp_n_revids ) ;
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} else if ( IS_ALDERLAKE_P ( i915 ) ) {
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revids = adlp_revids ;
size = ARRAY_SIZE ( adlp_revids ) ;
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} else if ( IS_ADLS_RPLS ( i915 ) ) {
revids = adls_rpls_revids ;
size = ARRAY_SIZE ( adls_rpls_revids ) ;
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} else if ( IS_ALDERLAKE_S ( i915 ) ) {
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revids = adls_revids ;
size = ARRAY_SIZE ( adls_revids ) ;
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} else if ( IS_DG1 ( i915 ) ) {
revids = dg1_revids ;
size = ARRAY_SIZE ( dg1_revids ) ;
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} else if ( IS_ROCKETLAKE ( i915 ) ) {
revids = rkl_revids ;
size = ARRAY_SIZE ( rkl_revids ) ;
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} else if ( IS_TGL_U ( i915 ) | | IS_TGL_Y ( i915 ) ) {
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revids = tgl_uy_revids ;
size = ARRAY_SIZE ( tgl_uy_revids ) ;
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} else if ( IS_TIGERLAKE ( i915 ) ) {
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revids = tgl_revids ;
size = ARRAY_SIZE ( tgl_revids ) ;
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} else if ( IS_JSL_EHL ( i915 ) ) {
revids = jsl_ehl_revids ;
size = ARRAY_SIZE ( jsl_ehl_revids ) ;
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} else if ( IS_ICELAKE ( i915 ) ) {
revids = icl_revids ;
size = ARRAY_SIZE ( icl_revids ) ;
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} else if ( IS_GEMINILAKE ( i915 ) ) {
revids = glk_revids ;
size = ARRAY_SIZE ( glk_revids ) ;
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} else if ( IS_BROXTON ( i915 ) ) {
revids = bxt_revids ;
size = ARRAY_SIZE ( bxt_revids ) ;
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} else if ( IS_KABYLAKE ( i915 ) ) {
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revids = kbl_revids ;
size = ARRAY_SIZE ( kbl_revids ) ;
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} else if ( IS_SKYLAKE ( i915 ) ) {
revids = skl_revids ;
size = ARRAY_SIZE ( skl_revids ) ;
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}
/* Not using the stepping scheme for the platform yet. */
if ( ! revids )
return ;
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if ( revid < size & & revids [ revid ] . graphics_step ! = STEP_NONE ) {
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step = revids [ revid ] ;
} else {
drm_warn ( & i915 - > drm , " Unknown revid 0x%02x \n " , revid ) ;
/*
* If we hit a gap in the revid array , use the information for
* the next revid .
*
* This may be wrong in all sorts of ways , especially if the
* steppings in the array are not monotonically increasing , but
* it ' s better than defaulting to 0.
*/
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while ( revid < size & & revids [ revid ] . graphics_step = = STEP_NONE )
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revid + + ;
if ( revid < size ) {
drm_dbg ( & i915 - > drm , " Using steppings for revid 0x%02x \n " ,
revid ) ;
step = revids [ revid ] ;
} else {
drm_dbg ( & i915 - > drm , " Using future steppings \n " ) ;
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step . graphics_step = STEP_FUTURE ;
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step . display_step = STEP_FUTURE ;
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}
}
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if ( drm_WARN_ON ( & i915 - > drm , step . graphics_step = = STEP_NONE ) )
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return ;
RUNTIME_INFO ( i915 ) - > step = step ;
}
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# define STEP_NAME_CASE(name) \
case STEP_ # # name : \
return # name ;
const char * intel_step_name ( enum intel_step step )
{
switch ( step ) {
STEP_NAME_LIST ( STEP_NAME_CASE ) ;
default :
return " ** " ;
}
}