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drm/i915/skl: Use revid->stepping tables

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Switch SKL to use a revid->stepping table as we're trying to do on all
platforms going forward.  Also drop the preproduction revisions and add
the newer steppings we hadn't already handled.

Note that SKL has a case where a newer revision ID corresponds to an
older GT/disp stepping (0x9 -> STEP_J0, 0xA -> STEP_I1).  Also, the lack
of a revision ID 0x8 in the table is intentional and not an oversight.
We'll re-write the KBL-specific comment to make it clear that these kind
of quirks are expected.

v2:
 - Since GT and display steppings are always identical on SKL use a
   macro to set both values at once in a more readable manner.  (Anusha)
 - Drop preproduction steppings.

Bspec: 13626
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210713193635.3390052-4-matthew.d.roper@intel.com
This commit is contained in:
Matt Roper 2021-07-13 12:36:26 -07:00
parent c314b69395
commit 0f93f5da1c
4 changed files with 31 additions and 16 deletions
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2
drivers/gpu/drm/i915/gt/intel_workarounds.c
View File

@ -882,7 +882,7 @@ skl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE);
/* WaInPlaceDecompressionHang:skl */
if (IS_SKL_REVID(i915, SKL_REVID_H0, REVID_FOREVER))
if (IS_SKL_GT_STEP(i915, STEP_H0, STEP_FOREVER))
wa_write_or(wal,
GEN9_GAMT_ECO_REG_RW_IA,
GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);

11
drivers/gpu/drm/i915/i915_drv.h
View File

@ -1456,16 +1456,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define IS_TGL_Y(dev_priv) \
IS_SUBPLATFORM(dev_priv, INTEL_TIGERLAKE, INTEL_SUBPLATFORM_ULX)
#define SKL_REVID_A0 0x0
#define SKL_REVID_B0 0x1
#define SKL_REVID_C0 0x2
#define SKL_REVID_D0 0x3
#define SKL_REVID_E0 0x4
#define SKL_REVID_F0 0x5
#define SKL_REVID_G0 0x6
#define SKL_REVID_H0 0x7
#define IS_SKL_REVID(p, since, until) (IS_SKYLAKE(p) && IS_REVID(p, since, until))
#define IS_SKL_GT_STEP(p, since, until) (IS_SKYLAKE(p) && IS_GT_STEP(p, since, until))
#define BXT_REVID_A0 0x0
#define BXT_REVID_A1 0x1

30
drivers/gpu/drm/i915/intel_step.c
View File

@ -7,14 +7,31 @@
#include "intel_step.h"
/*
* KBL revision ID ordering is bizarre; higher revision ID's map to lower
* steppings in some cases. So rather than test against the revision ID
* directly, let's map that into our own range of increasing ID's that we
* can test against in a regular manner.
* Some platforms have unusual ways of mapping PCI revision ID to GT/display
* steppings. E.g., in some cases a higher PCI revision may translate to a
* lower stepping of the GT and/or display IP. This file provides lookup
* tables to map the PCI revision into a standard set of stepping values that
* can be compared numerically.
*
* Also note that some revisions/steppings may have been set aside as
* placeholders but never materialized in real hardware; in those cases there
* may be jumps in the revision IDs or stepping values in the tables below.
*/
/*
* Some platforms always have the same stepping value for GT and display;
* use a macro to define these to make it easier to identify the platforms
* where the two steppings can deviate.
*/
#define COMMON_STEP(x) .gt_step = STEP_##x, .display_step = STEP_##x
static const struct intel_step_info skl_revids[] = {
[0x6] = { COMMON_STEP(G0) },
[0x7] = { COMMON_STEP(H0) },
[0x9] = { COMMON_STEP(J0) },
[0xA] = { COMMON_STEP(I1) },
};
/* FIXME: what about REVID_E0 */
static const struct intel_step_info kbl_revids[] = {
[0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
[1] = { .gt_step = STEP_B0, .display_step = STEP_B0 },
@ -76,6 +93,9 @@ void intel_step_init(struct drm_i915_private *i915)
} else if (IS_KABYLAKE(i915)) {
revids = kbl_revids;
size = ARRAY_SIZE(kbl_revids);
} else if (IS_SKYLAKE(i915)) {
revids = skl_revids;
size = ARRAY_SIZE(skl_revids);
}
/* Not using the stepping scheme for the platform yet. */

4
drivers/gpu/drm/i915/intel_step.h
View File

@ -31,6 +31,10 @@ enum intel_step {
STEP_E0,
STEP_F0,
STEP_G0,
STEP_H0,
STEP_I0,
STEP_I1,
STEP_J0,
STEP_FUTURE,
STEP_FOREVER,
};