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linux/drivers/ata/ata_piix.c

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Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
/*
[libata] license change, other bits - changes license of all code from OSL+GPL to plain ole GPL - except for NVIDIA, who hasn't yet responded about sata_nv - copyright holders were already contacted privately - adds info in each driver about where hardware/protocol docs may be obtained - where I have made major contributions, updated copyright dates
2005-08-29 04:18:39 +04:00
* ata_piix.c - Intel PATA/SATA controllers
*
* Maintained by: Jeff Garzik <jgarzik@pobox.com>
* Please ALWAYS copy linux-ide@vger.kernel.org
* on emails.
*
*
* Copyright 2003-2005 Red Hat Inc
* Copyright 2003-2005 Jeff Garzik
*
*
* Copyright header from piix.c:
*
* Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer
* Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
ata: Switch all my stuff to a common address Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-10-27 18:09:10 +03:00
* Copyright (C) 2003 Red Hat Inc
[libata] license change, other bits - changes license of all code from OSL+GPL to plain ole GPL - except for NVIDIA, who hasn't yet responded about sata_nv - copyright holders were already contacted privately - adds info in each driver about where hardware/protocol docs may be obtained - where I have made major contributions, updated copyright dates
2005-08-29 04:18:39 +04:00
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; see the file COPYING. If not, write to
* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
*
*
* libata documentation is available via 'make {ps|pdf}docs',
* as Documentation/DocBook/libata.*
*
* Hardware documentation available at http://developer.intel.com/
*
[PATCH] libata: add ata_piix notes Ok lets start with the 'easy' stuff. This includes my research and summary of chip errata into the new driver so that people can refer to it when updating ata_piix. No code changes Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
2005-12-08 22:19:50 +03:00
* Documentation
* Publically available from Intel web site. Errata documentation
* is also publically available. As an aide to anyone hacking on this
[PATCH] trivial piix: swap bogus dot for comma space Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-12-04 19:33:20 +03:00
* driver the list of errata that are relevant is below, going back to
[PATCH] libata: add ata_piix notes Ok lets start with the 'easy' stuff. This includes my research and summary of chip errata into the new driver so that people can refer to it when updating ata_piix. No code changes Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
2005-12-08 22:19:50 +03:00
* PIIX4. Older device documentation is now a bit tricky to find.
*
Fix typos in comments [Ss]ytem => [Ss]ystem udpate => update paramters => parameters orginal => original Signed-off-by: Thomas Weber <swirl@gmx.li> Acked-by: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2010-03-16 13:47:56 +03:00
* The chipsets all follow very much the same design. The original Triton
[PATCH] libata: add ata_piix notes Ok lets start with the 'easy' stuff. This includes my research and summary of chip errata into the new driver so that people can refer to it when updating ata_piix. No code changes Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
2005-12-08 22:19:50 +03:00
* series chipsets do _not_ support independant device timings, but this
* is fixed in Triton II. With the odd mobile exception the chips then
* change little except in gaining more modes until SATA arrives. This
* driver supports only the chips with independant timing (that is those
* with SITRE and the 0x44 timing register). See pata_oldpiix and pata_mpiix
* for the early chip drivers.
*
* Errata of note:
*
* Unfixable
* PIIX4 errata #9 - Only on ultra obscure hw
* ICH3 errata #13 - Not observed to affect real hw
* by Intel
*
* Things we must deal with
* PIIX4 errata #10 - BM IDE hang with non UDMA
* (must stop/start dma to recover)
* 440MX errata #15 - As PIIX4 errata #10
* PIIX4 errata #15 - Must not read control registers
* during a PIO transfer
* 440MX errata #13 - As PIIX4 errata #15
* ICH2 errata #21 - DMA mode 0 doesn't work right
* ICH0/1 errata #55 - As ICH2 errata #21
* ICH2 spec c #9 - Extra operations needed to handle
* drive hotswap [NOT YET SUPPORTED]
* ICH2 spec c #20 - IDE PRD must not cross a 64K boundary
* and must be dword aligned
* ICH2 spec c #24 - UDMA mode 4,5 t85/86 should be 6ns not 3.3
ata_piix: ICH7 does not support correct MWDMA timings See Errata documentation. The recommended workaround is to use PIO4 instead which will we automatically do by flagging this mode not available. Signed-off-by: Alan Cox <alan.cox@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-05-06 20:08:44 +04:00
* ICH7 errata #16 - MWDMA1 timings are incorrect
[PATCH] libata: add ata_piix notes Ok lets start with the 'easy' stuff. This includes my research and summary of chip errata into the new driver so that people can refer to it when updating ata_piix. No code changes Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
2005-12-08 22:19:50 +03:00
*
* Should have been BIOS fixed:
* 450NX: errata #19 - DMA hangs on old 450NX
* 450NX: errata #20 - DMA hangs on old 450NX
* 450NX: errata #25 - Corruption with DMA on old 450NX
* ICH3 errata #15 - IDE deadlock under high load
* (BIOS must set dev 31 fn 0 bit 23)
* ICH3 errata #18 - Don't use native mode
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
[libata ata_piix] use dev_printk() where appropriate
2005-10-30 14:42:18 +03:00
#include <linux/device.h>
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 11:04:11 +03:00
#include <linux/gfp.h>
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
#include <scsi/scsi_host.h>
#include <linux/libata.h>
ata_piix: fix suspend/resume for some TOSHIBA laptops ACPI implementations in several TOSHIBA laptops are weird and burn cpu cycles for tens of seconds while trying to suspend if the PCI device for the ATA controller is disabled when the ACPI suspend is called. This patch uses DMI to match those machines and bypass device disable on those machines during suspend. As the device needs to be put into enabled state on resume without affecting PCI enable count, matching resume callback uses __pci_reenable_device(). This bug is reported in bugzilla bug 7780. http://bugzilla.kernel.org/show_bug.cgi?id=7780 Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-10 10:55:43 +04:00
#include <linux/dmi.h>
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
#define DRV_NAME "ata_piix"
ata_piix: ICH7 does not support correct MWDMA timings See Errata documentation. The recommended workaround is to use PIO4 instead which will we automatically do by flagging this mode not available. Signed-off-by: Alan Cox <alan.cox@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-05-06 20:08:44 +04:00
#define DRV_VERSION "2.13"
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
enum {
PIIX_IOCFG = 0x54, /* IDE I/O configuration register */
ICH5_PMR = 0x90, /* port mapping register */
ICH5_PCS = 0x92, /* port control and status */
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
PIIX_SIDPR_BAR = 5,
PIIX_SIDPR_LEN = 16,
PIIX_SIDPR_IDX = 0,
PIIX_SIDPR_DATA = 4,
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
[PATCH] ata_piix: fix MAP VALUE interpretation for for ICH6/7 Unlike their older siblings, ICH6 and 7 use different scheme for MAP VALUE. This patch makes ata_piix interpret MV properly on ICH6/7. Pre-ICH6/7 The value of these bits indicate the address range the SATA port responds to, and whether or not the SATA and IDE functions are combined. 000 = Non-combined. P0 is primary master. P1 is secondary master. 001 = Non-combined. P0 is secondary master. P1 is primary master. 100 = Combined. P0 is primary master. P1 is primary slave. P-ATA is 2:0 Map Value secondary. 101 = Combined. P0 is primary slave. P1 is primary master. P-ATA is secondary. 110 = Combined. P-ATA is primary. P0 is secondary master. P1 is secondary slave. 111 = Combined. P-ATA is primary. P0 is secondary slave. P1 is secondary master. ICH6/7 Map Value - R/W. Map Value (MV): The value in the bits below indicate the address range the SATA ports responds to, and whether or not the PATA and SATA functions are combined. When in combined mode, the AHCI memory space is not available and AHCI may not be used. 00 = Non-combined. P0 is primary master, P2 is the primary slave. P1 is secondary master, P3 is the 1:0 secondary slave (desktop only). P0 is primary master, P2 is the primary slave (mobile only). 01 = Combined. IDE is primary. P1 is secondary master, P3 is the secondary slave. (desktop only) 10 = Combined. P0 is primary master. P2 is primary slave. IDE is secondary 11 = Reserved Signed-off-by: Tejun Heo <htejun@gmail.com> -- Jeff, without this patch, ata_piix misdetects my ICH7's combined mode, ending up not applying bridge limits to PX-710SA and configuring IDE drive on 40-c cable to UDMA/66. Thanks. Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
2005-12-18 11:17:07 +03:00
PIIX_FLAG_CHECKINTR = (1 << 28), /* make sure PCI INTx enabled */
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
PIIX_FLAG_SIDPR = (1 << 29), /* SATA idx/data pair regs */
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
[PATCH] libata: always use polling IDENTIFY libata switched to IRQ-driven IDENTIFY when IRQ-driven PIO was introduced. This has caused a lot of problems including device misdetection and phantom device. ATA_FLAG_DETECT_POLLING was added recently to selectively use polling IDENTIFY on problemetic drivers but many controllers and devices are affected by this problem and trying to adding ATA_FLAG_DETECT_POLLING for each such case is diffcult and not very rewarding. This patch makes libata always use polling IDENTIFY. This is consistent with libata's original behavior and drivers/ide's behavior. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-12-03 15:34:13 +03:00
PIIX_PATA_FLAGS = ATA_FLAG_SLAVE_POSS,
PIIX_SATA_FLAGS = ATA_FLAG_SATA | PIIX_FLAG_CHECKINTR,
[PATCH] ata_piix: clean up port flags * move common flags into PIIX_PATA_FLAGS and PIIX_SATA_FLAGS * kill unnecessary ATA_FLAG_SRST Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-11-10 12:08:10 +03:00
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
PIIX_80C_PRI = (1 << 5) | (1 << 4),
PIIX_80C_SEC = (1 << 7) | (1 << 6),
[PATCH] ata_piix: implement proper port map Replace combined mode handling via PIIX_COMB/COMB_PATA_P0 with proper port map. PIIX now prints port configuration during initialization. ATA_FLAG_SLAVE_POSS is now turned on for SATA ports only when the slave device is actually avaliable. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
/* constants for mapping table */
P0 = 0, /* port 0 */
P1 = 1, /* port 1 */
P2 = 2, /* port 2 */
P3 = 3, /* port 3 */
IDE = -1, /* IDE */
NA = -2, /* not avaliable */
RV = -3, /* reserved */
libata: Check PCI sub-class code before disabling AHCI This patch adds functionality to check the PCI sub-class code of an AHCI capable device before disabling AHCI. It fixes a bug where an ICH7 sata controller is being setup by the BIOS as sub-class 1 (ide) and the AHCI control registers weren't being initialized, thus causing an IO error in piix_disable_ahci(). Signed-off-by: Gregory Felix <greg.felix@gmail.com>
2005-07-28 23:54:15 +04:00
PIIX_AHCI_DEVICE = 6,
ata_piix: fix suspend/resume for some TOSHIBA laptops ACPI implementations in several TOSHIBA laptops are weird and burn cpu cycles for tens of seconds while trying to suspend if the PCI device for the ATA controller is disabled when the ACPI suspend is called. This patch uses DMI to match those machines and bypass device disable on those machines during suspend. As the device needs to be put into enabled state on resume without affecting PCI enable count, matching resume callback uses __pci_reenable_device(). This bug is reported in bugzilla bug 7780. http://bugzilla.kernel.org/show_bug.cgi?id=7780 Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-10 10:55:43 +04:00
/* host->flags bits */
PIIX_HOST_BROKEN_SUSPEND = (1 << 24),
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
};
ata_piix: separate controller IDs into separate enum Separate controller IDs into a separate enum as Jeff requested. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-11-24 15:16:07 +03:00
enum piix_controller_ids {
/* controller IDs */
piix_pata_mwdma, /* PIIX3 MWDMA only */
piix_pata_33, /* PIIX4 at 33Mhz */
ich_pata_33, /* ICH up to UDMA 33 only */
ich_pata_66, /* ICH up to 66 Mhz */
ich_pata_100, /* ICH up to UDMA 100 */
ata_piix: ICH7 does not support correct MWDMA timings See Errata documentation. The recommended workaround is to use PIO4 instead which will we automatically do by flagging this mode not available. Signed-off-by: Alan Cox <alan.cox@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-05-06 20:08:44 +04:00
ich_pata_100_nomwdma1, /* ICH up to UDMA 100 but with no MWDMA1*/
ata_piix: separate controller IDs into separate enum Separate controller IDs into a separate enum as Jeff requested. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-11-24 15:16:07 +03:00
ich5_sata,
ich6_sata,
ata_piix: kill ich6_sata_ahci and clean up ich6_sata_ahci and ich6_sata are identical. Kill ich6_sata_ahci and drop _ahci postfixes from controller ids, which doesn't really mean anything at this point. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 10:00:58 +03:00
ich6m_sata,
ich8_sata,
ata_piix: separate controller IDs into separate enum Separate controller IDs into a separate enum as Jeff requested. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-11-24 15:16:07 +03:00
ich8_2port_sata,
ata_piix: kill ich6_sata_ahci and clean up ich6_sata_ahci and ich6_sata are identical. Kill ich6_sata_ahci and drop _ahci postfixes from controller ids, which doesn't really mean anything at this point. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 10:00:58 +03:00
ich8m_apple_sata, /* locks up on second port enable */
tolapai_sata,
ata_piix: separate controller IDs into separate enum Separate controller IDs into a separate enum as Jeff requested. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-11-24 15:16:07 +03:00
piix_pata_vmw, /* PIIX4 for VMware, spurious DMA_ERR */
};
[PATCH] ata_piix: implement proper port map Replace combined mode handling via PIIX_COMB/COMB_PATA_P0 with proper port map. PIIX now prints port configuration during initialization. ATA_FLAG_SLAVE_POSS is now turned on for SATA ports only when the slave device is actually avaliable. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
struct piix_map_db {
const u32 mask;
[libata] ata_piix: minor cleanups noticed in prior patch run * delete unused PIIX_FLAG_COMBINED* * port_enable should be u16 rather than u32 Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-07-11 21:11:17 +04:00
const u16 port_enable;
[PATCH] ata_piix: implement proper port map Replace combined mode handling via PIIX_COMB/COMB_PATA_P0 with proper port map. PIIX now prints port configuration during initialization. ATA_FLAG_SLAVE_POSS is now turned on for SATA ports only when the slave device is actually avaliable. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
const int map[][4];
};
[PATCH] ata_piix: add host_set private structure Add host_set private structure piix_host_priv. Currently the only field is ->map which used to be stored directly at host_set->private_data. This change allows more host_set private fields to be added. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-06-28 20:58:28 +04:00
struct piix_host_priv {
const int *map;
ata_piix: save, use saved and restore IOCFG Certain ACPI implementations mess up IOCFG on _STM making libata detect cable type incorrectly after a suspend/resume cycle. This patch makes ata_piix save IOCFG on attach, use the saved value for things which aren't dynamic and restore it on detach so that the next driver also gets the BIOS initialized value. This patch contains the following changes. * makes ich_pata_cable_detect() use saved_iocfg. * make piix_iocfg_bit18_quirk() take @host and use saved_iocfg. * hpriv allocation moved upwards to save iocfg before doing anything else. This fixes bz#11879. Andreas Mohr reported and diagnosed the problem. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Andreas Mohr <andi@lisas.de> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-01-02 06:04:48 +03:00
u32 saved_iocfg;
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
void __iomem *sidpr;
[PATCH] ata_piix: add host_set private structure Add host_set private structure piix_host_priv. Currently the only field is ->map which used to be stored directly at host_set->private_data. This change allows more host_set private fields to be added. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-06-28 20:58:28 +04:00
};
[libata] checkpatch-inspired cleanups Tackle the relatively sane complaints of checkpatch --file. The vast majority is indentation and whitespace changes, the rest are * #include fixes * printk KERN_xxx prefix addition * BSS/initializer cleanups Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2007-10-19 14:42:56 +04:00
static int piix_init_one(struct pci_dev *pdev,
const struct pci_device_id *ent);
ata_piix: save, use saved and restore IOCFG Certain ACPI implementations mess up IOCFG on _STM making libata detect cable type incorrectly after a suspend/resume cycle. This patch makes ata_piix save IOCFG on attach, use the saved value for things which aren't dynamic and restore it on detach so that the next driver also gets the BIOS initialized value. This patch contains the following changes. * makes ich_pata_cable_detect() use saved_iocfg. * make piix_iocfg_bit18_quirk() take @host and use saved_iocfg. * hpriv allocation moved upwards to save iocfg before doing anything else. This fixes bz#11879. Andreas Mohr reported and diagnosed the problem. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Andreas Mohr <andi@lisas.de> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-01-02 06:04:48 +03:00
static void piix_remove_one(struct pci_dev *pdev);
libata: make reset related methods proper port operations Currently reset methods are not specified directly in the ata_port_operations table. If a LLD wants to use custom reset methods, it should construct and use a error_handler which uses those reset methods. It's done this way for two reasons. First, the ops table already contained too many methods and adding four more of them would noticeably increase the amount of necessary boilerplate code all over low level drivers. Second, as ->error_handler uses those reset methods, it can get confusing. ie. By overriding ->error_handler, those reset ops can be made useless making layering a bit hazy. Now that ops table uses inheritance, the first problem doesn't exist anymore. The second isn't completely solved but is relieved by providing default values - most drivers can just override what it has implemented and don't have to concern itself about higher level callbacks. In fact, there currently is no driver which actually modifies error handling behavior. Drivers which override ->error_handler just wraps the standard error handler only to prepare the controller for EH. I don't think making ops layering strict has any noticeable benefit. This patch makes ->prereset, ->softreset, ->hardreset, ->postreset and their PMP counterparts propoer ops. Default ops are provided in the base ops tables and drivers are converted to override individual reset methods instead of creating custom error_handler. * ata_std_error_handler() doesn't use sata_std_hardreset() if SCRs aren't accessible. sata_promise doesn't need to use separate error_handlers for PATA and SATA anymore. * softreset is broken for sata_inic162x and sata_sx4. As libata now always prefers hardreset, this doesn't really matter but the ops are forced to NULL using ATA_OP_NULL for documentation purpose. * pata_hpt374 needs to use different prereset for the first and second PCI functions. This used to be done by branching from hpt374_error_handler(). The proper way to do this is to use separate ops and port_info tables for each function. Converted. Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-25 06:22:50 +03:00
static int piix_pata_prereset(struct ata_link *link, unsigned long deadline);
[libata] checkpatch-inspired cleanups Tackle the relatively sane complaints of checkpatch --file. The vast majority is indentation and whitespace changes, the rest are * #include fixes * printk KERN_xxx prefix addition * BSS/initializer cleanups Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2007-10-19 14:42:56 +04:00
static void piix_set_piomode(struct ata_port *ap, struct ata_device *adev);
static void piix_set_dmamode(struct ata_port *ap, struct ata_device *adev);
static void ich_set_dmamode(struct ata_port *ap, struct ata_device *adev);
pata: cable methods Versus upstream as requested Last of the trivial switches to cable_detect methods. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-04-11 03:04:20 +04:00
static int ich_pata_cable_detect(struct ata_port *ap);
ata_piix: ignore ATA_DMA_ERR on vmware ich4 VMware ich4 emulation incorrectly sets DMA_ERR on TF error. Ignore it. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-07 13:38:53 +03:00
static u8 piix_vmw_bmdma_status(struct ata_port *ap);
libata: make SCR access ops per-link Logically, SCR access ops should take @link; however, there was no compelling reason to convert all SCR access ops when adding @link abstraction as there's one-to-one mapping between a port and a non-PMP link. However, that assumption won't hold anymore with the scheduled addition of slave link. Make SCR access ops per-link. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:40 +04:00
static int piix_sidpr_scr_read(struct ata_link *link,
unsigned int reg, u32 *val);
static int piix_sidpr_scr_write(struct ata_link *link,
unsigned int reg, u32 val);
ata_piix: implement LPM support Now that DIPM can be used independently from HIPM, ata_piix can support LPM too. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-09-01 19:50:08 +04:00
static int piix_sidpr_set_lpm(struct ata_link *link, enum ata_lpm_policy policy,
unsigned hints);
libata: implement spurious irq handling for SFF and apply it to piix Traditional IDE interface sucks in that it doesn't have a reliable IRQ pending bit, so if the controller raises IRQ while the driver is expecting it not to, the IRQ won't be cleared and eventually the IRQ line will be killed by interrupt subsystem. Some controllers have non-standard mechanism to indicate IRQ pending so that this condition can be detected and worked around. This patch adds an optional operation ->sff_irq_check() which will be called for each port from the ata_sff_interrupt() if an unexpected interrupt is received. If the operation returns %true, ->sff_check_status() and ->sff_irq_clear() will be cleared for the port. Note that this doesn't mark the interrupt as handled so it won't prevent IRQ subsystem from killing the IRQ if this mechanism fails to clear the spurious IRQ. This patch also implements ->sff_irq_check() for ata_piix. Note that this adds slight overhead to shared IRQ operation as IRQs which are destined for other controllers will trigger extra register accesses to check whether IDE interrupt is pending but this solves rare screaming IRQ cases and for some curious reason also helps weird BIOS related glitch on Samsung n130 as reported in bko#14314. http://bugzilla.kernel.org/show_bug.cgi?id=14314 * piix_base_ops dropped as suggested by Sergei. * Spurious IRQ detection doesn't kick in anymore if polling qc is in progress. This provides less protection but some controllers have possible data corruption issues if the wrong register is accessed while a command is in progress. Signed-off-by: Tejun Heo <tj@kernel.org> Reported-by: Johannes Stezenbach <js@sig21.net> Reported-by: Hans Werner <hwerner4@gmx.de> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-01-19 04:49:19 +03:00
static bool piix_irq_check(struct ata_port *ap);
ata_piix: fix suspend/resume for some TOSHIBA laptops ACPI implementations in several TOSHIBA laptops are weird and burn cpu cycles for tens of seconds while trying to suspend if the PCI device for the ATA controller is disabled when the ACPI suspend is called. This patch uses DMI to match those machines and bypass device disable on those machines during suspend. As the device needs to be put into enabled state on resume without affecting PCI enable count, matching resume callback uses __pci_reenable_device(). This bug is reported in bugzilla bug 7780. http://bugzilla.kernel.org/show_bug.cgi?id=7780 Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-10 10:55:43 +04:00
#ifdef CONFIG_PM
static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg);
static int piix_pci_device_resume(struct pci_dev *pdev);
#endif
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
static unsigned int in_module_init = 1;
[libata] constify PCI ID table in several drivers
2005-11-10 19:04:11 +03:00
static const struct pci_device_id piix_pci_tbl[] = {
libata: PIIX3 support This I believe completes the PIIX range of support for libata This adds the table entries needed for the PIIX3, both a new PCI identifier and a new mode list. It also fixes an erroneous access to PCI configuration 0x48 on non UDMA capable chips. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-10 20:13:38 +03:00
/* Intel PIIX3 for the 430HX etc */
{ 0x8086, 0x7010, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix_pata_mwdma },
ata_piix: ignore ATA_DMA_ERR on vmware ich4 VMware ich4 emulation incorrectly sets DMA_ERR on TF error. Ignore it. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-07 13:38:53 +03:00
/* VMware ICH4 */
{ 0x8086, 0x7111, 0x15ad, 0x1976, 0, 0, piix_pata_vmw },
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
/* Intel PIIX4 for the 430TX/440BX/MX chipset: UDMA 33 */
/* Also PIIX4E (fn3 rev 2) and PIIX4M (fn3 rev 3) */
{ 0x8086, 0x7111, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix_pata_33 },
/* Intel PIIX4 */
{ 0x8086, 0x7199, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix_pata_33 },
/* Intel PIIX4 */
{ 0x8086, 0x7601, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix_pata_33 },
/* Intel PIIX */
{ 0x8086, 0x84CA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix_pata_33 },
/* Intel ICH (i810, i815, i840) UDMA 66*/
{ 0x8086, 0x2411, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_66 },
/* Intel ICH0 : UDMA 33*/
{ 0x8086, 0x2421, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_33 },
/* Intel ICH2M */
{ 0x8086, 0x244A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
/* Intel ICH2 (i810E2, i845, 850, 860) UDMA 100 */
{ 0x8086, 0x244B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
/* Intel ICH3M */
{ 0x8086, 0x248A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
/* Intel ICH3 (E7500/1) UDMA 100 */
{ 0x8086, 0x248B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
/* Intel ICH4 (i845GV, i845E, i852, i855) UDMA 100 */
{ 0x8086, 0x24CA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
{ 0x8086, 0x24CB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
/* Intel ICH5 */
ata_piix: disallow UDMA 133 on ICH5 & ICH7 There is another outstanding issue with ata_piix.c. Intel has never officially supported anything faster than PATA 100MB/s. But, the ata_piix.c driver "define" the ICH5 & ICH7 as UDMA6 (aka 133MB/s) capable. [ Well, no one has probably noticed it before, because there is bug in do_pata_set_dmamode... Just look at libata_atapiix_enable_real_udma133.patch and you'll see what wrong with it. ] Here are Intel's datasheets for the affected chipsets: ICH5 Datasheet: http://www.intel.com/design/chipsets/datashts/252516.htm (See note on page 183: "... the ICH5 supports reads at the maximum rate of 100MB/s.") ICH7 Datasheet: http://www.intel.com/design/chipsets/datashts/307013.htm (See first note on page 190: "... the ICH7 supports reads at the maximum rate of 100MB/s.") They are two different ways to deal with it: - Either - 1. replace all ich_pata_133 with ich_pata_100. (libata_atapiix_disable_udma6.diff - diff from 2.6.22 ) - Or - 2. keep all ich_pata_133 and fix the bug in "do_pata_set_dmamode". (libata_atapiix_enable_real_udma133.patch - diff from 2.6.22) If there are any concerns about the safety of the patch patch: http://lkml.org/lkml/2007/7/6/292 (It was already tested by an Intel employee, but I guess a bit more user input is necessary here... ) This patch implements 1. Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Cc: Jeff Garzik <jeff@garzik.org> Cc: Tejun Heo <htejun@gmail.com> Signed-off-by: Christian Lamparter <chunkeey@web.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-11 00:59:51 +04:00
{ 0x8086, 0x24DB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
/* C-ICH (i810E2) */
{ 0x8086, 0x245B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
[libata #pata-drivers] Trim trailing whitespace.
2006-08-31 08:03:49 +04:00
/* ESB (855GME/875P + 6300ESB) UDMA 100 */
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
{ 0x8086, 0x25A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
/* ICH6 (and 6) (i915) UDMA 100 */
{ 0x8086, 0x266F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
/* ICH7/7-R (i945, i975) UDMA 100*/
ata_piix: ICH7 does not support correct MWDMA timings See Errata documentation. The recommended workaround is to use PIO4 instead which will we automatically do by flagging this mode not available. Signed-off-by: Alan Cox <alan.cox@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-05-06 20:08:44 +04:00
{ 0x8086, 0x27DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100_nomwdma1 },
{ 0x8086, 0x269E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100_nomwdma1 },
Add a PCI ID for santa rosa's PATA controller. Signed-off-by: Christian Lamparter <chunkeey@web.de> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-03 18:19:20 +04:00
/* ICH8 Mobile PATA Controller */
{ 0x8086, 0x2850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
ata_piix: Remove stale comment Combined mode pci quirk hacks went away - so the table to keep in sync no longer exists. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-05-06 20:10:17 +04:00
/* SATA ports */
[PATCH] ata_piix: finer-grained port_info Make port_info finer-grained. This patch doesn't cause any functional change. Later init reimplementation will make use of it. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
/* 82801EB (ICH5) */
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
{ 0x8086, 0x24d1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata },
[PATCH] ata_piix: finer-grained port_info Make port_info finer-grained. This patch doesn't cause any functional change. Later init reimplementation will make use of it. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
/* 82801EB (ICH5) */
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
{ 0x8086, 0x24df, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata },
[PATCH] ata_piix: finer-grained port_info Make port_info finer-grained. This patch doesn't cause any functional change. Later init reimplementation will make use of it. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
/* 6300ESB (ICH5 variant with broken PCS present bits) */
[PATCH] ata_piix: strip now unneded MAP related stuff Now that PCS isn't used for device detection anymore... * esb_sata is identical to ich5_sata * no reason to know present_shift * no reason to store map_db in host private area The MAP table itself is left because it can be used for SCR access. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-11-10 12:08:10 +03:00
{ 0x8086, 0x25a3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata },
[PATCH] ata_piix: finer-grained port_info Make port_info finer-grained. This patch doesn't cause any functional change. Later init reimplementation will make use of it. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
/* 6300ESB pretending RAID */
[PATCH] ata_piix: strip now unneded MAP related stuff Now that PCS isn't used for device detection anymore... * esb_sata is identical to ich5_sata * no reason to know present_shift * no reason to store map_db in host private area The MAP table itself is left because it can be used for SCR access. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-11-10 12:08:10 +03:00
{ 0x8086, 0x25b0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata },
[PATCH] ata_piix: finer-grained port_info Make port_info finer-grained. This patch doesn't cause any functional change. Later init reimplementation will make use of it. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
/* 82801FB/FW (ICH6/ICH6W) */
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
{ 0x8086, 0x2651, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
[PATCH] ata_piix: finer-grained port_info Make port_info finer-grained. This patch doesn't cause any functional change. Later init reimplementation will make use of it. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
/* 82801FR/FRW (ICH6R/ICH6RW) */
ata_piix: kill ich6_sata_ahci and clean up ich6_sata_ahci and ich6_sata are identical. Kill ich6_sata_ahci and drop _ahci postfixes from controller ids, which doesn't really mean anything at this point. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 10:00:58 +03:00
{ 0x8086, 0x2652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
ata_piix: don't attach to ICH6M in ahci mode ata_piix when attached to ICH6M in AHCI mode doesn't provide any benefit over using ahci and has detection problems. Don't let ata_piix claim ICH6M if it's in AHCI mode. This change makes ICH6R the only one which ata_piix can attach to even when it's in ahci mode which is necessary as some devices don't work properly under ahci mode. Drop PIIX_FLAG_AHCI and match the controller directly so that piix_disable_ahci() is called only for it. This change makes PIIX_SCC no longer used and it gets dropped too. This fixes bz 9491. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Robert M. Albrecht <romal@gmx.de> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 09:46:58 +03:00
/* 82801FBM ICH6M (ICH6R with only port 0 and 2 implemented).
* Attach iff the controller is in IDE mode. */
{ 0x8086, 0x2653, PCI_ANY_ID, PCI_ANY_ID,
ata_piix: kill ich6_sata_ahci and clean up ich6_sata_ahci and ich6_sata are identical. Kill ich6_sata_ahci and drop _ahci postfixes from controller ids, which doesn't really mean anything at this point. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 10:00:58 +03:00
PCI_CLASS_STORAGE_IDE << 8, 0xffff00, ich6m_sata },
[PATCH] ata_piix: finer-grained port_info Make port_info finer-grained. This patch doesn't cause any functional change. Later init reimplementation will make use of it. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
/* 82801GB/GR/GH (ICH7, identical to ICH6) */
ata_piix: kill ich6_sata_ahci and clean up ich6_sata_ahci and ich6_sata are identical. Kill ich6_sata_ahci and drop _ahci postfixes from controller ids, which doesn't really mean anything at this point. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 10:00:58 +03:00
{ 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
[PATCH] ata_piix: finer-grained port_info Make port_info finer-grained. This patch doesn't cause any functional change. Later init reimplementation will make use of it. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
/* 2801GBM/GHM (ICH7M, identical to ICH6M) */
ata_piix: kill ich6_sata_ahci and clean up ich6_sata_ahci and ich6_sata are identical. Kill ich6_sata_ahci and drop _ahci postfixes from controller ids, which doesn't really mean anything at this point. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 10:00:58 +03:00
{ 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata },
[PATCH] ata_piix: IDE mode SATA patch for Intel ICH9 This updated patch adds the Intel ICH9 IDE mode SATA controller DID's. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Acked-by: Tejun Heo <htejun@gmail.com> Cc: Jeff Garzik <jeff@garzik.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-12-07 19:57:32 +03:00
/* Enterprise Southbridge 2 (631xESB/632xESB) */
ata_piix: kill ich6_sata_ahci and clean up ich6_sata_ahci and ich6_sata are identical. Kill ich6_sata_ahci and drop _ahci postfixes from controller ids, which doesn't really mean anything at this point. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 10:00:58 +03:00
{ 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
[PATCH] ata_piix: IDE mode SATA patch for Intel ICH9 This updated patch adds the Intel ICH9 IDE mode SATA controller DID's. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Acked-by: Tejun Heo <htejun@gmail.com> Cc: Jeff Garzik <jeff@garzik.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-12-07 19:57:32 +03:00
/* SATA Controller 1 IDE (ICH8) */
ata_piix: kill ich6_sata_ahci and clean up ich6_sata_ahci and ich6_sata are identical. Kill ich6_sata_ahci and drop _ahci postfixes from controller ids, which doesn't really mean anything at this point. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 10:00:58 +03:00
{ 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
[PATCH] ata_piix: IDE mode SATA patch for Intel ICH9 This updated patch adds the Intel ICH9 IDE mode SATA controller DID's. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Acked-by: Tejun Heo <htejun@gmail.com> Cc: Jeff Garzik <jeff@garzik.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-12-07 19:57:32 +03:00
/* SATA Controller 2 IDE (ICH8) */
ata_piix: reorganize controller IDs Move piix_pata_mwdma to top, rename ich9_2port_sata to ich8_2port_sata for consistency and use automatically incremented values instead of assigning fixed values to ease adding new controller IDs. Signed-off-by: Tejun Heo <htejun@gmail.com>
2007-11-19 05:24:25 +03:00
{ 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
ata_piix: only enable the first port on apple macbook pro ICH8M on apple macbook pro occasionally locks up completely during PCS initialization if ports other than the first one are enabled. Add a separate controller ID and only enable the first port. tj: commit description added and patch updated to fit with the previous controller ID update. Signed-off-by: Thomas Rohwer <tr@tng.de> Signed-off-by: Tejun Heo <htejun@gmail.com>
2007-11-19 05:54:24 +03:00
/* Mobile SATA Controller IDE (ICH8M), Apple */
ata_piix: kill ich6_sata_ahci and clean up ich6_sata_ahci and ich6_sata are identical. Kill ich6_sata_ahci and drop _ahci postfixes from controller ids, which doesn't really mean anything at this point. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 10:00:58 +03:00
{ 0x8086, 0x2828, 0x106b, 0x00a0, 0, 0, ich8m_apple_sata },
ata_piix: fix macbook ich8m problems ICH8M on macbooks are peculiar in that some of them lock up when the second port is enabled, some return bogus values on SIDPR access while yet others hang on SIDPR access. Also, the ich8m_apple_sata entry was wrongly added below generic ich8m entry making it virtually useless. This patch works around macbook ich8m problems by * moving ich8m_apple_sata entry above generic ich8m entry * dropping PIIX_FLAG_SIDPR from ich8m_apple_sata * adding subsystem 106b:00a1 as ich8m_apple_sata Reported and tested by MATSUBAYASHI. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: MATSUBAYASHI 'Shaolin' Kohji <shaolin@rhythmaning.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-05-29 17:04:22 +04:00
{ 0x8086, 0x2828, 0x106b, 0x00a1, 0, 0, ich8m_apple_sata },
ata_piix: subsys 106b:00a3 is apple ich8m too Subsys 106b:00a3 also is the weird apple ich8m which chokes when the latter two ports are accessed, add it. Reported by Felipe Sere. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Felipe Sere <dodofxp@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-29 10:06:26 +04:00
{ 0x8086, 0x2828, 0x106b, 0x00a3, 0, 0, ich8m_apple_sata },
ata_piix: fix macbook ich8m problems ICH8M on macbooks are peculiar in that some of them lock up when the second port is enabled, some return bogus values on SIDPR access while yet others hang on SIDPR access. Also, the ich8m_apple_sata entry was wrongly added below generic ich8m entry making it virtually useless. This patch works around macbook ich8m problems by * moving ich8m_apple_sata entry above generic ich8m entry * dropping PIIX_FLAG_SIDPR from ich8m_apple_sata * adding subsystem 106b:00a1 as ich8m_apple_sata Reported and tested by MATSUBAYASHI. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: MATSUBAYASHI 'Shaolin' Kohji <shaolin@rhythmaning.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-05-29 17:04:22 +04:00
/* Mobile SATA Controller IDE (ICH8M) */
{ 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
[PATCH] ata_piix: IDE mode SATA patch for Intel ICH9 This updated patch adds the Intel ICH9 IDE mode SATA controller DID's. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Acked-by: Tejun Heo <htejun@gmail.com> Cc: Jeff Garzik <jeff@garzik.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-12-07 19:57:32 +03:00
/* SATA Controller IDE (ICH9) */
ata_piix: kill ich6_sata_ahci and clean up ich6_sata_ahci and ich6_sata are identical. Kill ich6_sata_ahci and drop _ahci postfixes from controller ids, which doesn't really mean anything at this point. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 10:00:58 +03:00
{ 0x8086, 0x2920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
[PATCH] ata_piix: IDE mode SATA patch for Intel ICH9 This updated patch adds the Intel ICH9 IDE mode SATA controller DID's. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Acked-by: Tejun Heo <htejun@gmail.com> Cc: Jeff Garzik <jeff@garzik.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-12-07 19:57:32 +03:00
/* SATA Controller IDE (ICH9) */
ata_piix: reorganize controller IDs Move piix_pata_mwdma to top, rename ich9_2port_sata to ich8_2port_sata for consistency and use automatically incremented values instead of assigning fixed values to ease adding new controller IDs. Signed-off-by: Tejun Heo <htejun@gmail.com>
2007-11-19 05:24:25 +03:00
{ 0x8086, 0x2921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
[PATCH] ata_piix: IDE mode SATA patch for Intel ICH9 This updated patch adds the Intel ICH9 IDE mode SATA controller DID's. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Acked-by: Tejun Heo <htejun@gmail.com> Cc: Jeff Garzik <jeff@garzik.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-12-07 19:57:32 +03:00
/* SATA Controller IDE (ICH9) */
ata_piix: reorganize controller IDs Move piix_pata_mwdma to top, rename ich9_2port_sata to ich8_2port_sata for consistency and use automatically incremented values instead of assigning fixed values to ease adding new controller IDs. Signed-off-by: Tejun Heo <htejun@gmail.com>
2007-11-19 05:24:25 +03:00
{ 0x8086, 0x2926, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
[PATCH] ata_piix: IDE mode SATA patch for Intel ICH9 This updated patch adds the Intel ICH9 IDE mode SATA controller DID's. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Acked-by: Tejun Heo <htejun@gmail.com> Cc: Jeff Garzik <jeff@garzik.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-12-07 19:57:32 +03:00
/* SATA Controller IDE (ICH9M) */
ata_piix: reorganize controller IDs Move piix_pata_mwdma to top, rename ich9_2port_sata to ich8_2port_sata for consistency and use automatically incremented values instead of assigning fixed values to ease adding new controller IDs. Signed-off-by: Tejun Heo <htejun@gmail.com>
2007-11-19 05:24:25 +03:00
{ 0x8086, 0x2928, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
[PATCH] ata_piix: IDE mode SATA patch for Intel ICH9 This updated patch adds the Intel ICH9 IDE mode SATA controller DID's. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Acked-by: Tejun Heo <htejun@gmail.com> Cc: Jeff Garzik <jeff@garzik.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-12-07 19:57:32 +03:00
/* SATA Controller IDE (ICH9M) */
ata_piix: reorganize controller IDs Move piix_pata_mwdma to top, rename ich9_2port_sata to ich8_2port_sata for consistency and use automatically incremented values instead of assigning fixed values to ease adding new controller IDs. Signed-off-by: Tejun Heo <htejun@gmail.com>
2007-11-19 05:24:25 +03:00
{ 0x8086, 0x292d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
[PATCH] ata_piix: IDE mode SATA patch for Intel ICH9 This updated patch adds the Intel ICH9 IDE mode SATA controller DID's. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Acked-by: Tejun Heo <htejun@gmail.com> Cc: Jeff Garzik <jeff@garzik.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-12-07 19:57:32 +03:00
/* SATA Controller IDE (ICH9M) */
ata_piix: kill ich6_sata_ahci and clean up ich6_sata_ahci and ich6_sata are identical. Kill ich6_sata_ahci and drop _ahci postfixes from controller ids, which doesn't really mean anything at this point. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 10:00:58 +03:00
{ 0x8086, 0x292e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
ata_piix: IDE mode SATA patch for Intel Tolapai Resend trying to remove 8-bit characters in the email. This patch adds the Intel Tolapai IDE mode SATA controller DID's. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-31 08:36:56 +04:00
/* SATA Controller IDE (Tolapai) */
ata_piix: kill ich6_sata_ahci and clean up ich6_sata_ahci and ich6_sata are identical. Kill ich6_sata_ahci and drop _ahci postfixes from controller ids, which doesn't really mean anything at this point. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 10:00:58 +03:00
{ 0x8086, 0x5028, PCI_ANY_ID, PCI_ANY_ID, 0, 0, tolapai_sata },
ata_piix: IDE mode SATA patch for Intel ICH10 DeviceID's This patch adds the Intel ICH10 IDE mode SATA Controller DeviceID's. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-29 04:36:45 +03:00
/* SATA Controller IDE (ICH10) */
ata_piix: kill ich6_sata_ahci and clean up ich6_sata_ahci and ich6_sata are identical. Kill ich6_sata_ahci and drop _ahci postfixes from controller ids, which doesn't really mean anything at this point. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 10:00:58 +03:00
{ 0x8086, 0x3a00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
ata_piix: IDE mode SATA patch for Intel ICH10 DeviceID's This patch adds the Intel ICH10 IDE mode SATA Controller DeviceID's. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-29 04:36:45 +03:00
/* SATA Controller IDE (ICH10) */
{ 0x8086, 0x3a06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
/* SATA Controller IDE (ICH10) */
ata_piix: kill ich6_sata_ahci and clean up ich6_sata_ahci and ich6_sata are identical. Kill ich6_sata_ahci and drop _ahci postfixes from controller ids, which doesn't really mean anything at this point. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 10:00:58 +03:00
{ 0x8086, 0x3a20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
ata_piix: IDE mode SATA patch for Intel ICH10 DeviceID's This patch adds the Intel ICH10 IDE mode SATA Controller DeviceID's. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-29 04:36:45 +03:00
/* SATA Controller IDE (ICH10) */
{ 0x8086, 0x3a26, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
ata_piix: IDE Mode SATA patch for Intel Ibex Peak DeviceIDs This patch adds the Intel Ibex Peak (PCH) IDE mode SATA Controller DeviceIDs. Signed-off-by: Seth Heasley <seth.heasley@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-08-12 04:03:18 +04:00
/* SATA Controller IDE (PCH) */
{ 0x8086, 0x3b20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* SATA Controller IDE (PCH) */
ata_piix: IDE Mode SATA patch for Intel Ibex Peak DeviceIDs This patch updates the Intel Ibex Peak (PCH) IDE mode SATA Controller DeviceIDs. Signed-off-by: Seth Heasley <seth.heasley@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-08-28 03:40:06 +04:00
{ 0x8086, 0x3b21, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
/* SATA Controller IDE (PCH) */
ata_piix: IDE Mode SATA patch for Intel Ibex Peak DeviceIDs This patch adds the Intel Ibex Peak (PCH) IDE mode SATA Controller DeviceIDs. Signed-off-by: Seth Heasley <seth.heasley@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-08-12 04:03:18 +04:00
{ 0x8086, 0x3b26, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
/* SATA Controller IDE (PCH) */
ata_piix: IDE Mode SATA patch for Intel Ibex Peak DeviceIDs This patch updates the Intel Ibex Peak (PCH) IDE mode SATA Controller DeviceIDs. Signed-off-by: Seth Heasley <seth.heasley@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-08-28 03:40:06 +04:00
{ 0x8086, 0x3b28, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* SATA Controller IDE (PCH) */
ata_piix: IDE Mode SATA patch for Intel Ibex Peak DeviceIDs This patch adds the Intel Ibex Peak (PCH) IDE mode SATA Controller DeviceIDs. Signed-off-by: Seth Heasley <seth.heasley@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-08-12 04:03:18 +04:00
{ 0x8086, 0x3b2d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
/* SATA Controller IDE (PCH) */
{ 0x8086, 0x3b2e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
ata_piix: IDE Mode SATA patch for Intel Cougar Point DeviceIDs Signed-off-by: Seth Heasley <seth.heasley@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-01-13 04:01:28 +03:00
/* SATA Controller IDE (CPT) */
{ 0x8086, 0x1c00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* SATA Controller IDE (CPT) */
{ 0x8086, 0x1c01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* SATA Controller IDE (CPT) */
{ 0x8086, 0x1c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
/* SATA Controller IDE (CPT) */
{ 0x8086, 0x1c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
ata_piix: IDE Mode SATA patch for Intel Patsburg DeviceIDs This patch adds the Intel Patsburg (PCH) IDE mode SATA Controller DeviceIDs. Signed-off-by: Seth Heasley <seth.heasley@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-09-09 20:42:40 +04:00
/* SATA Controller IDE (PBG) */
{ 0x8086, 0x1d00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* SATA Controller IDE (PBG) */
{ 0x8086, 0x1d08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
{ } /* terminate list */
};
static struct pci_driver piix_pci_driver = {
.name = DRV_NAME,
.id_table = piix_pci_tbl,
.probe = piix_init_one,
ata_piix: save, use saved and restore IOCFG Certain ACPI implementations mess up IOCFG on _STM making libata detect cable type incorrectly after a suspend/resume cycle. This patch makes ata_piix save IOCFG on attach, use the saved value for things which aren't dynamic and restore it on detach so that the next driver also gets the BIOS initialized value. This patch contains the following changes. * makes ich_pata_cable_detect() use saved_iocfg. * make piix_iocfg_bit18_quirk() take @host and use saved_iocfg. * hpriv allocation moved upwards to save iocfg before doing anything else. This fixes bz#11879. Andreas Mohr reported and diagnosed the problem. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Andreas Mohr <andi@lisas.de> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-01-02 06:04:48 +03:00
.remove = piix_remove_one,
libata: add missing CONFIG_PM in LLDs Add missing #ifdef CONFIG_PM conditionals around all PM related parts in libata LLDs. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-03-02 11:31:26 +03:00
#ifdef CONFIG_PM
ata_piix: fix suspend/resume for some TOSHIBA laptops ACPI implementations in several TOSHIBA laptops are weird and burn cpu cycles for tens of seconds while trying to suspend if the PCI device for the ATA controller is disabled when the ACPI suspend is called. This patch uses DMI to match those machines and bypass device disable on those machines during suspend. As the device needs to be put into enabled state on resume without affecting PCI enable count, matching resume callback uses __pci_reenable_device(). This bug is reported in bugzilla bug 7780. http://bugzilla.kernel.org/show_bug.cgi?id=7780 Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-10 10:55:43 +04:00
.suspend = piix_pci_device_suspend,
.resume = piix_pci_device_resume,
libata: add missing CONFIG_PM in LLDs Add missing #ifdef CONFIG_PM conditionals around all PM related parts in libata LLDs. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-03-02 11:31:26 +03:00
#endif
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
};
[libata] eliminate use of drivers/scsi/scsi.h compatibility header/defines
2005-11-07 08:59:37 +03:00
static struct scsi_host_template piix_sht = {
libata: implement and use SHT initializers libata lets low level drivers build scsi_host_template and register it to the SCSI layer. This allows low level drivers high level of flexibility but also burdens them with lots of boilerplate entries. This patch implements SHT initializers which can be used to initialize all the boilerplate entries in a sht. Three variants of them are implemented - BASE, BMDMA and NCQ - for different types of drivers. Note that entries can be overriden by putting individual initializers after the helper macro. All sht tables are identical before and after this patch. Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-25 06:22:49 +03:00
ATA_BMDMA_SHT(DRV_NAME),
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
};
libata: implement spurious irq handling for SFF and apply it to piix Traditional IDE interface sucks in that it doesn't have a reliable IRQ pending bit, so if the controller raises IRQ while the driver is expecting it not to, the IRQ won't be cleared and eventually the IRQ line will be killed by interrupt subsystem. Some controllers have non-standard mechanism to indicate IRQ pending so that this condition can be detected and worked around. This patch adds an optional operation ->sff_irq_check() which will be called for each port from the ata_sff_interrupt() if an unexpected interrupt is received. If the operation returns %true, ->sff_check_status() and ->sff_irq_clear() will be cleared for the port. Note that this doesn't mark the interrupt as handled so it won't prevent IRQ subsystem from killing the IRQ if this mechanism fails to clear the spurious IRQ. This patch also implements ->sff_irq_check() for ata_piix. Note that this adds slight overhead to shared IRQ operation as IRQs which are destined for other controllers will trigger extra register accesses to check whether IDE interrupt is pending but this solves rare screaming IRQ cases and for some curious reason also helps weird BIOS related glitch on Samsung n130 as reported in bko#14314. http://bugzilla.kernel.org/show_bug.cgi?id=14314 * piix_base_ops dropped as suggested by Sergei. * Spurious IRQ detection doesn't kick in anymore if polling qc is in progress. This provides less protection but some controllers have possible data corruption issues if the wrong register is accessed while a command is in progress. Signed-off-by: Tejun Heo <tj@kernel.org> Reported-by: Johannes Stezenbach <js@sig21.net> Reported-by: Hans Werner <hwerner4@gmx.de> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-01-19 04:49:19 +03:00
static struct ata_port_operations piix_sata_ops = {
libata: Add 32bit PIO support This matters for some controllers and in one or two cases almost doubles PIO performance. Add a bmdma32 operations set we can inherit and activate it for some controllers Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-01-05 17:16:39 +03:00
.inherits = &ata_bmdma32_port_ops,
libata: implement spurious irq handling for SFF and apply it to piix Traditional IDE interface sucks in that it doesn't have a reliable IRQ pending bit, so if the controller raises IRQ while the driver is expecting it not to, the IRQ won't be cleared and eventually the IRQ line will be killed by interrupt subsystem. Some controllers have non-standard mechanism to indicate IRQ pending so that this condition can be detected and worked around. This patch adds an optional operation ->sff_irq_check() which will be called for each port from the ata_sff_interrupt() if an unexpected interrupt is received. If the operation returns %true, ->sff_check_status() and ->sff_irq_clear() will be cleared for the port. Note that this doesn't mark the interrupt as handled so it won't prevent IRQ subsystem from killing the IRQ if this mechanism fails to clear the spurious IRQ. This patch also implements ->sff_irq_check() for ata_piix. Note that this adds slight overhead to shared IRQ operation as IRQs which are destined for other controllers will trigger extra register accesses to check whether IDE interrupt is pending but this solves rare screaming IRQ cases and for some curious reason also helps weird BIOS related glitch on Samsung n130 as reported in bko#14314. http://bugzilla.kernel.org/show_bug.cgi?id=14314 * piix_base_ops dropped as suggested by Sergei. * Spurious IRQ detection doesn't kick in anymore if polling qc is in progress. This provides less protection but some controllers have possible data corruption issues if the wrong register is accessed while a command is in progress. Signed-off-by: Tejun Heo <tj@kernel.org> Reported-by: Johannes Stezenbach <js@sig21.net> Reported-by: Hans Werner <hwerner4@gmx.de> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-01-19 04:49:19 +03:00
.sff_irq_check = piix_irq_check,
};
static struct ata_port_operations piix_pata_ops = {
.inherits = &piix_sata_ops,
libata: implement and use ops inheritance libata lets low level drivers build ata_port_operations table and register it with libata core layer. This allows low level drivers high level of flexibility but also burdens them with lots of boilerplate entries. This becomes worse for drivers which support related similar controllers which differ slightly. They share most of the operations except for a few. However, the driver still needs to list all operations for each variant. This results in large number of duplicate entries, which is not only inefficient but also error-prone as it becomes very difficult to tell what the actual differences are. This duplicate boilerplates all over the low level drivers also make updating the core layer exteremely difficult and error-prone. When compounded with multi-branched development model, it ends up accumulating inconsistencies over time. Some of those inconsistencies cause immediate problems and fixed. Others just remain there dormant making maintenance increasingly difficult. To rectify the problem, this patch implements ata_port_operations inheritance. To allow LLDs to easily re-use their own ops tables overriding only specific methods, this patch implements poor man's class inheritance. An ops table has ->inherits field which can be set to any ops table as long as it doesn't create a loop. When the host is started, the inheritance chain is followed and any operation which isn't specified is taken from the nearest ancestor which has it specified. This operation is called finalization and done only once per an ops table and the LLD doesn't have to do anything special about it other than making the ops table non-const such that libata can update it. libata provides four base ops tables lower drivers can inherit from - base, sata, pmp, sff and bmdma. To avoid overriding these ops accidentaly, these ops are declared const and LLDs should always inherit these instead of using them directly. After finalization, all the ops table are identical before and after the patch except for setting .irq_handler to ata_interrupt in drivers which didn't use to. The .irq_handler doesn't have any actual effect and the field will soon be removed by later patch. * sata_sx4 is still using old style EH and currently doesn't take advantage of ops inheritance. Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-25 06:22:49 +03:00
.cable_detect = ata_cable_40wire,
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
.set_piomode = piix_set_piomode,
.set_dmamode = piix_set_dmamode,
libata: make reset related methods proper port operations Currently reset methods are not specified directly in the ata_port_operations table. If a LLD wants to use custom reset methods, it should construct and use a error_handler which uses those reset methods. It's done this way for two reasons. First, the ops table already contained too many methods and adding four more of them would noticeably increase the amount of necessary boilerplate code all over low level drivers. Second, as ->error_handler uses those reset methods, it can get confusing. ie. By overriding ->error_handler, those reset ops can be made useless making layering a bit hazy. Now that ops table uses inheritance, the first problem doesn't exist anymore. The second isn't completely solved but is relieved by providing default values - most drivers can just override what it has implemented and don't have to concern itself about higher level callbacks. In fact, there currently is no driver which actually modifies error handling behavior. Drivers which override ->error_handler just wraps the standard error handler only to prepare the controller for EH. I don't think making ops layering strict has any noticeable benefit. This patch makes ->prereset, ->softreset, ->hardreset, ->postreset and their PMP counterparts propoer ops. Default ops are provided in the base ops tables and drivers are converted to override individual reset methods instead of creating custom error_handler. * ata_std_error_handler() doesn't use sata_std_hardreset() if SCRs aren't accessible. sata_promise doesn't need to use separate error_handlers for PATA and SATA anymore. * softreset is broken for sata_inic162x and sata_sx4. As libata now always prefers hardreset, this doesn't really matter but the ops are forced to NULL using ATA_OP_NULL for documentation purpose. * pata_hpt374 needs to use different prereset for the first and second PCI functions. This used to be done by branching from hpt374_error_handler(). The proper way to do this is to use separate ops and port_info tables for each function. Converted. Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-25 06:22:50 +03:00
.prereset = piix_pata_prereset,
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
};
libata: implement and use ops inheritance libata lets low level drivers build ata_port_operations table and register it with libata core layer. This allows low level drivers high level of flexibility but also burdens them with lots of boilerplate entries. This becomes worse for drivers which support related similar controllers which differ slightly. They share most of the operations except for a few. However, the driver still needs to list all operations for each variant. This results in large number of duplicate entries, which is not only inefficient but also error-prone as it becomes very difficult to tell what the actual differences are. This duplicate boilerplates all over the low level drivers also make updating the core layer exteremely difficult and error-prone. When compounded with multi-branched development model, it ends up accumulating inconsistencies over time. Some of those inconsistencies cause immediate problems and fixed. Others just remain there dormant making maintenance increasingly difficult. To rectify the problem, this patch implements ata_port_operations inheritance. To allow LLDs to easily re-use their own ops tables overriding only specific methods, this patch implements poor man's class inheritance. An ops table has ->inherits field which can be set to any ops table as long as it doesn't create a loop. When the host is started, the inheritance chain is followed and any operation which isn't specified is taken from the nearest ancestor which has it specified. This operation is called finalization and done only once per an ops table and the LLD doesn't have to do anything special about it other than making the ops table non-const such that libata can update it. libata provides four base ops tables lower drivers can inherit from - base, sata, pmp, sff and bmdma. To avoid overriding these ops accidentaly, these ops are declared const and LLDs should always inherit these instead of using them directly. After finalization, all the ops table are identical before and after the patch except for setting .irq_handler to ata_interrupt in drivers which didn't use to. The .irq_handler doesn't have any actual effect and the field will soon be removed by later patch. * sata_sx4 is still using old style EH and currently doesn't take advantage of ops inheritance. Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-25 06:22:49 +03:00
static struct ata_port_operations piix_vmw_ops = {
.inherits = &piix_pata_ops,
.bmdma_status = piix_vmw_bmdma_status,
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
};
libata: implement and use ops inheritance libata lets low level drivers build ata_port_operations table and register it with libata core layer. This allows low level drivers high level of flexibility but also burdens them with lots of boilerplate entries. This becomes worse for drivers which support related similar controllers which differ slightly. They share most of the operations except for a few. However, the driver still needs to list all operations for each variant. This results in large number of duplicate entries, which is not only inefficient but also error-prone as it becomes very difficult to tell what the actual differences are. This duplicate boilerplates all over the low level drivers also make updating the core layer exteremely difficult and error-prone. When compounded with multi-branched development model, it ends up accumulating inconsistencies over time. Some of those inconsistencies cause immediate problems and fixed. Others just remain there dormant making maintenance increasingly difficult. To rectify the problem, this patch implements ata_port_operations inheritance. To allow LLDs to easily re-use their own ops tables overriding only specific methods, this patch implements poor man's class inheritance. An ops table has ->inherits field which can be set to any ops table as long as it doesn't create a loop. When the host is started, the inheritance chain is followed and any operation which isn't specified is taken from the nearest ancestor which has it specified. This operation is called finalization and done only once per an ops table and the LLD doesn't have to do anything special about it other than making the ops table non-const such that libata can update it. libata provides four base ops tables lower drivers can inherit from - base, sata, pmp, sff and bmdma. To avoid overriding these ops accidentaly, these ops are declared const and LLDs should always inherit these instead of using them directly. After finalization, all the ops table are identical before and after the patch except for setting .irq_handler to ata_interrupt in drivers which didn't use to. The .irq_handler doesn't have any actual effect and the field will soon be removed by later patch. * sata_sx4 is still using old style EH and currently doesn't take advantage of ops inheritance. Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-25 06:22:49 +03:00
static struct ata_port_operations ich_pata_ops = {
.inherits = &piix_pata_ops,
.cable_detect = ich_pata_cable_detect,
.set_dmamode = ich_set_dmamode,
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
};
ata_piix: implement LPM support Now that DIPM can be used independently from HIPM, ata_piix can support LPM too. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-09-01 19:50:08 +04:00
static struct device_attribute *piix_sidpr_shost_attrs[] = {
&dev_attr_link_power_management_policy,
NULL
};
static struct scsi_host_template piix_sidpr_sht = {
ATA_BMDMA_SHT(DRV_NAME),
.shost_attrs = piix_sidpr_shost_attrs,
};
libata: implement and use ops inheritance libata lets low level drivers build ata_port_operations table and register it with libata core layer. This allows low level drivers high level of flexibility but also burdens them with lots of boilerplate entries. This becomes worse for drivers which support related similar controllers which differ slightly. They share most of the operations except for a few. However, the driver still needs to list all operations for each variant. This results in large number of duplicate entries, which is not only inefficient but also error-prone as it becomes very difficult to tell what the actual differences are. This duplicate boilerplates all over the low level drivers also make updating the core layer exteremely difficult and error-prone. When compounded with multi-branched development model, it ends up accumulating inconsistencies over time. Some of those inconsistencies cause immediate problems and fixed. Others just remain there dormant making maintenance increasingly difficult. To rectify the problem, this patch implements ata_port_operations inheritance. To allow LLDs to easily re-use their own ops tables overriding only specific methods, this patch implements poor man's class inheritance. An ops table has ->inherits field which can be set to any ops table as long as it doesn't create a loop. When the host is started, the inheritance chain is followed and any operation which isn't specified is taken from the nearest ancestor which has it specified. This operation is called finalization and done only once per an ops table and the LLD doesn't have to do anything special about it other than making the ops table non-const such that libata can update it. libata provides four base ops tables lower drivers can inherit from - base, sata, pmp, sff and bmdma. To avoid overriding these ops accidentaly, these ops are declared const and LLDs should always inherit these instead of using them directly. After finalization, all the ops table are identical before and after the patch except for setting .irq_handler to ata_interrupt in drivers which didn't use to. The .irq_handler doesn't have any actual effect and the field will soon be removed by later patch. * sata_sx4 is still using old style EH and currently doesn't take advantage of ops inheritance. Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-25 06:22:49 +03:00
static struct ata_port_operations piix_sidpr_sata_ops = {
.inherits = &piix_sata_ops,
libata: implement and use sata_std_hardreset() Implement sata_std_hardreset(), which simply wraps around sata_link_hardreset(). sata_std_hardreset() becomes new standard hardreset method for sata_port_ops and sata_sff_hardreset() moves from ata_base_port_ops to ata_sff_port_ops, which is where it really belongs. ata_is_builtin_hardreset() is added so that both ata_std_error_handler() and ata_sff_error_handler() skip both builtin hardresets if SCR isn't accessible. piix_sidpr_hardreset() in ata_piix.c is identical to sata_std_hardreset() in functionality and got replaced with the standard function. Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-04-07 17:47:19 +04:00
.hardreset = sata_std_hardreset,
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
.scr_read = piix_sidpr_scr_read,
.scr_write = piix_sidpr_scr_write,
ata_piix: implement LPM support Now that DIPM can be used independently from HIPM, ata_piix can support LPM too. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-09-01 19:50:08 +04:00
.set_lpm = piix_sidpr_set_lpm,
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
};
[PATCH] ata_piix: add host_set private structure Add host_set private structure piix_host_priv. Currently the only field is ->map which used to be stored directly at host_set->private_data. This change allows more host_set private fields to be added. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-06-28 20:58:28 +04:00
static const struct piix_map_db ich5_map_db = {
[PATCH] ata_piix: implement proper port map Replace combined mode handling via PIIX_COMB/COMB_PATA_P0 with proper port map. PIIX now prints port configuration during initialization. ATA_FLAG_SLAVE_POSS is now turned on for SATA ports only when the slave device is actually avaliable. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
.mask = 0x7,
[libata] ata_piix: Consolidate PCS register writing Prior to this patch, the driver would do this for each port: read 8-bit PCS write 8-bit PCS read 8-bit PCS write 8-bit PCS In the field, flaky behavior has been observed related to this register. In particular, these overzealous register writes can cause misdetection problems. Update to do the following once (not once per port) at boot: read 16-bit PCS if needs changing, write 16-bit PCS And thereafter, we only perform a 'read 16-bit PCS' per port. This should eliminate all PCS writes in many cases, and be more friendly in the cases where we do need to enable ports. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-07-11 19:48:50 +04:00
.port_enable = 0x3,
[PATCH] ata_piix: implement proper port map Replace combined mode handling via PIIX_COMB/COMB_PATA_P0 with proper port map. PIIX now prints port configuration during initialization. ATA_FLAG_SLAVE_POSS is now turned on for SATA ports only when the slave device is actually avaliable. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
.map = {
/* PM PS SM SS MAP */
{ P0, NA, P1, NA }, /* 000b */
{ P1, NA, P0, NA }, /* 001b */
{ RV, RV, RV, RV },
{ RV, RV, RV, RV },
{ P0, P1, IDE, IDE }, /* 100b */
{ P1, P0, IDE, IDE }, /* 101b */
{ IDE, IDE, P0, P1 }, /* 110b */
{ IDE, IDE, P1, P0 }, /* 111b */
},
};
[PATCH] ata_piix: add host_set private structure Add host_set private structure piix_host_priv. Currently the only field is ->map which used to be stored directly at host_set->private_data. This change allows more host_set private fields to be added. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-06-28 20:58:28 +04:00
static const struct piix_map_db ich6_map_db = {
[PATCH] ata_piix: implement proper port map Replace combined mode handling via PIIX_COMB/COMB_PATA_P0 with proper port map. PIIX now prints port configuration during initialization. ATA_FLAG_SLAVE_POSS is now turned on for SATA ports only when the slave device is actually avaliable. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
.mask = 0x3,
[libata] ata_piix: Consolidate PCS register writing Prior to this patch, the driver would do this for each port: read 8-bit PCS write 8-bit PCS read 8-bit PCS write 8-bit PCS In the field, flaky behavior has been observed related to this register. In particular, these overzealous register writes can cause misdetection problems. Update to do the following once (not once per port) at boot: read 16-bit PCS if needs changing, write 16-bit PCS And thereafter, we only perform a 'read 16-bit PCS' per port. This should eliminate all PCS writes in many cases, and be more friendly in the cases where we do need to enable ports. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-07-11 19:48:50 +04:00
.port_enable = 0xf,
[PATCH] ata_piix: implement proper port map Replace combined mode handling via PIIX_COMB/COMB_PATA_P0 with proper port map. PIIX now prints port configuration during initialization. ATA_FLAG_SLAVE_POSS is now turned on for SATA ports only when the slave device is actually avaliable. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
.map = {
/* PM PS SM SS MAP */
[PATCH] ata_piix: fix ich6/m_map_db MAP tables of ich6 and ich6m are wrong. Depending on port usage, ata_piix may fail to initialize attached devices. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-03-31 15:01:50 +04:00
{ P0, P2, P1, P3 }, /* 00b */
[PATCH] ata_piix: implement proper port map Replace combined mode handling via PIIX_COMB/COMB_PATA_P0 with proper port map. PIIX now prints port configuration during initialization. ATA_FLAG_SLAVE_POSS is now turned on for SATA ports only when the slave device is actually avaliable. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
{ IDE, IDE, P1, P3 }, /* 01b */
{ P0, P2, IDE, IDE }, /* 10b */
{ RV, RV, RV, RV },
},
};
[PATCH] ata_piix: add host_set private structure Add host_set private structure piix_host_priv. Currently the only field is ->map which used to be stored directly at host_set->private_data. This change allows more host_set private fields to be added. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-06-28 20:58:28 +04:00
static const struct piix_map_db ich6m_map_db = {
[PATCH] ata_piix: implement proper port map Replace combined mode handling via PIIX_COMB/COMB_PATA_P0 with proper port map. PIIX now prints port configuration during initialization. ATA_FLAG_SLAVE_POSS is now turned on for SATA ports only when the slave device is actually avaliable. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
.mask = 0x3,
[libata] ata_piix: Consolidate PCS register writing Prior to this patch, the driver would do this for each port: read 8-bit PCS write 8-bit PCS read 8-bit PCS write 8-bit PCS In the field, flaky behavior has been observed related to this register. In particular, these overzealous register writes can cause misdetection problems. Update to do the following once (not once per port) at boot: read 16-bit PCS if needs changing, write 16-bit PCS And thereafter, we only perform a 'read 16-bit PCS' per port. This should eliminate all PCS writes in many cases, and be more friendly in the cases where we do need to enable ports. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-07-11 19:48:50 +04:00
.port_enable = 0x5,
[PATCH] ata_piix: add map 01b for ICH7M Although the document says otherwise, some ich7m uses map 01b. This patch adds separate map DB for ICH7M and adds map entry for 01b. This was spotted on an ASUS laptop by Jonathan Dieter. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Jonathan Dieter <jdieter@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-09-11 01:29:03 +04:00
/* Map 01b isn't specified in the doc but some notebooks use
[PATCH] ata_piix: allow 01b MAP for both ICH6M and ICH7M ICH7M was separated from ICH6M to allow undocumented MAP value 01b which was spotted on an ASUS notebook. However, there is also notebooks with MAP value 01b on ICH6M. This patch re-merges ICH6M and ICH7M entries and allows MAP value 01b for both. This problem has been reported and initial patch provided by Jonathan Dieter. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Jonathan Dieter <jdieter@gmail.com> Cc: Tom Deblauwe <tom.deblauwe@telenet.be> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-10-09 08:23:58 +04:00
* it anyway. MAP 01b have been spotted on both ICH6M and
* ICH7M.
[PATCH] ata_piix: add map 01b for ICH7M Although the document says otherwise, some ich7m uses map 01b. This patch adds separate map DB for ICH7M and adds map entry for 01b. This was spotted on an ASUS laptop by Jonathan Dieter. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Jonathan Dieter <jdieter@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-09-11 01:29:03 +04:00
*/
.map = {
/* PM PS SM SS MAP */
ata_piix: kill incorrect invalid map value warning The last two slots of MAP 00b of ich6m was incorrectly marked as reserved. This is left over from converting the entry to allow 00b. This causes no real problem. It only makes the driver print annoying warning message. Fix it. [patch also proferred by Pierre Tardy at the end of 2006 -jg] Signed-off-by: Tejun Heo <htejun@gmail.com> -- drivers/ata/ata_piix.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-10 12:58:21 +04:00
{ P0, P2, NA, NA }, /* 00b */
[PATCH] ata_piix: add map 01b for ICH7M Although the document says otherwise, some ich7m uses map 01b. This patch adds separate map DB for ICH7M and adds map entry for 01b. This was spotted on an ASUS laptop by Jonathan Dieter. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Jonathan Dieter <jdieter@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-09-11 01:29:03 +04:00
{ IDE, IDE, P1, P3 }, /* 01b */
{ P0, P2, IDE, IDE }, /* 10b */
{ RV, RV, RV, RV },
},
};
[libata] ata_piix: attempt to fix ICH8 support Take into account the fact that ICH8 changed the register layout of the MAP and PCS register bits. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-07-11 19:57:44 +04:00
static const struct piix_map_db ich8_map_db = {
.mask = 0x3,
ata_piix: port enable for the first SATA controller of ICH8 is 0xf not 0x3 ICH8 and 9 use two SFF controllers to show 6 SATA ports. The first controllre hosts the first 4 ports while the second one hosts the last 2. The PCS register of the first controller encompasses the first four ports or all six ports depending on configuration while PCS of the second controller controls the last two ports. Using 0xf for the first controller and 0x3 for the second controller always result in the correct configuration. Signed-off-by: Tejun Heo <htejun@gmail.com>
2007-11-19 06:06:37 +03:00
.port_enable = 0xf,
[libata] ata_piix: attempt to fix ICH8 support Take into account the fact that ICH8 changed the register layout of the MAP and PCS register bits. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-07-11 19:57:44 +04:00
.map = {
/* PM PS SM SS MAP */
[PATCH] libata: use correct map_db values for ICH8 Use valid values for ICH8 map_db. With the old values, when the controller was in Native mode, and SCC was 1 (drives configured for IDE), any drive plugged into a slave port was not recognized. For Combined Mode (and SCC is still 1), 2 is a value value for MAP.map_value, and needs to be recognized. Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-10-20 00:27:39 +04:00
{ P0, P2, P1, P3 }, /* 00b (hardwired when in AHCI) */
[libata] ata_piix: attempt to fix ICH8 support Take into account the fact that ICH8 changed the register layout of the MAP and PCS register bits. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-07-11 19:57:44 +04:00
{ RV, RV, RV, RV },
ata_piix: update map 10b for ich8m Fix map entry 10b for ich8. It's [P0 P2 IDE IDE] like ich6 / ich6m. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: <Kristen Carlson Accardi> kristen.c.accardi@intel.com Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-06 21:43:27 +04:00
{ P0, P2, IDE, IDE }, /* 10b (IDE mode) */
[libata] ata_piix: attempt to fix ICH8 support Take into account the fact that ICH8 changed the register layout of the MAP and PCS register bits. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-07-11 19:57:44 +04:00
{ RV, RV, RV, RV },
},
};
ata_piix: reorganize controller IDs Move piix_pata_mwdma to top, rename ich9_2port_sata to ich8_2port_sata for consistency and use automatically incremented values instead of assigning fixed values to ease adding new controller IDs. Signed-off-by: Tejun Heo <htejun@gmail.com>
2007-11-19 05:24:25 +03:00
static const struct piix_map_db ich8_2port_map_db = {
ata_piix: replace spaces with tabs This patch removes some incorrect formatting spaces and replaces them with tabs. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-09-08 04:21:03 +04:00
.mask = 0x3,
.port_enable = 0x3,
.map = {
/* PM PS SM SS MAP */
{ P0, NA, P1, NA }, /* 00b */
{ RV, RV, RV, RV }, /* 01b */
{ RV, RV, RV, RV }, /* 10b */
{ RV, RV, RV, RV },
},
ata_piix: IDE mode SATA patch for Intel Tolapai Resend trying to remove 8-bit characters in the email. This patch adds the Intel Tolapai IDE mode SATA controller DID's. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-31 08:36:56 +04:00
};
ata_piix: only enable the first port on apple macbook pro ICH8M on apple macbook pro occasionally locks up completely during PCS initialization if ports other than the first one are enabled. Add a separate controller ID and only enable the first port. tj: commit description added and patch updated to fit with the previous controller ID update. Signed-off-by: Thomas Rohwer <tr@tng.de> Signed-off-by: Tejun Heo <htejun@gmail.com>
2007-11-19 05:54:24 +03:00
static const struct piix_map_db ich8m_apple_map_db = {
.mask = 0x3,
.port_enable = 0x1,
.map = {
/* PM PS SM SS MAP */
{ P0, NA, NA, NA }, /* 00b */
{ RV, RV, RV, RV },
{ P0, P2, IDE, IDE }, /* 10b */
{ RV, RV, RV, RV },
},
};
ata_piix: reorganize controller IDs Move piix_pata_mwdma to top, rename ich9_2port_sata to ich8_2port_sata for consistency and use automatically incremented values instead of assigning fixed values to ease adding new controller IDs. Signed-off-by: Tejun Heo <htejun@gmail.com>
2007-11-19 05:24:25 +03:00
static const struct piix_map_db tolapai_map_db = {
ata_piix: SATA 2port controller port map fix This patch adds a port map for ICH9 and ICH8 SATA controllers that have only 2 ports available in that mode. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 03:05:15 +04:00
.mask = 0x3,
.port_enable = 0x3,
.map = {
/* PM PS SM SS MAP */
{ P0, NA, P1, NA }, /* 00b */
{ RV, RV, RV, RV }, /* 01b */
{ RV, RV, RV, RV }, /* 10b */
{ RV, RV, RV, RV },
},
};
[PATCH] ata_piix: add host_set private structure Add host_set private structure piix_host_priv. Currently the only field is ->map which used to be stored directly at host_set->private_data. This change allows more host_set private fields to be added. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-06-28 20:58:28 +04:00
static const struct piix_map_db *piix_map_db_table[] = {
[ich5_sata] = &ich5_map_db,
[ich6_sata] = &ich6_map_db,
ata_piix: kill ich6_sata_ahci and clean up ich6_sata_ahci and ich6_sata are identical. Kill ich6_sata_ahci and drop _ahci postfixes from controller ids, which doesn't really mean anything at this point. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 10:00:58 +03:00
[ich6m_sata] = &ich6m_map_db,
[ich8_sata] = &ich8_map_db,
ata_piix: reorganize controller IDs Move piix_pata_mwdma to top, rename ich9_2port_sata to ich8_2port_sata for consistency and use automatically incremented values instead of assigning fixed values to ease adding new controller IDs. Signed-off-by: Tejun Heo <htejun@gmail.com>
2007-11-19 05:24:25 +03:00
[ich8_2port_sata] = &ich8_2port_map_db,
ata_piix: kill ich6_sata_ahci and clean up ich6_sata_ahci and ich6_sata are identical. Kill ich6_sata_ahci and drop _ahci postfixes from controller ids, which doesn't really mean anything at this point. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 10:00:58 +03:00
[ich8m_apple_sata] = &ich8m_apple_map_db,
[tolapai_sata] = &tolapai_map_db,
[PATCH] ata_piix: add host_set private structure Add host_set private structure piix_host_priv. Currently the only field is ->map which used to be stored directly at host_set->private_data. This change allows more host_set private fields to be added. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-06-28 20:58:28 +04:00
};
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
static struct ata_port_info piix_port_info[] = {
ata_piix: reorganize controller IDs Move piix_pata_mwdma to top, rename ich9_2port_sata to ich8_2port_sata for consistency and use automatically incremented values instead of assigning fixed values to ease adding new controller IDs. Signed-off-by: Tejun Heo <htejun@gmail.com>
2007-11-19 05:24:25 +03:00
[piix_pata_mwdma] = /* PIIX3 MWDMA only */
{
.flags = PIIX_PATA_FLAGS,
[libata] convert drivers to use ata.h mode mask defines No functional changes in this patch. Signed-off-by: Erik Inge Bolsø <knan-lkml@anduin.net> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-14 23:38:24 +03:00
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
ata_piix: reorganize controller IDs Move piix_pata_mwdma to top, rename ich9_2port_sata to ich8_2port_sata for consistency and use automatically incremented values instead of assigning fixed values to ease adding new controller IDs. Signed-off-by: Tejun Heo <htejun@gmail.com>
2007-11-19 05:24:25 +03:00
.port_ops = &piix_pata_ops,
},
[libata] ata_piix: Use more-robust form of array initialization Use a form of array init that is less fragile, less sensitive to trivial typos and ordering mismatches. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-09-01 15:17:36 +04:00
[piix_pata_33] = /* PIIX4 at 33MHz */
[PATCH] ata_piix: finer-grained port_info Make port_info finer-grained. This patch doesn't cause any functional change. Later init reimplementation will make use of it. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
{
[PATCH] ata_piix: clean up port flags * move common flags into PIIX_PATA_FLAGS and PIIX_SATA_FLAGS * kill unnecessary ATA_FLAG_SRST Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-11-10 12:08:10 +03:00
.flags = PIIX_PATA_FLAGS,
[libata] convert drivers to use ata.h mode mask defines No functional changes in this patch. Signed-off-by: Erik Inge Bolsø <knan-lkml@anduin.net> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-14 23:38:24 +03:00
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
.udma_mask = ATA_UDMA2,
[PATCH] ata_piix: finer-grained port_info Make port_info finer-grained. This patch doesn't cause any functional change. Later init reimplementation will make use of it. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
.port_ops = &piix_pata_ops,
},
[libata] ata_piix: Use more-robust form of array initialization Use a form of array init that is less fragile, less sensitive to trivial typos and ordering mismatches. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-09-01 15:17:36 +04:00
[ich_pata_33] = /* ICH0 - ICH at 33Mhz*/
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
{
[PATCH] ata_piix: clean up port flags * move common flags into PIIX_PATA_FLAGS and PIIX_SATA_FLAGS * kill unnecessary ATA_FLAG_SRST Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-11-10 12:08:10 +03:00
.flags = PIIX_PATA_FLAGS,
[libata] convert drivers to use ata.h mode mask defines No functional changes in this patch. Signed-off-by: Erik Inge Bolsø <knan-lkml@anduin.net> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-14 23:38:24 +03:00
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA12_ONLY, /* Check: maybe MWDMA0 is ok */
.udma_mask = ATA_UDMA2,
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
.port_ops = &ich_pata_ops,
},
[libata] ata_piix: Use more-robust form of array initialization Use a form of array init that is less fragile, less sensitive to trivial typos and ordering mismatches. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-09-01 15:17:36 +04:00
[ich_pata_66] = /* ICH controllers up to 66MHz */
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
{
[PATCH] ata_piix: clean up port flags * move common flags into PIIX_PATA_FLAGS and PIIX_SATA_FLAGS * kill unnecessary ATA_FLAG_SRST Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-11-10 12:08:10 +03:00
.flags = PIIX_PATA_FLAGS,
[libata] convert drivers to use ata.h mode mask defines No functional changes in this patch. Signed-off-by: Erik Inge Bolsø <knan-lkml@anduin.net> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-14 23:38:24 +03:00
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA12_ONLY, /* MWDMA0 is broken on chip */
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
.udma_mask = ATA_UDMA4,
.port_ops = &ich_pata_ops,
},
[libata #pata-drivers] Trim trailing whitespace.
2006-08-31 08:03:49 +04:00
[libata] ata_piix: Use more-robust form of array initialization Use a form of array init that is less fragile, less sensitive to trivial typos and ordering mismatches. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-09-01 15:17:36 +04:00
[ich_pata_100] =
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
{
[PATCH] ata_piix: clean up port flags * move common flags into PIIX_PATA_FLAGS and PIIX_SATA_FLAGS * kill unnecessary ATA_FLAG_SRST Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-11-10 12:08:10 +03:00
.flags = PIIX_PATA_FLAGS | PIIX_FLAG_CHECKINTR,
[libata] convert drivers to use ata.h mode mask defines No functional changes in this patch. Signed-off-by: Erik Inge Bolsø <knan-lkml@anduin.net> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-14 23:38:24 +03:00
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA12_ONLY,
.udma_mask = ATA_UDMA5,
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
.port_ops = &ich_pata_ops,
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
},
ata_piix: ICH7 does not support correct MWDMA timings See Errata documentation. The recommended workaround is to use PIO4 instead which will we automatically do by flagging this mode not available. Signed-off-by: Alan Cox <alan.cox@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-05-06 20:08:44 +04:00
[ich_pata_100_nomwdma1] =
{
.flags = PIIX_PATA_FLAGS | PIIX_FLAG_CHECKINTR,
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA2_ONLY,
.udma_mask = ATA_UDMA5,
.port_ops = &ich_pata_ops,
},
[libata] ata_piix: Use more-robust form of array initialization Use a form of array init that is less fragile, less sensitive to trivial typos and ordering mismatches. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-09-01 15:17:36 +04:00
[ich5_sata] =
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
{
[PATCH] ata_piix: apply device detection via polling IDENTIFY PATA PIIX uses reset signature + TF r/w test for device presence detection, which doesn't always work. It sometimes reports phantom device which results in IDENTIFY timeouts. SATA PIIX uses some combination of PCS + reset signature + TF r/w test for device presence detection. No combination satifies all and for some controllers, there doesn't seem to be any combination which works reliably. This patch makes both PATA and SATA piix's use reset signature + TF r/w + polling IDENTIFY for device detection. This is what the old libata (before irq-pio and new EH) did and what IDE does. This patch also removes now obsolete PIIX_FLAG_IGNORE_PCS, force_pcs and related code. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-11-10 12:08:10 +03:00
.flags = PIIX_SATA_FLAGS,
[libata] convert drivers to use ata.h mode mask defines No functional changes in this patch. Signed-off-by: Erik Inge Bolsø <knan-lkml@anduin.net> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-14 23:38:24 +03:00
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA2,
[libata] Use ATA_UDMAx standard masks when filling driver's udma_mask info The ATA_UDMAx masks are self-documenting, and far better than manually writing in the hex mask. Note that pata_it8213 mask differed from the comment. Added a FIXME there. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-09 20:16:50 +04:00
.udma_mask = ATA_UDMA6,
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
.port_ops = &piix_sata_ops,
},
[libata] ata_piix: Use more-robust form of array initialization Use a form of array init that is less fragile, less sensitive to trivial typos and ordering mismatches. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-09-01 15:17:36 +04:00
[ich6_sata] =
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
{
ata_piix: kill unused constants and flags Kill PIIX_FLAG_SCR, PIIX_PORT_ENABLED and PIIX_PORT_PRESENT. These are unused. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-04 12:42:20 +03:00
.flags = PIIX_SATA_FLAGS,
[libata] convert drivers to use ata.h mode mask defines No functional changes in this patch. Signed-off-by: Erik Inge Bolsø <knan-lkml@anduin.net> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-14 23:38:24 +03:00
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA2,
[libata] Use ATA_UDMAx standard masks when filling driver's udma_mask info The ATA_UDMAx masks are self-documenting, and far better than manually writing in the hex mask. Note that pata_it8213 mask differed from the comment. Added a FIXME there. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-09 20:16:50 +04:00
.udma_mask = ATA_UDMA6,
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
.port_ops = &piix_sata_ops,
},
ata_piix: kill ich6_sata_ahci and clean up ich6_sata_ahci and ich6_sata are identical. Kill ich6_sata_ahci and drop _ahci postfixes from controller ids, which doesn't really mean anything at this point. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 10:00:58 +03:00
[ich6m_sata] =
[PATCH] ata_piix: IDE mode SATA patch for Intel ESB2 This patch adds the Intel ESB2 DID's to the ata_piix.c and quirks.c file for IDE mode SATA support. Signed-off-by: Jason Gaston <Jason.d.gaston@intel.com> Cc: Jeff Garzik <jgarzik@pobox.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-04-17 02:24:44 +04:00
{
ata_piix: don't attach to ICH6M in ahci mode ata_piix when attached to ICH6M in AHCI mode doesn't provide any benefit over using ahci and has detection problems. Don't let ata_piix claim ICH6M if it's in AHCI mode. This change makes ICH6R the only one which ata_piix can attach to even when it's in ahci mode which is necessary as some devices don't work properly under ahci mode. Drop PIIX_FLAG_AHCI and match the controller directly so that piix_disable_ahci() is called only for it. This change makes PIIX_SCC no longer used and it gets dropped too. This fixes bz 9491. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Robert M. Albrecht <romal@gmx.de> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 09:46:58 +03:00
.flags = PIIX_SATA_FLAGS,
[libata] convert drivers to use ata.h mode mask defines No functional changes in this patch. Signed-off-by: Erik Inge Bolsø <knan-lkml@anduin.net> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-14 23:38:24 +03:00
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA2,
[libata] Use ATA_UDMAx standard masks when filling driver's udma_mask info The ATA_UDMAx masks are self-documenting, and far better than manually writing in the hex mask. Note that pata_it8213 mask differed from the comment. Added a FIXME there. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-09 20:16:50 +04:00
.udma_mask = ATA_UDMA6,
[PATCH] ata_piix: IDE mode SATA patch for Intel ESB2 This patch adds the Intel ESB2 DID's to the ata_piix.c and quirks.c file for IDE mode SATA support. Signed-off-by: Jason Gaston <Jason.d.gaston@intel.com> Cc: Jeff Garzik <jgarzik@pobox.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-04-17 02:24:44 +04:00
.port_ops = &piix_sata_ops,
},
[PATCH] ata_piix: finer-grained port_info Make port_info finer-grained. This patch doesn't cause any functional change. Later init reimplementation will make use of it. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
ata_piix: kill ich6_sata_ahci and clean up ich6_sata_ahci and ich6_sata are identical. Kill ich6_sata_ahci and drop _ahci postfixes from controller ids, which doesn't really mean anything at this point. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 10:00:58 +03:00
[ich8_sata] =
[libata] ata_piix: attempt to fix ICH8 support Take into account the fact that ICH8 changed the register layout of the MAP and PCS register bits. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-07-11 19:57:44 +04:00
{
ata_piix: don't attach to ICH6M in ahci mode ata_piix when attached to ICH6M in AHCI mode doesn't provide any benefit over using ahci and has detection problems. Don't let ata_piix claim ICH6M if it's in AHCI mode. This change makes ICH6R the only one which ata_piix can attach to even when it's in ahci mode which is necessary as some devices don't work properly under ahci mode. Drop PIIX_FLAG_AHCI and match the controller directly so that piix_disable_ahci() is called only for it. This change makes PIIX_SCC no longer used and it gets dropped too. This fixes bz 9491. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Robert M. Albrecht <romal@gmx.de> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 09:46:58 +03:00
.flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR,
[libata] convert drivers to use ata.h mode mask defines No functional changes in this patch. Signed-off-by: Erik Inge Bolsø <knan-lkml@anduin.net> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-14 23:38:24 +03:00
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA2,
[libata] Use ATA_UDMAx standard masks when filling driver's udma_mask info The ATA_UDMAx masks are self-documenting, and far better than manually writing in the hex mask. Note that pata_it8213 mask differed from the comment. Added a FIXME there. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-09 20:16:50 +04:00
.udma_mask = ATA_UDMA6,
[libata] ata_piix: attempt to fix ICH8 support Take into account the fact that ICH8 changed the register layout of the MAP and PCS register bits. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-07-11 19:57:44 +04:00
.port_ops = &piix_sata_ops,
},
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
ata_piix: reorganize controller IDs Move piix_pata_mwdma to top, rename ich9_2port_sata to ich8_2port_sata for consistency and use automatically incremented values instead of assigning fixed values to ease adding new controller IDs. Signed-off-by: Tejun Heo <htejun@gmail.com>
2007-11-19 05:24:25 +03:00
[ich8_2port_sata] =
ata_piix: IDE mode SATA patch for Intel Tolapai Resend trying to remove 8-bit characters in the email. This patch adds the Intel Tolapai IDE mode SATA controller DID's. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-31 08:36:56 +04:00
{
ata_piix: don't attach to ICH6M in ahci mode ata_piix when attached to ICH6M in AHCI mode doesn't provide any benefit over using ahci and has detection problems. Don't let ata_piix claim ICH6M if it's in AHCI mode. This change makes ICH6R the only one which ata_piix can attach to even when it's in ahci mode which is necessary as some devices don't work properly under ahci mode. Drop PIIX_FLAG_AHCI and match the controller directly so that piix_disable_ahci() is called only for it. This change makes PIIX_SCC no longer used and it gets dropped too. This fixes bz 9491. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Robert M. Albrecht <romal@gmx.de> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 09:46:58 +03:00
.flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR,
[libata] convert drivers to use ata.h mode mask defines No functional changes in this patch. Signed-off-by: Erik Inge Bolsø <knan-lkml@anduin.net> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-14 23:38:24 +03:00
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA2,
ata_piix: IDE mode SATA patch for Intel Tolapai Resend trying to remove 8-bit characters in the email. This patch adds the Intel Tolapai IDE mode SATA controller DID's. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-31 08:36:56 +04:00
.udma_mask = ATA_UDMA6,
.port_ops = &piix_sata_ops,
},
ata_piix: SATA 2port controller port map fix This patch adds a port map for ICH9 and ICH8 SATA controllers that have only 2 ports available in that mode. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 03:05:15 +04:00
ata_piix: kill ich6_sata_ahci and clean up ich6_sata_ahci and ich6_sata are identical. Kill ich6_sata_ahci and drop _ahci postfixes from controller ids, which doesn't really mean anything at this point. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 10:00:58 +03:00
[tolapai_sata] =
ata_piix: SATA 2port controller port map fix This patch adds a port map for ICH9 and ICH8 SATA controllers that have only 2 ports available in that mode. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 03:05:15 +04:00
{
ata_piix: don't attach to ICH6M in ahci mode ata_piix when attached to ICH6M in AHCI mode doesn't provide any benefit over using ahci and has detection problems. Don't let ata_piix claim ICH6M if it's in AHCI mode. This change makes ICH6R the only one which ata_piix can attach to even when it's in ahci mode which is necessary as some devices don't work properly under ahci mode. Drop PIIX_FLAG_AHCI and match the controller directly so that piix_disable_ahci() is called only for it. This change makes PIIX_SCC no longer used and it gets dropped too. This fixes bz 9491. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Robert M. Albrecht <romal@gmx.de> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 09:46:58 +03:00
.flags = PIIX_SATA_FLAGS,
[libata] convert drivers to use ata.h mode mask defines No functional changes in this patch. Signed-off-by: Erik Inge Bolsø <knan-lkml@anduin.net> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-14 23:38:24 +03:00
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA2,
ata_piix: SATA 2port controller port map fix This patch adds a port map for ICH9 and ICH8 SATA controllers that have only 2 ports available in that mode. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-12 03:05:15 +04:00
.udma_mask = ATA_UDMA6,
.port_ops = &piix_sata_ops,
},
ata_piix: only enable the first port on apple macbook pro ICH8M on apple macbook pro occasionally locks up completely during PCS initialization if ports other than the first one are enabled. Add a separate controller ID and only enable the first port. tj: commit description added and patch updated to fit with the previous controller ID update. Signed-off-by: Thomas Rohwer <tr@tng.de> Signed-off-by: Tejun Heo <htejun@gmail.com>
2007-11-19 05:54:24 +03:00
ata_piix: kill ich6_sata_ahci and clean up ich6_sata_ahci and ich6_sata are identical. Kill ich6_sata_ahci and drop _ahci postfixes from controller ids, which doesn't really mean anything at this point. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 10:00:58 +03:00
[ich8m_apple_sata] =
ata_piix: only enable the first port on apple macbook pro ICH8M on apple macbook pro occasionally locks up completely during PCS initialization if ports other than the first one are enabled. Add a separate controller ID and only enable the first port. tj: commit description added and patch updated to fit with the previous controller ID update. Signed-off-by: Thomas Rohwer <tr@tng.de> Signed-off-by: Tejun Heo <htejun@gmail.com>
2007-11-19 05:54:24 +03:00
{
ata_piix: fix macbook ich8m problems ICH8M on macbooks are peculiar in that some of them lock up when the second port is enabled, some return bogus values on SIDPR access while yet others hang on SIDPR access. Also, the ich8m_apple_sata entry was wrongly added below generic ich8m entry making it virtually useless. This patch works around macbook ich8m problems by * moving ich8m_apple_sata entry above generic ich8m entry * dropping PIIX_FLAG_SIDPR from ich8m_apple_sata * adding subsystem 106b:00a1 as ich8m_apple_sata Reported and tested by MATSUBAYASHI. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: MATSUBAYASHI 'Shaolin' Kohji <shaolin@rhythmaning.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-05-29 17:04:22 +04:00
.flags = PIIX_SATA_FLAGS,
[libata] convert drivers to use ata.h mode mask defines No functional changes in this patch. Signed-off-by: Erik Inge Bolsø <knan-lkml@anduin.net> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-14 23:38:24 +03:00
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA2,
ata_piix: only enable the first port on apple macbook pro ICH8M on apple macbook pro occasionally locks up completely during PCS initialization if ports other than the first one are enabled. Add a separate controller ID and only enable the first port. tj: commit description added and patch updated to fit with the previous controller ID update. Signed-off-by: Thomas Rohwer <tr@tng.de> Signed-off-by: Tejun Heo <htejun@gmail.com>
2007-11-19 05:54:24 +03:00
.udma_mask = ATA_UDMA6,
.port_ops = &piix_sata_ops,
},
ata_piix: ignore ATA_DMA_ERR on vmware ich4 VMware ich4 emulation incorrectly sets DMA_ERR on TF error. Ignore it. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-07 13:38:53 +03:00
[piix_pata_vmw] =
{
.flags = PIIX_PATA_FLAGS,
[libata] convert drivers to use ata.h mode mask defines No functional changes in this patch. Signed-off-by: Erik Inge Bolsø <knan-lkml@anduin.net> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-14 23:38:24 +03:00
.pio_mask = ATA_PIO4,
.mwdma_mask = ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
.udma_mask = ATA_UDMA2,
ata_piix: ignore ATA_DMA_ERR on vmware ich4 VMware ich4 emulation incorrectly sets DMA_ERR on TF error. Ignore it. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-07 13:38:53 +03:00
.port_ops = &piix_vmw_ops,
},
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
};
static struct pci_bits piix_enable_bits[] = {
{ 0x41U, 1U, 0x80UL, 0x80UL }, /* port 0 */
{ 0x43U, 1U, 0x80UL, 0x80UL }, /* port 1 */
};
MODULE_AUTHOR("Andre Hedrick, Alan Cox, Andrzej Krzysztofowicz, Jeff Garzik");
MODULE_DESCRIPTION("SCSI low-level driver for Intel PIIX/ICH ATA controllers");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, piix_pci_tbl);
MODULE_VERSION(DRV_VERSION);
[PATCH] libata: add 40pin "short" cable support, honour drive side speed detection [deweerdt@free.fr: build fix] Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Frederik Deweerdt <deweerdt@free.fr> Cc: Tejun Heo <htejun@gmail.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-10-11 01:28:11 +04:00
struct ich_laptop {
u16 device;
u16 subvendor;
u16 subdevice;
};
/*
* List of laptops that use short cables rather than 80 wire
*/
static const struct ich_laptop ich_laptop[] = {
/* devid, subvendor, subdev */
{ 0x27DF, 0x0005, 0x0280 }, /* ICH7 on Acer 5602WLMi */
ata_piix: Add additional PCI identifier for 40 wire short cable Keeping the list in sync with the old IDE driver Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-11-06 01:51:09 +03:00
{ 0x27DF, 0x1025, 0x0102 }, /* ICH7 on Acer 5602aWLMi */
ata_piix: add ICH7 on Acer 3682WLMi to laptop list In Acer Aspire hdd is connected to ICH7 via 40c cable, however it is short cable and it is UDMA66 capable. Signed-off-by: J J <jakub007@go2.pl> Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-08 20:26:30 +03:00
{ 0x27DF, 0x1025, 0x0110 }, /* ICH7 on Acer 3682WLMi */
ata_piix: Add new laptop short cable IDs OriginalAuthor: Michael Frey <michael.frey@canonical.com> Signed-off-by: Steve Conklin <sconklin@canonical.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-07-17 01:27:56 +04:00
{ 0x27DF, 0x1028, 0x02b0 }, /* ICH7 on unknown Dell */
Add notation that the Asus W5F laptop has a short cable instead of 80-wire. The Asus W5F laptop uses a short cable instead of the 80-wire style, and thus needs to be in the ich_laptop special cases for correct detection and support of UDMA/100 for the hard drive. I noticed this because I have the W5F laptop, and was tracing apparent slowness. Signed-off-by: Robin H. Johnson <robbat2@gentoo.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-03-29 05:02:07 +04:00
{ 0x27DF, 0x1043, 0x1267 }, /* ICH7 on Asus W5F */
[libata] ata_piix: add HP compaq laptop to short cable list Reported by Andreas Messer. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-09-29 12:01:43 +04:00
{ 0x27DF, 0x103C, 0x30A1 }, /* ICH7 on HP Compaq nc2400 */
tree-wide: fix assorted typos all over the place That is "success", "unknown", "through", "performance", "[re|un]mapping" , "access", "default", "reasonable", "[con]currently", "temperature" , "channel", "[un]used", "application", "example","hierarchy", "therefore" , "[over|under]flow", "contiguous", "threshold", "enough" and others. Signed-off-by: André Goddard Rosa <andre.goddard@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2009-11-14 18:09:05 +03:00
{ 0x27DF, 0x103C, 0x361a }, /* ICH7 on unknown HP */
ata_piix: add Hercules EC-900 mini-notebook to ich_laptop short cable list Signed-off-by: Herton Ronaldo Krzesinski <herton@mandriva.com.br> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-09-17 21:29:05 +04:00
{ 0x27DF, 0x1071, 0xD221 }, /* ICH7 on Hercules EC-900 */
ata_piix: Add new laptop short cable IDs OriginalAuthor: Michael Frey <michael.frey@canonical.com> Signed-off-by: Steve Conklin <sconklin@canonical.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-07-17 01:27:56 +04:00
{ 0x27DF, 0x152D, 0x0778 }, /* ICH7 on unknown Intel */
ata_piix: add short 40c quirk for Acer Aspire 2030, take #2 Acer Aspire 2023WLMi uses short 40c cable. Add quirk for it. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Steve H. <mail.pandor@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-05-22 13:34:22 +04:00
{ 0x24CA, 0x1025, 0x0061 }, /* ICH4 on ACER Aspire 2023WLMi */
[libata] ata_piix: more acer short cable quirks Add ICH6 on ACER Aspire 1694WLMi to list of laptops that use short cables rather than 80 wire OriginalAuthor: Tiago Sousa OriginalLocation: http://launchpadlibrarian.net/11627664/new.ich_laptop.short.cables.diff Bug: #187121 Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: maximilian attems <max@stro.at> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-06-03 20:59:02 +04:00
{ 0x24CA, 0x1025, 0x003d }, /* ICH4 on ACER TM290 */
{ 0x266F, 0x1025, 0x0066 }, /* ICH6 on ACER Aspire 1694WLMi */
ata_piix: add Asus Eee 701 controller to short cable list The drive is directly soldered to the controller, so there is no cable at all. Remove the 40-wire assumption so the drive can operate at max speed. Before patch: $ dd if=/dev/sda of=/dev/null bs=2M count=64 iflag=direct 134217728 bytes (134 MB) copied, 5.29612 s, 25.3 MB/s After patch: $ dd if=/dev/sda of=/dev/null bs=2M count=64 iflag=direct 134217728 bytes (134 MB) copied, 3.94955 s, 34.0 MB/s Signed-off-by: Dan McGee <dpmcgee@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-04-21 07:03:27 +04:00
{ 0x2653, 0x1043, 0x82D8 }, /* ICH6M on Asus Eee 701 */
ata_piix: The Sony TZ90 needs the cable type hardcoding The Sony TZ90 needs the cable type hardcoding. See bug #12734 Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-05-06 20:09:41 +04:00
{ 0x27df, 0x104d, 0x900e }, /* ICH7 on Sony TZ-90 */
[PATCH] libata: add 40pin "short" cable support, honour drive side speed detection [deweerdt@free.fr: build fix] Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Frederik Deweerdt <deweerdt@free.fr> Cc: Tejun Heo <htejun@gmail.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-10-11 01:28:11 +04:00
/* end marker */
{ 0, }
};
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
/**
pata: cable methods Versus upstream as requested Last of the trivial switches to cable_detect methods. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-04-11 03:04:20 +04:00
* ich_pata_cable_detect - Probe host controller cable detect info
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
* @ap: Port for which cable detect info is desired
*
* Read 80c cable indicator from ATA PCI device's PCI config
* register. This register is normally set by firmware (BIOS).
*
* LOCKING:
* None (inherited from caller).
*/
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
pata: cable methods Versus upstream as requested Last of the trivial switches to cable_detect methods. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-04-11 03:04:20 +04:00
static int ich_pata_cable_detect(struct ata_port *ap)
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
{
libata: Grand renaming. The biggest change is that ata_host_set is renamed to ata_host. * ata_host_set => ata_host * ata_probe_ent->host_flags => ata_probe_ent->port_flags * ata_probe_ent->host_set_flags => ata_probe_ent->_host_flags * ata_host_stats => ata_port_stats * ata_port->host => ata_port->scsi_host * ata_port->host_set => ata_port->host * ata_port_info->host_flags => ata_port_info->flags * ata_(.*)host_set(.*)\(\) => ata_\1host\2() The leading underscore in ata_probe_ent->_host_flags is to avoid reusing ->host_flags for different purpose. Currently, the only user of the field is libata-bmdma.c and probe_ent itself is scheduled to be removed. ata_port->host is reused for different purpose but this field is used inside libata core proper and of different type. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-24 11:19:22 +04:00
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
ata_piix: save, use saved and restore IOCFG Certain ACPI implementations mess up IOCFG on _STM making libata detect cable type incorrectly after a suspend/resume cycle. This patch makes ata_piix save IOCFG on attach, use the saved value for things which aren't dynamic and restore it on detach so that the next driver also gets the BIOS initialized value. This patch contains the following changes. * makes ich_pata_cable_detect() use saved_iocfg. * make piix_iocfg_bit18_quirk() take @host and use saved_iocfg. * hpriv allocation moved upwards to save iocfg before doing anything else. This fixes bz#11879. Andreas Mohr reported and diagnosed the problem. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Andreas Mohr <andi@lisas.de> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-01-02 06:04:48 +03:00
struct piix_host_priv *hpriv = ap->host->private_data;
[PATCH] libata: add 40pin "short" cable support, honour drive side speed detection [deweerdt@free.fr: build fix] Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Frederik Deweerdt <deweerdt@free.fr> Cc: Tejun Heo <htejun@gmail.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-10-11 01:28:11 +04:00
const struct ich_laptop *lap = &ich_laptop[0];
ata_piix: save, use saved and restore IOCFG Certain ACPI implementations mess up IOCFG on _STM making libata detect cable type incorrectly after a suspend/resume cycle. This patch makes ata_piix save IOCFG on attach, use the saved value for things which aren't dynamic and restore it on detach so that the next driver also gets the BIOS initialized value. This patch contains the following changes. * makes ich_pata_cable_detect() use saved_iocfg. * make piix_iocfg_bit18_quirk() take @host and use saved_iocfg. * hpriv allocation moved upwards to save iocfg before doing anything else. This fixes bz#11879. Andreas Mohr reported and diagnosed the problem. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Andreas Mohr <andi@lisas.de> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-01-02 06:04:48 +03:00
u8 mask;
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
[PATCH] libata: add 40pin "short" cable support, honour drive side speed detection [deweerdt@free.fr: build fix] Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Frederik Deweerdt <deweerdt@free.fr> Cc: Tejun Heo <htejun@gmail.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-10-11 01:28:11 +04:00
/* Check for specials - Acer Aspire 5602WLMi */
while (lap->device) {
if (lap->device == pdev->device &&
lap->subvendor == pdev->subsystem_vendor &&
[libata] checkpatch-inspired cleanups Tackle the relatively sane complaints of checkpatch --file. The vast majority is indentation and whitespace changes, the rest are * #include fixes * printk KERN_xxx prefix addition * BSS/initializer cleanups Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2007-10-19 14:42:56 +04:00
lap->subdevice == pdev->subsystem_device)
pata: cable methods Versus upstream as requested Last of the trivial switches to cable_detect methods. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-04-11 03:04:20 +04:00
return ATA_CBL_PATA40_SHORT;
[libata] checkpatch-inspired cleanups Tackle the relatively sane complaints of checkpatch --file. The vast majority is indentation and whitespace changes, the rest are * #include fixes * printk KERN_xxx prefix addition * BSS/initializer cleanups Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2007-10-19 14:42:56 +04:00
[PATCH] libata: add 40pin "short" cable support, honour drive side speed detection [deweerdt@free.fr: build fix] Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Frederik Deweerdt <deweerdt@free.fr> Cc: Tejun Heo <htejun@gmail.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-10-11 01:28:11 +04:00
lap++;
}
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
/* check BIOS cable detect results */
[PATCH] libata: replace ap->hard_port_no with ap->port_no Replace ap->hard_port_no with ap->port_no. Signed-off-by: Tejun Heo <htejun@gmail.com>
2006-08-10 11:59:16 +04:00
mask = ap->port_no == 0 ? PIIX_80C_PRI : PIIX_80C_SEC;
ata_piix: save, use saved and restore IOCFG Certain ACPI implementations mess up IOCFG on _STM making libata detect cable type incorrectly after a suspend/resume cycle. This patch makes ata_piix save IOCFG on attach, use the saved value for things which aren't dynamic and restore it on detach so that the next driver also gets the BIOS initialized value. This patch contains the following changes. * makes ich_pata_cable_detect() use saved_iocfg. * make piix_iocfg_bit18_quirk() take @host and use saved_iocfg. * hpriv allocation moved upwards to save iocfg before doing anything else. This fixes bz#11879. Andreas Mohr reported and diagnosed the problem. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Andreas Mohr <andi@lisas.de> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-01-02 06:04:48 +03:00
if ((hpriv->saved_iocfg & mask) == 0)
pata: cable methods Versus upstream as requested Last of the trivial switches to cable_detect methods. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-04-11 03:04:20 +04:00
return ATA_CBL_PATA40;
return ATA_CBL_PATA80;
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
}
/**
[PATCH] ata_piix: convert ata_piix to new probing mechanism Convert ata_piix to new probing mechanism. Automatic hotplug is not supported due to hardware limitation (no PHY event interrupt), but warm plugging works. Signed-off-by: Tejun Heo <htejun@gmail.com>
2006-05-31 13:28:14 +04:00
* piix_pata_prereset - prereset for PATA host controller
libata-link: linkify reset Make reset methods and related functions deal with ata_link instead of ata_port. * ata_do_reset() * ata_eh_reset() * all prereset/reset/postreset methods and related functions This patch introduces no behavior change. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-06 13:36:23 +04:00
* @link: Target link
libata: add deadline support to prereset and reset methods Add @deadline to prereset and reset methods and make them honor it. ata_wait_ready() which directly takes @deadline is implemented to be used as the wait function. This patch is in preparation for EH timing improvements. * ata_wait_ready() never does busy sleep. It's only used from EH and no wait in EH is that urgent. This function also prints 'be patient' message automatically after 5 secs of waiting if more than 3 secs is remaining till deadline. * ata_bus_post_reset() now fails with error code if any of its wait fails. This is important because earlier reset tries will have shorter timeout than the spec requires. If a device fails to respond before the short timeout, reset should be retried with longer timeout rather than silently ignoring the device. There are three behavior differences. 1. Timeout is applied to both devices at once, not separately. This is more consistent with what the spec says. 2. When a device passes devchk but fails to become ready before deadline. Previouly, post_reset would just succeed and let device classification remove the device. New code fails the reset thus causing reset retry. After a few times, EH will give up disabling the port. 3. When slave device passes devchk but fails to become accessible (TF-wise) after reset. Original code disables dev1 after 30s timeout and continues as if the device doesn't exist, while the patched code fails reset. When this happens, new code fails reset on whole port rather than proceeding with only the primary device. If the failing device is suffering transient problems, new code retries reset which is a better behavior. If the failing device is actually broken, the net effect is identical to it, but not to the other device sharing the channel. In the previous code, reset would have succeeded after 30s thus detecting the working one. In the new code, reset fails and whole port gets disabled. IMO, it's a pathological case anyway (broken device sharing bus with working one) and doesn't really matter. * ata_bus_softreset() is changed to return error code from ata_bus_post_reset(). It used to return 0 unconditionally. * Spin up waiting is to be removed and not converted to honor deadline. * To be on the safe side, deadline is set to 40s for the time being. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-02-02 10:50:52 +03:00
* @deadline: deadline jiffies for the operation
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
*
[PATCH] ata_piix: convert pata to new reset mechanism Convert ata_piix pata ->phy_reset to new reset mechanism. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
2006-02-15 09:01:42 +03:00
* LOCKING:
* None (inherited from caller).
*/
libata-link: linkify reset Make reset methods and related functions deal with ata_link instead of ata_port. * ata_do_reset() * ata_eh_reset() * all prereset/reset/postreset methods and related functions This patch introduces no behavior change. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-06 13:36:23 +04:00
static int piix_pata_prereset(struct ata_link *link, unsigned long deadline)
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
{
libata-link: linkify reset Make reset methods and related functions deal with ata_link instead of ata_port. * ata_do_reset() * ata_eh_reset() * all prereset/reset/postreset methods and related functions This patch introduces no behavior change. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-06 13:36:23 +04:00
struct ata_port *ap = link->ap;
libata: Grand renaming. The biggest change is that ata_host_set is renamed to ata_host. * ata_host_set => ata_host * ata_probe_ent->host_flags => ata_probe_ent->port_flags * ata_probe_ent->host_set_flags => ata_probe_ent->_host_flags * ata_host_stats => ata_port_stats * ata_port->host => ata_port->scsi_host * ata_port->host_set => ata_port->host * ata_port_info->host_flags => ata_port_info->flags * ata_(.*)host_set(.*)\(\) => ata_\1host\2() The leading underscore in ata_probe_ent->_host_flags is to avoid reusing ->host_flags for different purpose. Currently, the only user of the field is libata-bmdma.c and probe_ent itself is scheduled to be removed. ata_port->host is reused for different purpose but this field is used inside libata core proper and of different type. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-24 11:19:22 +04:00
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
[PATCH] libata-eh: Remove layering violation and duplication when handling absent ports This removes the layering violation where drivers have to fiddle directly with EH flags. Instead we now recognize -ENOENT means "no port" and do the handling in the core code. This also removes an instance of a call to disable the port, and an identical printk from each driver doing this. Even better - future rule changes will be in one place only. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-09-26 20:53:38 +04:00
if (!pci_test_config_bits(pdev, &piix_enable_bits[ap->port_no]))
return -ENOENT;
libata: rename SFF functions SFF functions have confusing names. Some have sff prefix, some have bmdma, some std, some pci and some none. Unify the naming by... * SFF functions which are common to both BMDMA and non-BMDMA are prefixed with ata_sff_. * SFF functions which are specific to BMDMA are prefixed with ata_bmdma_. * SFF functions which are specific to PCI but apply to both BMDMA and non-BMDMA are prefixed with ata_pci_sff_. * SFF functions which are specific to PCI and BMDMA are prefixed with ata_pci_bmdma_. * Drop generic prefixes from LLD specific routines. For example, bfin_std_dev_select -> bfin_dev_select. The following renames are noteworthy. ata_qc_issue_prot() -> ata_sff_qc_issue() ata_pci_default_filter() -> ata_bmdma_mode_filter() ata_dev_try_classify() -> ata_sff_dev_classify() This rename is in preparation of separating SFF support out of libata core layer. This patch strictly renames functions and doesn't introduce any behavior difference. Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-04-07 17:47:16 +04:00
return ata_sff_prereset(link, deadline);
[PATCH] ata_piix: convert ata_piix to new probing mechanism Convert ata_piix to new probing mechanism. Automatic hotplug is not supported due to hardware limitation (no PHY event interrupt), but warm plugging works. Signed-off-by: Tejun Heo <htejun@gmail.com>
2006-05-31 13:28:14 +04:00
}
ata_piix: parallel scanning on PATA needs an extra locking Commit log for commit 517d3cc15b36392e518abab6bacbb72089658313 ("[libata] ata_piix: Enable parallel scan") says: This patch turns on parallel scanning for the ata_piix driver. This driver is used on most netbooks (no AHCI for cheap storage it seems). The scan is the dominating time factor in the kernel boot for these devices; with this flag it gets cut in half for the device I used for testing (eeepc). Alan took a look at the driver source and concluded that it ought to be safe to do for this driver. Alan has also checked with the hardware team. and it is all true but once we put all things together additional constraints for PATA controllers show up (some hardware registers have per-host not per-port atomicity) and we risk misprogramming the controller. I used the following test to check whether the issue is real: @@ -736,8 +736,20 @@ static void piix_set_piomode(struct ata_ (timings[pio][1] << 8); } pci_write_config_word(dev, master_port, master_data); - if (is_slave) + if (is_slave) { + if (ap->port_no == 0) { + u8 tmp = slave_data; + + while (slave_data == tmp) { + pci_read_config_byte(dev, slave_port, &tmp); + msleep(50); + } + + dev_printk(KERN_ERR, &dev->dev, "PATA parallel scan " + "race detected\n"); + } pci_write_config_byte(dev, slave_port, slave_data); + } /* Ensure the UDMA bit is off - it will be turned back on if UDMA is selected */ and it indeed triggered the error message. Lets fix all such races by adding an extra locking to ->set_piomode and ->set_dmamode methods for PATA controllers. [ Alan: would be better to take the host lock in libata-core for these cases so that we fix all the adapters in one swoop. "Looks fine as a temproary quickfix tho" ] Cc: Arjan van de Ven <arjan@linux.intel.com> Acked-by: Alan Cox <alan@linux.intel.com> Cc: Jeff Garzik <jgarzik@redhat.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-08-30 16:56:30 +04:00
static DEFINE_SPINLOCK(piix_lock);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
/**
* piix_set_piomode - Initialize host controller PATA PIO timings
* @ap: Port whose timings we are configuring
* @adev: um
*
* Set PIO mode for device, in host controller PCI config space.
*
* LOCKING:
* None (inherited from caller).
*/
[libata] checkpatch-inspired cleanups Tackle the relatively sane complaints of checkpatch --file. The vast majority is indentation and whitespace changes, the rest are * #include fixes * printk KERN_xxx prefix addition * BSS/initializer cleanups Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2007-10-19 14:42:56 +04:00
static void piix_set_piomode(struct ata_port *ap, struct ata_device *adev)
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
{
libata: Grand renaming. The biggest change is that ata_host_set is renamed to ata_host. * ata_host_set => ata_host * ata_probe_ent->host_flags => ata_probe_ent->port_flags * ata_probe_ent->host_set_flags => ata_probe_ent->_host_flags * ata_host_stats => ata_port_stats * ata_port->host => ata_port->scsi_host * ata_port->host_set => ata_port->host * ata_port_info->host_flags => ata_port_info->flags * ata_(.*)host_set(.*)\(\) => ata_\1host\2() The leading underscore in ata_probe_ent->_host_flags is to avoid reusing ->host_flags for different purpose. Currently, the only user of the field is libata-bmdma.c and probe_ent itself is scheduled to be removed. ata_port->host is reused for different purpose but this field is used inside libata core proper and of different type. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-24 11:19:22 +04:00
struct pci_dev *dev = to_pci_dev(ap->host->dev);
ata_piix: parallel scanning on PATA needs an extra locking Commit log for commit 517d3cc15b36392e518abab6bacbb72089658313 ("[libata] ata_piix: Enable parallel scan") says: This patch turns on parallel scanning for the ata_piix driver. This driver is used on most netbooks (no AHCI for cheap storage it seems). The scan is the dominating time factor in the kernel boot for these devices; with this flag it gets cut in half for the device I used for testing (eeepc). Alan took a look at the driver source and concluded that it ought to be safe to do for this driver. Alan has also checked with the hardware team. and it is all true but once we put all things together additional constraints for PATA controllers show up (some hardware registers have per-host not per-port atomicity) and we risk misprogramming the controller. I used the following test to check whether the issue is real: @@ -736,8 +736,20 @@ static void piix_set_piomode(struct ata_ (timings[pio][1] << 8); } pci_write_config_word(dev, master_port, master_data); - if (is_slave) + if (is_slave) { + if (ap->port_no == 0) { + u8 tmp = slave_data; + + while (slave_data == tmp) { + pci_read_config_byte(dev, slave_port, &tmp); + msleep(50); + } + + dev_printk(KERN_ERR, &dev->dev, "PATA parallel scan " + "race detected\n"); + } pci_write_config_byte(dev, slave_port, slave_data); + } /* Ensure the UDMA bit is off - it will be turned back on if UDMA is selected */ and it indeed triggered the error message. Lets fix all such races by adding an extra locking to ->set_piomode and ->set_dmamode methods for PATA controllers. [ Alan: would be better to take the host lock in libata-core for these cases so that we fix all the adapters in one swoop. "Looks fine as a temproary quickfix tho" ] Cc: Arjan van de Ven <arjan@linux.intel.com> Acked-by: Alan Cox <alan@linux.intel.com> Cc: Jeff Garzik <jgarzik@redhat.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-08-30 16:56:30 +04:00
unsigned long flags;
unsigned int pio = adev->pio_mode - XFER_PIO_0;
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
unsigned int is_slave = (adev->devno != 0);
[PATCH] libata: replace ap->hard_port_no with ap->port_no Replace ap->hard_port_no with ap->port_no. Signed-off-by: Tejun Heo <htejun@gmail.com>
2006-08-10 11:59:16 +04:00
unsigned int master_port= ap->port_no ? 0x42 : 0x40;
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
unsigned int slave_port = 0x44;
u16 master_data;
u8 slave_data;
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
u8 udma_enable;
int control = 0;
[libata #pata-drivers] Trim trailing whitespace.
2006-08-31 08:03:49 +04:00
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
/*
* See Intel Document 298600-004 for the timing programing rules
* for ICH controllers.
*/
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
static const /* ISP RTC */
u8 timings[][2] = { { 0, 0 },
{ 0, 0 },
{ 1, 0 },
{ 2, 1 },
{ 2, 3 }, };
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
if (pio >= 2)
control |= 1; /* TIME1 enable */
if (ata_pio_need_iordy(adev))
control |= 2; /* IE enable */
[libata #pata-drivers] Trim trailing whitespace.
2006-08-31 08:03:49 +04:00
/* Intel specifies that the PPE functionality is for disk only */
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
if (adev->class == ATA_DEV_ATA)
control |= 4; /* PPE enable */
ata_piix: parallel scanning on PATA needs an extra locking Commit log for commit 517d3cc15b36392e518abab6bacbb72089658313 ("[libata] ata_piix: Enable parallel scan") says: This patch turns on parallel scanning for the ata_piix driver. This driver is used on most netbooks (no AHCI for cheap storage it seems). The scan is the dominating time factor in the kernel boot for these devices; with this flag it gets cut in half for the device I used for testing (eeepc). Alan took a look at the driver source and concluded that it ought to be safe to do for this driver. Alan has also checked with the hardware team. and it is all true but once we put all things together additional constraints for PATA controllers show up (some hardware registers have per-host not per-port atomicity) and we risk misprogramming the controller. I used the following test to check whether the issue is real: @@ -736,8 +736,20 @@ static void piix_set_piomode(struct ata_ (timings[pio][1] << 8); } pci_write_config_word(dev, master_port, master_data); - if (is_slave) + if (is_slave) { + if (ap->port_no == 0) { + u8 tmp = slave_data; + + while (slave_data == tmp) { + pci_read_config_byte(dev, slave_port, &tmp); + msleep(50); + } + + dev_printk(KERN_ERR, &dev->dev, "PATA parallel scan " + "race detected\n"); + } pci_write_config_byte(dev, slave_port, slave_data); + } /* Ensure the UDMA bit is off - it will be turned back on if UDMA is selected */ and it indeed triggered the error message. Lets fix all such races by adding an extra locking to ->set_piomode and ->set_dmamode methods for PATA controllers. [ Alan: would be better to take the host lock in libata-core for these cases so that we fix all the adapters in one swoop. "Looks fine as a temproary quickfix tho" ] Cc: Arjan van de Ven <arjan@linux.intel.com> Acked-by: Alan Cox <alan@linux.intel.com> Cc: Jeff Garzik <jgarzik@redhat.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-08-30 16:56:30 +04:00
spin_lock_irqsave(&piix_lock, flags);
ata_piix: fix pio/mwdma programming Fix various bugs in pio/mwdma mode programming. * Control bits in the timing register wasn't cleared properly while programming PIO mode. * MWDMA mode programming cleared the wrong part of control bits. * MWDMA mode programming cleared udma_mask even when the controller doesn't support UDMA. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Art Haas <ahaas@airmail.net> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-05-25 21:16:58 +04:00
/* PIO configuration clears DTE unconditionally. It will be
* programmed in set_dmamode which is guaranteed to be called
* after set_piomode if any DMA mode is available.
*/
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
pci_read_config_word(dev, master_port, &master_data);
if (is_slave) {
ata_piix: fix pio/mwdma programming Fix various bugs in pio/mwdma mode programming. * Control bits in the timing register wasn't cleared properly while programming PIO mode. * MWDMA mode programming cleared the wrong part of control bits. * MWDMA mode programming cleared udma_mask even when the controller doesn't support UDMA. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Art Haas <ahaas@airmail.net> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-05-25 21:16:58 +04:00
/* clear TIME1|IE1|PPE1|DTE1 */
master_data &= 0xff0f;
drivers/ata/: Spelling fixes Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Adrian Bunk <bunk@kernel.org>
2008-02-03 18:08:11 +03:00
/* Enable SITRE (separate slave timing register) */
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
master_data |= 0x4000;
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
/* enable PPE1, IE1 and TIME1 as needed */
master_data |= (control << 4);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
pci_read_config_byte(dev, slave_port, &slave_data);
[PATCH] libata: replace ap->hard_port_no with ap->port_no Replace ap->hard_port_no with ap->port_no. Signed-off-by: Tejun Heo <htejun@gmail.com>
2006-08-10 11:59:16 +04:00
slave_data &= (ap->port_no ? 0x0f : 0xf0);
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
/* Load the timing nibble for this slave */
ata_piix: fix pio/mwdma programming Fix various bugs in pio/mwdma mode programming. * Control bits in the timing register wasn't cleared properly while programming PIO mode. * MWDMA mode programming cleared the wrong part of control bits. * MWDMA mode programming cleared udma_mask even when the controller doesn't support UDMA. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Art Haas <ahaas@airmail.net> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-05-25 21:16:58 +04:00
slave_data |= ((timings[pio][0] << 2) | timings[pio][1])
<< (ap->port_no ? 4 : 0);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
} else {
ata_piix: fix pio/mwdma programming Fix various bugs in pio/mwdma mode programming. * Control bits in the timing register wasn't cleared properly while programming PIO mode. * MWDMA mode programming cleared the wrong part of control bits. * MWDMA mode programming cleared udma_mask even when the controller doesn't support UDMA. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Art Haas <ahaas@airmail.net> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-05-25 21:16:58 +04:00
/* clear ISP|RCT|TIME0|IE0|PPE0|DTE0 */
master_data &= 0xccf0;
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
/* Enable PPE, IE and TIME as appropriate */
master_data |= control;
ata_piix: fix pio/mwdma programming Fix various bugs in pio/mwdma mode programming. * Control bits in the timing register wasn't cleared properly while programming PIO mode. * MWDMA mode programming cleared the wrong part of control bits. * MWDMA mode programming cleared udma_mask even when the controller doesn't support UDMA. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Art Haas <ahaas@airmail.net> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-05-25 21:16:58 +04:00
/* load ISP and RCT */
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
master_data |=
(timings[pio][0] << 12) |
(timings[pio][1] << 8);
}
pci_write_config_word(dev, master_port, master_data);
if (is_slave)
pci_write_config_byte(dev, slave_port, slave_data);
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
/* Ensure the UDMA bit is off - it will be turned back on if
UDMA is selected */
[libata #pata-drivers] Trim trailing whitespace.
2006-08-31 08:03:49 +04:00
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
if (ap->udma_mask) {
pci_read_config_byte(dev, 0x48, &udma_enable);
udma_enable &= ~(1 << (2 * ap->port_no + adev->devno));
pci_write_config_byte(dev, 0x48, udma_enable);
}
ata_piix: parallel scanning on PATA needs an extra locking Commit log for commit 517d3cc15b36392e518abab6bacbb72089658313 ("[libata] ata_piix: Enable parallel scan") says: This patch turns on parallel scanning for the ata_piix driver. This driver is used on most netbooks (no AHCI for cheap storage it seems). The scan is the dominating time factor in the kernel boot for these devices; with this flag it gets cut in half for the device I used for testing (eeepc). Alan took a look at the driver source and concluded that it ought to be safe to do for this driver. Alan has also checked with the hardware team. and it is all true but once we put all things together additional constraints for PATA controllers show up (some hardware registers have per-host not per-port atomicity) and we risk misprogramming the controller. I used the following test to check whether the issue is real: @@ -736,8 +736,20 @@ static void piix_set_piomode(struct ata_ (timings[pio][1] << 8); } pci_write_config_word(dev, master_port, master_data); - if (is_slave) + if (is_slave) { + if (ap->port_no == 0) { + u8 tmp = slave_data; + + while (slave_data == tmp) { + pci_read_config_byte(dev, slave_port, &tmp); + msleep(50); + } + + dev_printk(KERN_ERR, &dev->dev, "PATA parallel scan " + "race detected\n"); + } pci_write_config_byte(dev, slave_port, slave_data); + } /* Ensure the UDMA bit is off - it will be turned back on if UDMA is selected */ and it indeed triggered the error message. Lets fix all such races by adding an extra locking to ->set_piomode and ->set_dmamode methods for PATA controllers. [ Alan: would be better to take the host lock in libata-core for these cases so that we fix all the adapters in one swoop. "Looks fine as a temproary quickfix tho" ] Cc: Arjan van de Ven <arjan@linux.intel.com> Acked-by: Alan Cox <alan@linux.intel.com> Cc: Jeff Garzik <jgarzik@redhat.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-08-30 16:56:30 +04:00
spin_unlock_irqrestore(&piix_lock, flags);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
}
/**
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
* do_pata_set_dmamode - Initialize host controller PATA PIO timings
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
* @ap: Port whose timings we are configuring
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
* @adev: Drive in question
[PATCH] ata-piix: fixes kerneldoc error Fixes an error in kerneldoc of ata_piix.c. Signed-off-by: Henrik Kretzschmar <henne@nachtwindheim.de> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-09-26 00:00:46 +04:00
* @isich: set if the chip is an ICH device
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
*
* Set UDMA mode for device, in host controller PCI config space.
*
* LOCKING:
* None (inherited from caller).
*/
[libata] checkpatch-inspired cleanups Tackle the relatively sane complaints of checkpatch --file. The vast majority is indentation and whitespace changes, the rest are * #include fixes * printk KERN_xxx prefix addition * BSS/initializer cleanups Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2007-10-19 14:42:56 +04:00
static void do_pata_set_dmamode(struct ata_port *ap, struct ata_device *adev, int isich)
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
{
libata: Grand renaming. The biggest change is that ata_host_set is renamed to ata_host. * ata_host_set => ata_host * ata_probe_ent->host_flags => ata_probe_ent->port_flags * ata_probe_ent->host_set_flags => ata_probe_ent->_host_flags * ata_host_stats => ata_port_stats * ata_port->host => ata_port->scsi_host * ata_port->host_set => ata_port->host * ata_port_info->host_flags => ata_port_info->flags * ata_(.*)host_set(.*)\(\) => ata_\1host\2() The leading underscore in ata_probe_ent->_host_flags is to avoid reusing ->host_flags for different purpose. Currently, the only user of the field is libata-bmdma.c and probe_ent itself is scheduled to be removed. ata_port->host is reused for different purpose but this field is used inside libata core proper and of different type. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-24 11:19:22 +04:00
struct pci_dev *dev = to_pci_dev(ap->host->dev);
ata_piix: parallel scanning on PATA needs an extra locking Commit log for commit 517d3cc15b36392e518abab6bacbb72089658313 ("[libata] ata_piix: Enable parallel scan") says: This patch turns on parallel scanning for the ata_piix driver. This driver is used on most netbooks (no AHCI for cheap storage it seems). The scan is the dominating time factor in the kernel boot for these devices; with this flag it gets cut in half for the device I used for testing (eeepc). Alan took a look at the driver source and concluded that it ought to be safe to do for this driver. Alan has also checked with the hardware team. and it is all true but once we put all things together additional constraints for PATA controllers show up (some hardware registers have per-host not per-port atomicity) and we risk misprogramming the controller. I used the following test to check whether the issue is real: @@ -736,8 +736,20 @@ static void piix_set_piomode(struct ata_ (timings[pio][1] << 8); } pci_write_config_word(dev, master_port, master_data); - if (is_slave) + if (is_slave) { + if (ap->port_no == 0) { + u8 tmp = slave_data; + + while (slave_data == tmp) { + pci_read_config_byte(dev, slave_port, &tmp); + msleep(50); + } + + dev_printk(KERN_ERR, &dev->dev, "PATA parallel scan " + "race detected\n"); + } pci_write_config_byte(dev, slave_port, slave_data); + } /* Ensure the UDMA bit is off - it will be turned back on if UDMA is selected */ and it indeed triggered the error message. Lets fix all such races by adding an extra locking to ->set_piomode and ->set_dmamode methods for PATA controllers. [ Alan: would be better to take the host lock in libata-core for these cases so that we fix all the adapters in one swoop. "Looks fine as a temproary quickfix tho" ] Cc: Arjan van de Ven <arjan@linux.intel.com> Acked-by: Alan Cox <alan@linux.intel.com> Cc: Jeff Garzik <jgarzik@redhat.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-08-30 16:56:30 +04:00
unsigned long flags;
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
u8 master_port = ap->port_no ? 0x42 : 0x40;
u16 master_data;
u8 speed = adev->dma_mode;
int devid = adev->devno + 2 * ap->port_no;
libata piix3 support warning fix Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-11 04:20:34 +03:00
u8 udma_enable = 0;
[libata #pata-drivers] Trim trailing whitespace.
2006-08-31 08:03:49 +04:00
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
static const /* ISP RTC */
u8 timings[][2] = { { 0, 0 },
{ 0, 0 },
{ 1, 0 },
{ 2, 1 },
{ 2, 3 }, };
ata_piix: parallel scanning on PATA needs an extra locking Commit log for commit 517d3cc15b36392e518abab6bacbb72089658313 ("[libata] ata_piix: Enable parallel scan") says: This patch turns on parallel scanning for the ata_piix driver. This driver is used on most netbooks (no AHCI for cheap storage it seems). The scan is the dominating time factor in the kernel boot for these devices; with this flag it gets cut in half for the device I used for testing (eeepc). Alan took a look at the driver source and concluded that it ought to be safe to do for this driver. Alan has also checked with the hardware team. and it is all true but once we put all things together additional constraints for PATA controllers show up (some hardware registers have per-host not per-port atomicity) and we risk misprogramming the controller. I used the following test to check whether the issue is real: @@ -736,8 +736,20 @@ static void piix_set_piomode(struct ata_ (timings[pio][1] << 8); } pci_write_config_word(dev, master_port, master_data); - if (is_slave) + if (is_slave) { + if (ap->port_no == 0) { + u8 tmp = slave_data; + + while (slave_data == tmp) { + pci_read_config_byte(dev, slave_port, &tmp); + msleep(50); + } + + dev_printk(KERN_ERR, &dev->dev, "PATA parallel scan " + "race detected\n"); + } pci_write_config_byte(dev, slave_port, slave_data); + } /* Ensure the UDMA bit is off - it will be turned back on if UDMA is selected */ and it indeed triggered the error message. Lets fix all such races by adding an extra locking to ->set_piomode and ->set_dmamode methods for PATA controllers. [ Alan: would be better to take the host lock in libata-core for these cases so that we fix all the adapters in one swoop. "Looks fine as a temproary quickfix tho" ] Cc: Arjan van de Ven <arjan@linux.intel.com> Acked-by: Alan Cox <alan@linux.intel.com> Cc: Jeff Garzik <jgarzik@redhat.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-08-30 16:56:30 +04:00
spin_lock_irqsave(&piix_lock, flags);
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
pci_read_config_word(dev, master_port, &master_data);
libata: PIIX3 support This I believe completes the PIIX range of support for libata This adds the table entries needed for the PIIX3, both a new PCI identifier and a new mode list. It also fixes an erroneous access to PCI configuration 0x48 on non UDMA capable chips. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-10 20:13:38 +03:00
if (ap->udma_mask)
pci_read_config_byte(dev, 0x48, &udma_enable);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
if (speed >= XFER_UDMA_0) {
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
unsigned int udma = adev->dma_mode - XFER_UDMA_0;
u16 udma_timing;
u16 ideconf;
int u_clock, u_speed;
[libata #pata-drivers] Trim trailing whitespace.
2006-08-31 08:03:49 +04:00
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
/*
[libata] checkpatch-inspired cleanups Tackle the relatively sane complaints of checkpatch --file. The vast majority is indentation and whitespace changes, the rest are * #include fixes * printk KERN_xxx prefix addition * BSS/initializer cleanups Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2007-10-19 14:42:56 +04:00
* UDMA is handled by a combination of clock switching and
[libata #pata-drivers] Trim trailing whitespace.
2006-08-31 08:03:49 +04:00
* selection of dividers
*
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
* Handy rule: Odd modes are UDMATIMx 01, even are 02
[libata #pata-drivers] Trim trailing whitespace.
2006-08-31 08:03:49 +04:00
* except UDMA0 which is 00
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
*/
u_speed = min(2 - (udma & 1), udma);
if (udma == 5)
u_clock = 0x1000; /* 100Mhz */
else if (udma > 2)
u_clock = 1; /* 66Mhz */
else
u_clock = 0; /* 33Mhz */
[libata #pata-drivers] Trim trailing whitespace.
2006-08-31 08:03:49 +04:00
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
udma_enable |= (1 << devid);
[libata #pata-drivers] Trim trailing whitespace.
2006-08-31 08:03:49 +04:00
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
/* Load the CT/RP selection */
pci_read_config_word(dev, 0x4A, &udma_timing);
udma_timing &= ~(3 << (4 * devid));
udma_timing |= u_speed << (4 * devid);
pci_write_config_word(dev, 0x4A, udma_timing);
[libata #pata-drivers] Trim trailing whitespace.
2006-08-31 08:03:49 +04:00
if (isich) {
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
/* Select a 33/66/100Mhz clock */
pci_read_config_word(dev, 0x54, &ideconf);
ideconf &= ~(0x1001 << devid);
ideconf |= u_clock << devid;
/* For ICH or later we should set bit 10 for better
performance (WR_PingPong_En) */
pci_write_config_word(dev, 0x54, ideconf);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
}
} else {
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
/*
* MWDMA is driven by the PIO timings. We must also enable
* IORDY unconditionally along with TIME1. PPE has already
* been set when the PIO timing was set.
*/
unsigned int mwdma = adev->dma_mode - XFER_MW_DMA_0;
unsigned int control;
u8 slave_data;
const unsigned int needed_pio[3] = {
XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
};
int pio = needed_pio[mwdma] - XFER_PIO_0;
[libata #pata-drivers] Trim trailing whitespace.
2006-08-31 08:03:49 +04:00
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
control = 3; /* IORDY|TIME1 */
[libata #pata-drivers] Trim trailing whitespace.
2006-08-31 08:03:49 +04:00
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
/* If the drive MWDMA is faster than it can do PIO then
we must force PIO into PIO0 */
[libata #pata-drivers] Trim trailing whitespace.
2006-08-31 08:03:49 +04:00
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
if (adev->pio_mode < needed_pio[mwdma])
/* Enable DMA timing only */
control |= 8; /* PIO cycles in PIO0 */
if (adev->devno) { /* Slave */
master_data &= 0xFF4F; /* Mask out IORDY|TIME1|DMAONLY */
master_data |= control << 4;
pci_read_config_byte(dev, 0x44, &slave_data);
ata_piix: fix pio/mwdma programming Fix various bugs in pio/mwdma mode programming. * Control bits in the timing register wasn't cleared properly while programming PIO mode. * MWDMA mode programming cleared the wrong part of control bits. * MWDMA mode programming cleared udma_mask even when the controller doesn't support UDMA. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Art Haas <ahaas@airmail.net> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-05-25 21:16:58 +04:00
slave_data &= (ap->port_no ? 0x0f : 0xf0);
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
/* Load the matching timing */
slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0);
pci_write_config_byte(dev, 0x44, slave_data);
} else { /* Master */
[libata #pata-drivers] Trim trailing whitespace.
2006-08-31 08:03:49 +04:00
master_data &= 0xCCF4; /* Mask out IORDY|TIME1|DMAONLY
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
and master timing bits */
master_data |= control;
master_data |=
(timings[pio][0] << 12) |
(timings[pio][1] << 8);
}
ata_piix: fix pio/mwdma programming Fix various bugs in pio/mwdma mode programming. * Control bits in the timing register wasn't cleared properly while programming PIO mode. * MWDMA mode programming cleared the wrong part of control bits. * MWDMA mode programming cleared udma_mask even when the controller doesn't support UDMA. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Art Haas <ahaas@airmail.net> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-05-25 21:16:58 +04:00
ata_piix: fix MWDMA handling on PIIX3 Fix erroneous check for ap->udma_mask in do_pata_set_dmamode() resulting in controller not being programmed properly for MWDMA. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-12-03 22:32:08 +03:00
if (ap->udma_mask)
ata_piix: fix pio/mwdma programming Fix various bugs in pio/mwdma mode programming. * Control bits in the timing register wasn't cleared properly while programming PIO mode. * MWDMA mode programming cleared the wrong part of control bits. * MWDMA mode programming cleared udma_mask even when the controller doesn't support UDMA. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Art Haas <ahaas@airmail.net> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-05-25 21:16:58 +04:00
udma_enable &= ~(1 << devid);
ata_piix: fix MWDMA handling on PIIX3 Fix erroneous check for ap->udma_mask in do_pata_set_dmamode() resulting in controller not being programmed properly for MWDMA. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-12-03 22:32:08 +03:00
pci_write_config_word(dev, master_port, master_data);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
}
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
/* Don't scribble on 0x48 if the controller does not support UDMA */
if (ap->udma_mask)
pci_write_config_byte(dev, 0x48, udma_enable);
ata_piix: parallel scanning on PATA needs an extra locking Commit log for commit 517d3cc15b36392e518abab6bacbb72089658313 ("[libata] ata_piix: Enable parallel scan") says: This patch turns on parallel scanning for the ata_piix driver. This driver is used on most netbooks (no AHCI for cheap storage it seems). The scan is the dominating time factor in the kernel boot for these devices; with this flag it gets cut in half for the device I used for testing (eeepc). Alan took a look at the driver source and concluded that it ought to be safe to do for this driver. Alan has also checked with the hardware team. and it is all true but once we put all things together additional constraints for PATA controllers show up (some hardware registers have per-host not per-port atomicity) and we risk misprogramming the controller. I used the following test to check whether the issue is real: @@ -736,8 +736,20 @@ static void piix_set_piomode(struct ata_ (timings[pio][1] << 8); } pci_write_config_word(dev, master_port, master_data); - if (is_slave) + if (is_slave) { + if (ap->port_no == 0) { + u8 tmp = slave_data; + + while (slave_data == tmp) { + pci_read_config_byte(dev, slave_port, &tmp); + msleep(50); + } + + dev_printk(KERN_ERR, &dev->dev, "PATA parallel scan " + "race detected\n"); + } pci_write_config_byte(dev, slave_port, slave_data); + } /* Ensure the UDMA bit is off - it will be turned back on if UDMA is selected */ and it indeed triggered the error message. Lets fix all such races by adding an extra locking to ->set_piomode and ->set_dmamode methods for PATA controllers. [ Alan: would be better to take the host lock in libata-core for these cases so that we fix all the adapters in one swoop. "Looks fine as a temproary quickfix tho" ] Cc: Arjan van de Ven <arjan@linux.intel.com> Acked-by: Alan Cox <alan@linux.intel.com> Cc: Jeff Garzik <jgarzik@redhat.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-08-30 16:56:30 +04:00
spin_unlock_irqrestore(&piix_lock, flags);
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
}
/**
* piix_set_dmamode - Initialize host controller PATA DMA timings
* @ap: Port whose timings we are configuring
* @adev: um
*
* Set MW/UDMA mode for device, in host controller PCI config space.
*
* LOCKING:
* None (inherited from caller).
*/
[libata] checkpatch-inspired cleanups Tackle the relatively sane complaints of checkpatch --file. The vast majority is indentation and whitespace changes, the rest are * #include fixes * printk KERN_xxx prefix addition * BSS/initializer cleanups Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2007-10-19 14:42:56 +04:00
static void piix_set_dmamode(struct ata_port *ap, struct ata_device *adev)
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
{
do_pata_set_dmamode(ap, adev, 0);
}
/**
* ich_set_dmamode - Initialize host controller PATA DMA timings
* @ap: Port whose timings we are configuring
* @adev: um
*
* Set MW/UDMA mode for device, in host controller PCI config space.
*
* LOCKING:
* None (inherited from caller).
*/
[libata] checkpatch-inspired cleanups Tackle the relatively sane complaints of checkpatch --file. The vast majority is indentation and whitespace changes, the rest are * #include fixes * printk KERN_xxx prefix addition * BSS/initializer cleanups Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2007-10-19 14:42:56 +04:00
static void ich_set_dmamode(struct ata_port *ap, struct ata_device *adev)
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
{
do_pata_set_dmamode(ap, adev, 1);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
}
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
/*
* Serial ATA Index/Data Pair Superset Registers access
*
* Beginning from ICH8, there's a sane way to access SCRs using index
ata_piix: drop merged SCR access and use slave_link instead Now that libata has slave_link, there's no need to keep ugly merged SCR access. Drop it and use slave_link instead. This results in simpler code and much better separate link handling for master and slave. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:44 +04:00
* and data register pair located at BAR5 which means that we have
* separate SCRs for master and slave. This is handled using libata
* slave_link facility.
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
*/
static const int piix_sidx_map[] = {
[SCR_STATUS] = 0,
[SCR_ERROR] = 2,
[SCR_CONTROL] = 1,
};
ata_piix: drop merged SCR access and use slave_link instead Now that libata has slave_link, there's no need to keep ugly merged SCR access. Drop it and use slave_link instead. This results in simpler code and much better separate link handling for master and slave. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:44 +04:00
static void piix_sidpr_sel(struct ata_link *link, unsigned int reg)
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
{
ata_piix: drop merged SCR access and use slave_link instead Now that libata has slave_link, there's no need to keep ugly merged SCR access. Drop it and use slave_link instead. This results in simpler code and much better separate link handling for master and slave. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:44 +04:00
struct ata_port *ap = link->ap;
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
struct piix_host_priv *hpriv = ap->host->private_data;
ata_piix: drop merged SCR access and use slave_link instead Now that libata has slave_link, there's no need to keep ugly merged SCR access. Drop it and use slave_link instead. This results in simpler code and much better separate link handling for master and slave. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:44 +04:00
iowrite32(((ap->port_no * 2 + link->pmp) << 8) | piix_sidx_map[reg],
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
hpriv->sidpr + PIIX_SIDPR_IDX);
}
libata: make SCR access ops per-link Logically, SCR access ops should take @link; however, there was no compelling reason to convert all SCR access ops when adding @link abstraction as there's one-to-one mapping between a port and a non-PMP link. However, that assumption won't hold anymore with the scheduled addition of slave link. Make SCR access ops per-link. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:40 +04:00
static int piix_sidpr_scr_read(struct ata_link *link,
unsigned int reg, u32 *val)
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
{
ata_piix: drop merged SCR access and use slave_link instead Now that libata has slave_link, there's no need to keep ugly merged SCR access. Drop it and use slave_link instead. This results in simpler code and much better separate link handling for master and slave. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:44 +04:00
struct piix_host_priv *hpriv = link->ap->host->private_data;
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
if (reg >= ARRAY_SIZE(piix_sidx_map))
return -EINVAL;
ata_piix: drop merged SCR access and use slave_link instead Now that libata has slave_link, there's no need to keep ugly merged SCR access. Drop it and use slave_link instead. This results in simpler code and much better separate link handling for master and slave. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:44 +04:00
piix_sidpr_sel(link, reg);
*val = ioread32(hpriv->sidpr + PIIX_SIDPR_DATA);
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
return 0;
}
libata: make SCR access ops per-link Logically, SCR access ops should take @link; however, there was no compelling reason to convert all SCR access ops when adding @link abstraction as there's one-to-one mapping between a port and a non-PMP link. However, that assumption won't hold anymore with the scheduled addition of slave link. Make SCR access ops per-link. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:40 +04:00
static int piix_sidpr_scr_write(struct ata_link *link,
unsigned int reg, u32 val)
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
{
ata_piix: drop merged SCR access and use slave_link instead Now that libata has slave_link, there's no need to keep ugly merged SCR access. Drop it and use slave_link instead. This results in simpler code and much better separate link handling for master and slave. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:44 +04:00
struct piix_host_priv *hpriv = link->ap->host->private_data;
libata: make SCR access ops per-link Logically, SCR access ops should take @link; however, there was no compelling reason to convert all SCR access ops when adding @link abstraction as there's one-to-one mapping between a port and a non-PMP link. However, that assumption won't hold anymore with the scheduled addition of slave link. Make SCR access ops per-link. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:40 +04:00
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
if (reg >= ARRAY_SIZE(piix_sidx_map))
return -EINVAL;
ata_piix: drop merged SCR access and use slave_link instead Now that libata has slave_link, there's no need to keep ugly merged SCR access. Drop it and use slave_link instead. This results in simpler code and much better separate link handling for master and slave. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:44 +04:00
piix_sidpr_sel(link, reg);
iowrite32(val, hpriv->sidpr + PIIX_SIDPR_DATA);
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
return 0;
}
ata_piix: implement LPM support Now that DIPM can be used independently from HIPM, ata_piix can support LPM too. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-09-01 19:50:08 +04:00
static int piix_sidpr_set_lpm(struct ata_link *link, enum ata_lpm_policy policy,
unsigned hints)
{
return sata_link_scr_lpm(link, policy, false);
}
libata: implement spurious irq handling for SFF and apply it to piix Traditional IDE interface sucks in that it doesn't have a reliable IRQ pending bit, so if the controller raises IRQ while the driver is expecting it not to, the IRQ won't be cleared and eventually the IRQ line will be killed by interrupt subsystem. Some controllers have non-standard mechanism to indicate IRQ pending so that this condition can be detected and worked around. This patch adds an optional operation ->sff_irq_check() which will be called for each port from the ata_sff_interrupt() if an unexpected interrupt is received. If the operation returns %true, ->sff_check_status() and ->sff_irq_clear() will be cleared for the port. Note that this doesn't mark the interrupt as handled so it won't prevent IRQ subsystem from killing the IRQ if this mechanism fails to clear the spurious IRQ. This patch also implements ->sff_irq_check() for ata_piix. Note that this adds slight overhead to shared IRQ operation as IRQs which are destined for other controllers will trigger extra register accesses to check whether IDE interrupt is pending but this solves rare screaming IRQ cases and for some curious reason also helps weird BIOS related glitch on Samsung n130 as reported in bko#14314. http://bugzilla.kernel.org/show_bug.cgi?id=14314 * piix_base_ops dropped as suggested by Sergei. * Spurious IRQ detection doesn't kick in anymore if polling qc is in progress. This provides less protection but some controllers have possible data corruption issues if the wrong register is accessed while a command is in progress. Signed-off-by: Tejun Heo <tj@kernel.org> Reported-by: Johannes Stezenbach <js@sig21.net> Reported-by: Hans Werner <hwerner4@gmx.de> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-01-19 04:49:19 +03:00
static bool piix_irq_check(struct ata_port *ap)
{
if (unlikely(!ap->ioaddr.bmdma_addr))
return false;
return ap->ops->bmdma_status(ap) & ATA_DMA_INTR;
}
ata_piix: fix suspend/resume for some TOSHIBA laptops ACPI implementations in several TOSHIBA laptops are weird and burn cpu cycles for tens of seconds while trying to suspend if the PCI device for the ATA controller is disabled when the ACPI suspend is called. This patch uses DMI to match those machines and bypass device disable on those machines during suspend. As the device needs to be put into enabled state on resume without affecting PCI enable count, matching resume callback uses __pci_reenable_device(). This bug is reported in bugzilla bug 7780. http://bugzilla.kernel.org/show_bug.cgi?id=7780 Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-10 10:55:43 +04:00
#ifdef CONFIG_PM
ata_piix: implement piix_borken_suspend() Separate out broken suspend blacklist matching into piix_broken_suspend(). Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-27 09:53:28 +04:00
static int piix_broken_suspend(void)
{
drivers/firmware: const-ify DMI API and internals Three main sets of changes: 1) dmi_get_system_info() return value should have been marked const, since callers should not be changing that data. 2) const-ify DMI internals, since DMI firmware tables should, whenever possible, be marked const to ensure we never ever write to that data area. 3) const-ify DMI API, to enable marking tables const where possible in low-level drivers. And if we're really lucky, this might enable some additional optimizations on the part of the compiler. The bulk of the changes are #2 and #3, which are interrelated. #1 could have been a separate patch, but it was so small compared to the others, it was easier to roll it into this changeset. Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2007-10-03 23:15:40 +04:00
static const struct dmi_system_id sysids[] = {
ata_piix: add another TECRA M3 entry to broken suspend list There's a different version of DMI table for TECRA M3 where it has proper vendor and product name entry. Add the entry to the broken suspend list. Angus Turnbull reported and provided initial patch. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Angus Turnbull <angus@twinhelix.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-09-30 12:11:20 +04:00
{
.ident = "TECRA M3",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "TECRA M3"),
},
},
ata_piix: add more toshiba laptops to broken suspend list Add more toshiba laptops to broken suspend list. This is from OSDL bugzilla bug 7780. tj: re-formatted patch and added description and SOB. Signed-off-by: Peter Schwenke <peter@bluetoad.com.au> Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-11-30 09:28:29 +03:00
{
.ident = "TECRA M3",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "Tecra M3"),
},
},
ata_piix: add Toshiba Tecra M4 to broken suspend list Add Toshiba Tecra M4 to broken suspend list. This is from OSDL bugzilla bug 7780. Signed-off-by: Peter Schwenke <peter@bluetoad.com.au> Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-12-05 04:39:49 +03:00
{
.ident = "TECRA M4",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "Tecra M4"),
},
},
ata_piix: add TECRA M4 to broken suspend list TOSHIBA also used "TECRA M4" in additon to "Tecra M4", add it. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-06-13 13:05:02 +04:00
{
.ident = "TECRA M4",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "TECRA M4"),
},
},
ata_piix: implement piix_borken_suspend() Separate out broken suspend blacklist matching into piix_broken_suspend(). Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-27 09:53:28 +04:00
{
.ident = "TECRA M5",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "TECRA M5"),
},
ata_piix: fix suspend/resume for some TOSHIBA laptops ACPI implementations in several TOSHIBA laptops are weird and burn cpu cycles for tens of seconds while trying to suspend if the PCI device for the ATA controller is disabled when the ACPI suspend is called. This patch uses DMI to match those machines and bypass device disable on those machines during suspend. As the device needs to be put into enabled state on resume without affecting PCI enable count, matching resume callback uses __pci_reenable_device(). This bug is reported in bugzilla bug 7780. http://bugzilla.kernel.org/show_bug.cgi?id=7780 Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-10 10:55:43 +04:00
},
ata_piix: Add Toshiba Satellite R20 and Tecra M6 to broken suspend list. Add Toshiba Satellite R20 and Tecra M6 to broken suspend list. Matt Piermarini reported and provided the M6 patch. This is from OSDL bug 7780. Signed-off-by: Peter Schwenke <peter@bluetoad.com.au> Cc: Matt Piermarini <mattpiermarini@yahoo.com> Acked-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-17 16:08:55 +03:00
{
.ident = "TECRA M6",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "TECRA M6"),
},
},
ata_piix: add TECRA M7 to broken suspend list Add TECRA M7 to broken suspend list. Reported by Marie Koreen. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Marie Koreen <kbug@koreen.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-14 14:56:04 +04:00
{
.ident = "TECRA M7",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "TECRA M7"),
},
},
ata_piix: add more toshiba laptops to broken suspend list Add more toshiba laptops to broken suspend list. This is from OSDL bugzilla bug 7780. tj: re-formatted patch and added description and SOB. Signed-off-by: Peter Schwenke <peter@bluetoad.com.au> Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-11-30 09:28:29 +03:00
{
.ident = "TECRA A8",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A8"),
},
},
ata_piix: Add Toshiba Satellite R20 and Tecra M6 to broken suspend list. Add Toshiba Satellite R20 and Tecra M6 to broken suspend list. Matt Piermarini reported and provided the M6 patch. This is from OSDL bug 7780. Signed-off-by: Peter Schwenke <peter@bluetoad.com.au> Cc: Matt Piermarini <mattpiermarini@yahoo.com> Acked-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-17 16:08:55 +03:00
{
.ident = "Satellite R20",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "Satellite R20"),
},
},
ata_piix: add more toshiba laptops to broken suspend list Add more toshiba laptops to broken suspend list. This is from OSDL bugzilla bug 7780. tj: re-formatted patch and added description and SOB. Signed-off-by: Peter Schwenke <peter@bluetoad.com.au> Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-11-30 09:28:29 +03:00
{
.ident = "Satellite R25",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "Satellite R25"),
},
},
ata_piix: add Satellite U200 to broken suspend list Satellite U200 also shares the problem. Add it to the broken suspend list. Original patch from John Schember. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: John Schember <john@nachtimwald.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-25 03:31:02 +04:00
{
.ident = "Satellite U200",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "Satellite U200"),
},
},
ata_piix: add more toshiba laptops to broken suspend list Add more toshiba laptops to broken suspend list. This is from OSDL bugzilla bug 7780. tj: re-formatted patch and added description and SOB. Signed-off-by: Peter Schwenke <peter@bluetoad.com.au> Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-11-30 09:28:29 +03:00
{
.ident = "Satellite U200",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "SATELLITE U200"),
},
},
ata_piix: add SATELLITE PRO U200 to broken suspend list Please warmly welcome the PRO variant of Satellite U200 to the broken suspend list. Original patch is from Yann Chachkoff. Patch reformatted and forwarded by Tejun Heo. Signed-off-by: Yann Chachkoff <yann.chachkoff@myrealbox.com> Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-11-07 06:02:27 +03:00
{
.ident = "Satellite Pro U200",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "SATELLITE PRO U200"),
},
},
ata_piix: implement piix_borken_suspend() Separate out broken suspend blacklist matching into piix_broken_suspend(). Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-27 09:53:28 +04:00
{
.ident = "Satellite U205",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "Satellite U205"),
},
ata_piix: fix suspend/resume for some TOSHIBA laptops ACPI implementations in several TOSHIBA laptops are weird and burn cpu cycles for tens of seconds while trying to suspend if the PCI device for the ATA controller is disabled when the ACPI suspend is called. This patch uses DMI to match those machines and bypass device disable on those machines during suspend. As the device needs to be put into enabled state on resume without affecting PCI enable count, matching resume callback uses __pci_reenable_device(). This bug is reported in bugzilla bug 7780. http://bugzilla.kernel.org/show_bug.cgi?id=7780 Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-10 10:55:43 +04:00
},
ata_piix: add SATELLITE U205 to broken suspend list Satellite U205 has alternate product name where the satellite part is all capatalized. Add it to the blacklist. This is reported by Ross Patterson in kernel bugzilla bug #7780. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Ross Patterson <me@rpatterson.net>
2007-11-12 11:56:24 +03:00
{
.ident = "SATELLITE U205",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "SATELLITE U205"),
},
},
ata_piix: implement piix_borken_suspend() Separate out broken suspend blacklist matching into piix_broken_suspend(). Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-27 09:53:28 +04:00
{
.ident = "Portege M500",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "PORTEGE M500"),
},
ata_piix: fix suspend/resume for some TOSHIBA laptops ACPI implementations in several TOSHIBA laptops are weird and burn cpu cycles for tens of seconds while trying to suspend if the PCI device for the ATA controller is disabled when the ACPI suspend is called. This patch uses DMI to match those machines and bypass device disable on those machines during suspend. As the device needs to be put into enabled state on resume without affecting PCI enable count, matching resume callback uses __pci_reenable_device(). This bug is reported in bugzilla bug 7780. http://bugzilla.kernel.org/show_bug.cgi?id=7780 Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-10 10:55:43 +04:00
},
ata_piix: VGN-BX297XP wants the controller power up on suspend Sony VGN-BX297XP fails suspend if the controller is powered down when calling into ACPI suspend. Add the machine to piix_broken_suspend list. This problem was reported by GNUtoo@no-log.org on bko#10293. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Rafael J. Wysocki <rjw@sisk.pl> Reported-by: GNUtoo@no-log.org Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-31 05:44:34 +04:00
{
.ident = "VGN-BX297XP",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"),
DMI_MATCH(DMI_PRODUCT_NAME, "VGN-BX297XP"),
},
},
[libata] ata_piix: properly terminate DMI system list If you don't terminate a list, bad things happen... Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-09-01 14:48:52 +04:00
{ } /* terminate list */
ata_piix: implement piix_borken_suspend() Separate out broken suspend blacklist matching into piix_broken_suspend(). Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-27 09:53:28 +04:00
};
ata_piix: add Tecra M3 to broken suspend blacklist Add Tecra M3 to the broken suspend blacklist. Tecra M3 doesn't have proper DMI_PRODUCT_NAME but has an OEM_STRING instead. Match it. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-27 09:55:07 +04:00
static const char *oemstrs[] = {
"Tecra M3,",
};
int i;
ata_piix: implement piix_borken_suspend() Separate out broken suspend blacklist matching into piix_broken_suspend(). Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-27 09:53:28 +04:00
if (dmi_check_system(sysids))
return 1;
ata_piix: add Tecra M3 to broken suspend blacklist Add Tecra M3 to the broken suspend blacklist. Tecra M3 doesn't have proper DMI_PRODUCT_NAME but has an OEM_STRING instead. Match it. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-27 09:55:07 +04:00
for (i = 0; i < ARRAY_SIZE(oemstrs); i++)
if (dmi_find_device(DMI_DEV_TYPE_OEM_STRING, oemstrs[i], NULL))
return 1;
ata_piix: add borked Tecra M4 to broken suspend list Tecra M4 sometimes forget what it is and reports bogus data via DMI which makes the machine evade broken suspend matching and thus fail suspend/resume. This patch updates piix_broken_suspend() such that it can match such case. As the borked DMI data is a bit generic, matching many entries to make the match more specific is necessary. As the usual DMI matching is limited to four entries, this patch uses hard coded manual matching. This is reported by Alexandru Romanescu. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Alexandru Romanescu <a_romanescu@yahoo.co.uk> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-11-29 16:37:21 +03:00
/* TECRA M4 sometimes forgets its identify and reports bogus
* DMI information. As the bogus information is a bit
* generic, match as many entries as possible. This manual
* matching is necessary because dmi_system_id.matches is
* limited to four entries.
*/
[libata] ata_piix: cleanup dmi strings checking Commit ATA: piix, fix pointer deref on suspend fixed a possible oops in an ugly manner. Use newly introduced dmi_match() to make the code pretty again. Signed-off-by: Jiri Slaby <jirislaby@gmail.com> Cc: Alexandru Romanescu <a_romanescu@yahoo.co.uk> Cc: Tejun Heo <tj@kernel.org> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-12-10 16:07:22 +03:00
if (dmi_match(DMI_SYS_VENDOR, "TOSHIBA") &&
dmi_match(DMI_PRODUCT_NAME, "000000") &&
dmi_match(DMI_PRODUCT_VERSION, "000000") &&
dmi_match(DMI_PRODUCT_SERIAL, "000000") &&
dmi_match(DMI_BOARD_VENDOR, "TOSHIBA") &&
dmi_match(DMI_BOARD_NAME, "Portable PC") &&
dmi_match(DMI_BOARD_VERSION, "Version A0"))
ata_piix: add borked Tecra M4 to broken suspend list Tecra M4 sometimes forget what it is and reports bogus data via DMI which makes the machine evade broken suspend matching and thus fail suspend/resume. This patch updates piix_broken_suspend() such that it can match such case. As the borked DMI data is a bit generic, matching many entries to make the match more specific is necessary. As the usual DMI matching is limited to four entries, this patch uses hard coded manual matching. This is reported by Alexandru Romanescu. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Alexandru Romanescu <a_romanescu@yahoo.co.uk> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-11-29 16:37:21 +03:00
return 1;
ata_piix: implement piix_borken_suspend() Separate out broken suspend blacklist matching into piix_broken_suspend(). Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-27 09:53:28 +04:00
return 0;
}
ata_piix: fix suspend/resume for some TOSHIBA laptops ACPI implementations in several TOSHIBA laptops are weird and burn cpu cycles for tens of seconds while trying to suspend if the PCI device for the ATA controller is disabled when the ACPI suspend is called. This patch uses DMI to match those machines and bypass device disable on those machines during suspend. As the device needs to be put into enabled state on resume without affecting PCI enable count, matching resume callback uses __pci_reenable_device(). This bug is reported in bugzilla bug 7780. http://bugzilla.kernel.org/show_bug.cgi?id=7780 Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-10 10:55:43 +04:00
static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
{
struct ata_host *host = dev_get_drvdata(&pdev->dev);
unsigned long flags;
int rc = 0;
rc = ata_host_suspend(host, mesg);
if (rc)
return rc;
/* Some braindamaged ACPI suspend implementations expect the
* controller to be awake on entry; otherwise, it burns cpu
* cycles and power trying to do something to the sleeping
* beauty.
*/
PM: Introduce PM_EVENT_HIBERNATE callback state During the last step of hibernation in the "platform" mode (with the help of ACPI) we use the suspend code, including the devices' ->suspend() methods, to prepare the system for entering the ACPI S4 system sleep state. But at least for some devices the operations performed by the ->suspend() callback in that case must be different from its operations during regular suspend. For this reason, introduce the new PM event type PM_EVENT_HIBERNATE and pass it to the device drivers' ->suspend() methods during the last phase of hibernation, so that they can distinguish this case and handle it as appropriate. Modify the drivers that handle PM_EVENT_SUSPEND in a special way and need to handle PM_EVENT_HIBERNATE in the same way. These changes are necessary to fix a hibernation regression related to the i915 driver (ref. http://lkml.org/lkml/2008/2/22/488). Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Pavel Machek <pavel@ucw.cz> Tested-by: Jeff Chua <jeff.chua.linux@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-02-23 21:13:25 +03:00
if (piix_broken_suspend() && (mesg.event & PM_EVENT_SLEEP)) {
ata_piix: fix suspend/resume for some TOSHIBA laptops ACPI implementations in several TOSHIBA laptops are weird and burn cpu cycles for tens of seconds while trying to suspend if the PCI device for the ATA controller is disabled when the ACPI suspend is called. This patch uses DMI to match those machines and bypass device disable on those machines during suspend. As the device needs to be put into enabled state on resume without affecting PCI enable count, matching resume callback uses __pci_reenable_device(). This bug is reported in bugzilla bug 7780. http://bugzilla.kernel.org/show_bug.cgi?id=7780 Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-10 10:55:43 +04:00
pci_save_state(pdev);
/* mark its power state as "unknown", since we don't
* know if e.g. the BIOS will change its device state
* when we suspend.
*/
if (pdev->current_state == PCI_D0)
pdev->current_state = PCI_UNKNOWN;
/* tell resume that it's waking up from broken suspend */
spin_lock_irqsave(&host->lock, flags);
host->flags |= PIIX_HOST_BROKEN_SUSPEND;
spin_unlock_irqrestore(&host->lock, flags);
} else
ata_pci_device_do_suspend(pdev, mesg);
return 0;
}
static int piix_pci_device_resume(struct pci_dev *pdev)
{
struct ata_host *host = dev_get_drvdata(&pdev->dev);
unsigned long flags;
int rc;
if (host->flags & PIIX_HOST_BROKEN_SUSPEND) {
spin_lock_irqsave(&host->lock, flags);
host->flags &= ~PIIX_HOST_BROKEN_SUSPEND;
spin_unlock_irqrestore(&host->lock, flags);
pci_set_power_state(pdev, PCI_D0);
pci_restore_state(pdev);
/* PCI device wasn't disabled during suspend. Use
pci: rename __pci_reenable_device() to pci_reenable_device() Rename __pci_reenable_device() to pci_reenable_device(). Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-27 09:43:35 +04:00
* pci_reenable_device() to avoid affecting the enable
* count.
ata_piix: fix suspend/resume for some TOSHIBA laptops ACPI implementations in several TOSHIBA laptops are weird and burn cpu cycles for tens of seconds while trying to suspend if the PCI device for the ATA controller is disabled when the ACPI suspend is called. This patch uses DMI to match those machines and bypass device disable on those machines during suspend. As the device needs to be put into enabled state on resume without affecting PCI enable count, matching resume callback uses __pci_reenable_device(). This bug is reported in bugzilla bug 7780. http://bugzilla.kernel.org/show_bug.cgi?id=7780 Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-10 10:55:43 +04:00
*/
pci: rename __pci_reenable_device() to pci_reenable_device() Rename __pci_reenable_device() to pci_reenable_device(). Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-27 09:43:35 +04:00
rc = pci_reenable_device(pdev);
ata_piix: fix suspend/resume for some TOSHIBA laptops ACPI implementations in several TOSHIBA laptops are weird and burn cpu cycles for tens of seconds while trying to suspend if the PCI device for the ATA controller is disabled when the ACPI suspend is called. This patch uses DMI to match those machines and bypass device disable on those machines during suspend. As the device needs to be put into enabled state on resume without affecting PCI enable count, matching resume callback uses __pci_reenable_device(). This bug is reported in bugzilla bug 7780. http://bugzilla.kernel.org/show_bug.cgi?id=7780 Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-07-10 10:55:43 +04:00
if (rc)
dev_printk(KERN_ERR, &pdev->dev, "failed to enable "
"device after resume (%d)\n", rc);
} else
rc = ata_pci_device_do_resume(pdev);
if (rc == 0)
ata_host_resume(host);
return rc;
}
#endif
ata_piix: ignore ATA_DMA_ERR on vmware ich4 VMware ich4 emulation incorrectly sets DMA_ERR on TF error. Ignore it. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-07 13:38:53 +03:00
static u8 piix_vmw_bmdma_status(struct ata_port *ap)
{
return ata_bmdma_status(ap) & ~ATA_DMA_ERR;
}
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
#define AHCI_PCI_BAR 5
#define AHCI_GLOBAL_CTL 0x04
#define AHCI_ENABLE (1 << 31)
static int piix_disable_ahci(struct pci_dev *pdev)
{
[libata] __iomem annotations for various drivers
2005-08-30 13:18:18 +04:00
void __iomem *mmio;
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
u32 tmp;
int rc = 0;
/* BUG: pci_enable_device has not yet been called. This
* works because this device is usually set up by BIOS.
*/
[libata] update several drivers to use pci_iomap()/pci_iounmap()
2005-08-30 13:42:52 +04:00
if (!pci_resource_start(pdev, AHCI_PCI_BAR) ||
!pci_resource_len(pdev, AHCI_PCI_BAR))
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
return 0;
libata: Check PCI sub-class code before disabling AHCI This patch adds functionality to check the PCI sub-class code of an AHCI capable device before disabling AHCI. It fixes a bug where an ICH7 sata controller is being setup by the BIOS as sub-class 1 (ide) and the AHCI control registers weren't being initialized, thus causing an IO error in piix_disable_ahci(). Signed-off-by: Gregory Felix <greg.felix@gmail.com>
2005-07-28 23:54:15 +04:00
[libata] update several drivers to use pci_iomap()/pci_iounmap()
2005-08-30 13:42:52 +04:00
mmio = pci_iomap(pdev, AHCI_PCI_BAR, 64);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
if (!mmio)
return -ENOMEM;
libata: Check PCI sub-class code before disabling AHCI This patch adds functionality to check the PCI sub-class code of an AHCI capable device before disabling AHCI. It fixes a bug where an ICH7 sata controller is being setup by the BIOS as sub-class 1 (ide) and the AHCI control registers weren't being initialized, thus causing an IO error in piix_disable_ahci(). Signed-off-by: Gregory Felix <greg.felix@gmail.com>
2005-07-28 23:54:15 +04:00
ata_piix: Invalid use of writel/readl with iomap Should use ioread* as discussed previously Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-11-19 17:28:28 +03:00
tmp = ioread32(mmio + AHCI_GLOBAL_CTL);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
if (tmp & AHCI_ENABLE) {
tmp &= ~AHCI_ENABLE;
ata_piix: Invalid use of writel/readl with iomap Should use ioread* as discussed previously Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-11-19 17:28:28 +03:00
iowrite32(tmp, mmio + AHCI_GLOBAL_CTL);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
ata_piix: Invalid use of writel/readl with iomap Should use ioread* as discussed previously Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-11-19 17:28:28 +03:00
tmp = ioread32(mmio + AHCI_GLOBAL_CTL);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
if (tmp & AHCI_ENABLE)
rc = -EIO;
}
libata: Check PCI sub-class code before disabling AHCI This patch adds functionality to check the PCI sub-class code of an AHCI capable device before disabling AHCI. It fixes a bug where an ICH7 sata controller is being setup by the BIOS as sub-class 1 (ide) and the AHCI control registers weren't being initialized, thus causing an IO error in piix_disable_ahci(). Signed-off-by: Gregory Felix <greg.felix@gmail.com>
2005-07-28 23:54:15 +04:00
[libata] update several drivers to use pci_iomap()/pci_iounmap()
2005-08-30 13:42:52 +04:00
pci_iounmap(pdev, mmio);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
return rc;
}
[PATCH] libata: ata_piix 450NX errata Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
2005-12-08 22:22:28 +03:00
/**
* piix_check_450nx_errata - Check for problem 450NX setup
Various libata documentation updates. This is a merger of libata docs + cleanups from Martin Waitz <tali@admingilde.org> and me. From: Randy Dunlap <rdunlap@xenotime.net> From: Martin Waitz <tali@admingilde.org> Fix libata kernel-doc comments to match code. Add some function parameters to kernel-doc. Fix some typos/spellos. Put comments in <= 80 columns. Make one DPRINTK string unique. Fix sparse cast warnings. Signed-off-by: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
2006-01-28 21:15:32 +03:00
* @ata_dev: the PCI device to check
[libata] export ata_dev_pair; trim trailing whitespace Mostly, trim trailing whitespace. Also: * export ata_dev_pair * move ata_dev_classify export closer to ata_dev_pair export
2006-03-24 17:56:57 +03:00
*
[PATCH] libata: ata_piix 450NX errata Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
2005-12-08 22:22:28 +03:00
* Check for the present of 450NX errata #19 and errata #25. If
* they are found return an error code so we can turn off DMA
*/
static int __devinit piix_check_450nx_errata(struct pci_dev *ata_dev)
{
struct pci_dev *pdev = NULL;
u16 cfg;
int no_piix_dma = 0;
[libata] export ata_dev_pair; trim trailing whitespace Mostly, trim trailing whitespace. Also: * export ata_dev_pair * move ata_dev_classify export closer to ata_dev_pair export
2006-03-24 17:56:57 +03:00
[libata] checkpatch-inspired cleanups Tackle the relatively sane complaints of checkpatch --file. The vast majority is indentation and whitespace changes, the rest are * #include fixes * printk KERN_xxx prefix addition * BSS/initializer cleanups Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2007-10-19 14:42:56 +04:00
while ((pdev = pci_get_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454NX, pdev)) != NULL) {
[PATCH] libata: ata_piix 450NX errata Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
2005-12-08 22:22:28 +03:00
/* Look for 450NX PXB. Check for problem configurations
A PCI quirk checks bit 6 already */
pci_read_config_word(pdev, 0x41, &cfg);
/* Only on the original revision: IDE DMA can hang */
PCI: Change all drivers to use pci_device->revision Instead of all drivers reading pci config space to get the revision ID, they can now use the pci_device->revision member. This exposes some issues where drivers where reading a word or a dword for the revision number, and adding useless error-handling around the read. Some drivers even just read it for no purpose of all. In devices where the revision ID is being copied over and used in what appears to be the equivalent of hotpath, I have left the copy code and the cached copy as not to influence the driver's performance. Compile tested with make all{yes,mod}config on x86_64 and i386. Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Acked-by: Dave Jones <davej@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-06-09 02:46:36 +04:00
if (pdev->revision == 0x00)
[PATCH] libata: ata_piix 450NX errata Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
2005-12-08 22:22:28 +03:00
no_piix_dma = 1;
/* On all revisions below 5 PXB bus lock must be disabled for IDE */
PCI: Change all drivers to use pci_device->revision Instead of all drivers reading pci config space to get the revision ID, they can now use the pci_device->revision member. This exposes some issues where drivers where reading a word or a dword for the revision number, and adding useless error-handling around the read. Some drivers even just read it for no purpose of all. In devices where the revision ID is being copied over and used in what appears to be the equivalent of hotpath, I have left the copy code and the cached copy as not to influence the driver's performance. Compile tested with make all{yes,mod}config on x86_64 and i386. Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Acked-by: Dave Jones <davej@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-06-09 02:46:36 +04:00
else if (cfg & (1<<14) && pdev->revision < 5)
[PATCH] libata: ata_piix 450NX errata Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
2005-12-08 22:22:28 +03:00
no_piix_dma = 2;
}
[PATCH] ata_piix formatting if( spacing fix for Garzik compliant formatting Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-05-23 01:58:14 +04:00
if (no_piix_dma)
[PATCH] libata: ata_piix 450NX errata Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
2005-12-08 22:22:28 +03:00
dev_printk(KERN_WARNING, &ata_dev->dev, "450NX errata present, disabling IDE DMA.\n");
[PATCH] ata_piix formatting if( spacing fix for Garzik compliant formatting Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-05-23 01:58:14 +04:00
if (no_piix_dma == 2)
[PATCH] libata: ata_piix 450NX errata Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
2005-12-08 22:22:28 +03:00
dev_printk(KERN_WARNING, &ata_dev->dev, "A BIOS update may resolve this.\n");
return no_piix_dma;
[libata] export ata_dev_pair; trim trailing whitespace Mostly, trim trailing whitespace. Also: * export ata_dev_pair * move ata_dev_classify export closer to ata_dev_pair export
2006-03-24 17:56:57 +03:00
}
[PATCH] libata: ata_piix 450NX errata Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
2005-12-08 22:22:28 +03:00
ata_piix: convert to prepare - activate initialization ata_piix requires more configuration during initialization than most other SFF compliant controllers and one-go initialzation with ata_pci_one() is too rigid. This patch converts ata_piix to use two step prepare - activate initialization used by other more advanced controllers. This conversion brings the happy side effect of enabling PCI device before accessing PCI configuration registers. Other than that, there shouldn't be any behavior change. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:29 +03:00
static void __devinit piix_init_pcs(struct ata_host *host,
[libata] ata_piix: Consolidate PCS register writing Prior to this patch, the driver would do this for each port: read 8-bit PCS write 8-bit PCS read 8-bit PCS write 8-bit PCS In the field, flaky behavior has been observed related to this register. In particular, these overzealous register writes can cause misdetection problems. Update to do the following once (not once per port) at boot: read 16-bit PCS if needs changing, write 16-bit PCS And thereafter, we only perform a 'read 16-bit PCS' per port. This should eliminate all PCS writes in many cases, and be more friendly in the cases where we do need to enable ports. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-07-11 19:48:50 +04:00
const struct piix_map_db *map_db)
{
ata_piix: convert to prepare - activate initialization ata_piix requires more configuration during initialization than most other SFF compliant controllers and one-go initialzation with ata_pci_one() is too rigid. This patch converts ata_piix to use two step prepare - activate initialization used by other more advanced controllers. This conversion brings the happy side effect of enabling PCI device before accessing PCI configuration registers. Other than that, there shouldn't be any behavior change. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:29 +03:00
struct pci_dev *pdev = to_pci_dev(host->dev);
[libata] ata_piix: Consolidate PCS register writing Prior to this patch, the driver would do this for each port: read 8-bit PCS write 8-bit PCS read 8-bit PCS write 8-bit PCS In the field, flaky behavior has been observed related to this register. In particular, these overzealous register writes can cause misdetection problems. Update to do the following once (not once per port) at boot: read 16-bit PCS if needs changing, write 16-bit PCS And thereafter, we only perform a 'read 16-bit PCS' per port. This should eliminate all PCS writes in many cases, and be more friendly in the cases where we do need to enable ports. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-07-11 19:48:50 +04:00
u16 pcs, new_pcs;
pci_read_config_word(pdev, ICH5_PCS, &pcs);
new_pcs = pcs | map_db->port_enable;
if (new_pcs != pcs) {
DPRINTK("updating PCS from 0x%x to 0x%x\n", pcs, new_pcs);
pci_write_config_word(pdev, ICH5_PCS, new_pcs);
msleep(150);
}
}
ata_piix: convert to prepare - activate initialization ata_piix requires more configuration during initialization than most other SFF compliant controllers and one-go initialzation with ata_pci_one() is too rigid. This patch converts ata_piix to use two step prepare - activate initialization used by other more advanced controllers. This conversion brings the happy side effect of enabling PCI device before accessing PCI configuration registers. Other than that, there shouldn't be any behavior change. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:29 +03:00
static const int *__devinit piix_init_sata_map(struct pci_dev *pdev,
struct ata_port_info *pinfo,
const struct piix_map_db *map_db)
[PATCH] ata_piix: implement proper port map Replace combined mode handling via PIIX_COMB/COMB_PATA_P0 with proper port map. PIIX now prints port configuration during initialization. ATA_FLAG_SLAVE_POSS is now turned on for SATA ports only when the slave device is actually avaliable. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
{
more trivial signedness fixes in drivers Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-10-14 22:35:40 +04:00
const int *map;
[PATCH] ata_piix: implement proper port map Replace combined mode handling via PIIX_COMB/COMB_PATA_P0 with proper port map. PIIX now prints port configuration during initialization. ATA_FLAG_SLAVE_POSS is now turned on for SATA ports only when the slave device is actually avaliable. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
int i, invalid_map = 0;
u8 map_value;
pci_read_config_byte(pdev, ICH5_PMR, &map_value);
map = map_db->map[map_value & map_db->mask];
dev_printk(KERN_INFO, &pdev->dev, "MAP [");
for (i = 0; i < 4; i++) {
switch (map[i]) {
case RV:
invalid_map = 1;
printk(" XX");
break;
case NA:
printk(" --");
break;
case IDE:
WARN_ON((i & 1) || map[i + 1] != IDE);
[libata] Add a bunch of PATA drivers. The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-30 02:12:40 +04:00
pinfo[i / 2] = piix_port_info[ich_pata_100];
[PATCH] ata_piix: implement proper port map Replace combined mode handling via PIIX_COMB/COMB_PATA_P0 with proper port map. PIIX now prints port configuration during initialization. ATA_FLAG_SLAVE_POSS is now turned on for SATA ports only when the slave device is actually avaliable. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
i++;
printk(" IDE IDE");
break;
default:
printk(" P%d", map[i]);
if (i & 1)
libata: Grand renaming. The biggest change is that ata_host_set is renamed to ata_host. * ata_host_set => ata_host * ata_probe_ent->host_flags => ata_probe_ent->port_flags * ata_probe_ent->host_set_flags => ata_probe_ent->_host_flags * ata_host_stats => ata_port_stats * ata_port->host => ata_port->scsi_host * ata_port->host_set => ata_port->host * ata_port_info->host_flags => ata_port_info->flags * ata_(.*)host_set(.*)\(\) => ata_\1host\2() The leading underscore in ata_probe_ent->_host_flags is to avoid reusing ->host_flags for different purpose. Currently, the only user of the field is libata-bmdma.c and probe_ent itself is scheduled to be removed. ata_port->host is reused for different purpose but this field is used inside libata core proper and of different type. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-24 11:19:22 +04:00
pinfo[i / 2].flags |= ATA_FLAG_SLAVE_POSS;
[PATCH] ata_piix: implement proper port map Replace combined mode handling via PIIX_COMB/COMB_PATA_P0 with proper port map. PIIX now prints port configuration during initialization. ATA_FLAG_SLAVE_POSS is now turned on for SATA ports only when the slave device is actually avaliable. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
break;
}
}
printk(" ]\n");
if (invalid_map)
dev_printk(KERN_ERR, &pdev->dev,
"invalid MAP value %u\n", map_value);
ata_piix: convert to prepare - activate initialization ata_piix requires more configuration during initialization than most other SFF compliant controllers and one-go initialzation with ata_pci_one() is too rigid. This patch converts ata_piix to use two step prepare - activate initialization used by other more advanced controllers. This conversion brings the happy side effect of enabling PCI device before accessing PCI configuration registers. Other than that, there shouldn't be any behavior change. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:29 +03:00
return map;
[PATCH] ata_piix: implement proper port map Replace combined mode handling via PIIX_COMB/COMB_PATA_P0 with proper port map. PIIX now prints port configuration during initialization. ATA_FLAG_SLAVE_POSS is now turned on for SATA ports only when the slave device is actually avaliable. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
}
ata_piix: add workaround for Samsung DB-P70 Samsung DB-P70 somehow botched the first ICH9 SATA port. The board doesn't expose the first port but somehow SStatus reports link online while failing SRST protocol leading to repeated probe failures and thus long boot delay. Because the BIOS doesn't carry any identifying DMI information, the port can't be blacklisted safely. Fortunately, the controller does have subsystem vendor and ID set. It's unclear whether the subsystem IDs are used only for the board but it can be safely worked around by disabling SIDPR access and just using SRST works around the problem. Even when the workaround is triggered on an unaffected board the only side effect will be missing SCR access. Signed-off-by: Tejun Heo <tj@kernel.org> Reported-by: Joseph Jang <josephjang@gmail.com> Reported-by: Jonghyon Sohn <mrsohn@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-03 07:52:16 +03:00
static bool piix_no_sidpr(struct ata_host *host)
{
struct pci_dev *pdev = to_pci_dev(host->dev);
/*
* Samsung DB-P70 only has three ATA ports exposed and
* curiously the unconnected first port reports link online
* while not responding to SRST protocol causing excessive
* detection delay.
*
* Unfortunately, the system doesn't carry enough DMI
* information to identify the machine but does have subsystem
* vendor and device set. As it's unclear whether the
* subsystem vendor/device is used only for this specific
* board, the port can't be disabled solely with the
* information; however, turning off SIDPR access works around
* the problem. Turn it off.
*
* This problem is reported in bnc#441240.
*
* https://bugzilla.novell.com/show_bug.cgi?id=441420
*/
if (pdev->vendor == PCI_VENDOR_ID_INTEL && pdev->device == 0x2920 &&
pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG &&
pdev->subsystem_device == 0xb049) {
dev_printk(KERN_WARNING, host->dev,
"Samsung DB-P70 detected, disabling SIDPR\n");
return true;
}
return false;
}
ata_piix: drop merged SCR access and use slave_link instead Now that libata has slave_link, there's no need to keep ugly merged SCR access. Drop it and use slave_link instead. This results in simpler code and much better separate link handling for master and slave. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:44 +04:00
static int __devinit piix_init_sidpr(struct ata_host *host)
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
{
struct pci_dev *pdev = to_pci_dev(host->dev);
struct piix_host_priv *hpriv = host->private_data;
ata_piix: drop merged SCR access and use slave_link instead Now that libata has slave_link, there's no need to keep ugly merged SCR access. Drop it and use slave_link instead. This results in simpler code and much better separate link handling for master and slave. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:44 +04:00
struct ata_link *link0 = &host->ports[0]->link;
ata_piix: verify SIDPR access before enabling it On certain configurations (certain macbooks), even though all the conditions for SIDPR access described in the datasheet are met, actually reading those registers just returns 0 and have no effect on write. Verify SIDPR is actually working before enabling it. This is reported by Ryan Roth in bz#10512. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Ryan Roth <ryan.roth@ch2m.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-05-01 05:03:08 +04:00
u32 scontrol;
ata_piix: drop merged SCR access and use slave_link instead Now that libata has slave_link, there's no need to keep ugly merged SCR access. Drop it and use slave_link instead. This results in simpler code and much better separate link handling for master and slave. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:44 +04:00
int i, rc;
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
/* check for availability */
for (i = 0; i < 4; i++)
if (hpriv->map[i] == IDE)
ata_piix: drop merged SCR access and use slave_link instead Now that libata has slave_link, there's no need to keep ugly merged SCR access. Drop it and use slave_link instead. This results in simpler code and much better separate link handling for master and slave. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:44 +04:00
return 0;
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
ata_piix: add workaround for Samsung DB-P70 Samsung DB-P70 somehow botched the first ICH9 SATA port. The board doesn't expose the first port but somehow SStatus reports link online while failing SRST protocol leading to repeated probe failures and thus long boot delay. Because the BIOS doesn't carry any identifying DMI information, the port can't be blacklisted safely. Fortunately, the controller does have subsystem vendor and ID set. It's unclear whether the subsystem IDs are used only for the board but it can be safely worked around by disabling SIDPR access and just using SRST works around the problem. Even when the workaround is triggered on an unaffected board the only side effect will be missing SCR access. Signed-off-by: Tejun Heo <tj@kernel.org> Reported-by: Joseph Jang <josephjang@gmail.com> Reported-by: Jonghyon Sohn <mrsohn@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-03 07:52:16 +03:00
/* is it blacklisted? */
if (piix_no_sidpr(host))
return 0;
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
if (!(host->ports[0]->flags & PIIX_FLAG_SIDPR))
ata_piix: drop merged SCR access and use slave_link instead Now that libata has slave_link, there's no need to keep ugly merged SCR access. Drop it and use slave_link instead. This results in simpler code and much better separate link handling for master and slave. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:44 +04:00
return 0;
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
if (pci_resource_start(pdev, PIIX_SIDPR_BAR) == 0 ||
pci_resource_len(pdev, PIIX_SIDPR_BAR) != PIIX_SIDPR_LEN)
ata_piix: drop merged SCR access and use slave_link instead Now that libata has slave_link, there's no need to keep ugly merged SCR access. Drop it and use slave_link instead. This results in simpler code and much better separate link handling for master and slave. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:44 +04:00
return 0;
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
if (pcim_iomap_regions(pdev, 1 << PIIX_SIDPR_BAR, DRV_NAME))
ata_piix: drop merged SCR access and use slave_link instead Now that libata has slave_link, there's no need to keep ugly merged SCR access. Drop it and use slave_link instead. This results in simpler code and much better separate link handling for master and slave. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:44 +04:00
return 0;
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
hpriv->sidpr = pcim_iomap_table(pdev)[PIIX_SIDPR_BAR];
ata_piix: verify SIDPR access before enabling it On certain configurations (certain macbooks), even though all the conditions for SIDPR access described in the datasheet are met, actually reading those registers just returns 0 and have no effect on write. Verify SIDPR is actually working before enabling it. This is reported by Ryan Roth in bz#10512. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Ryan Roth <ryan.roth@ch2m.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-05-01 05:03:08 +04:00
/* SCR access via SIDPR doesn't work on some configurations.
* Give it a test drive by inhibiting power save modes which
* we'll do anyway.
*/
ata_piix: drop merged SCR access and use slave_link instead Now that libata has slave_link, there's no need to keep ugly merged SCR access. Drop it and use slave_link instead. This results in simpler code and much better separate link handling for master and slave. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:44 +04:00
piix_sidpr_scr_read(link0, SCR_CONTROL, &scontrol);
ata_piix: verify SIDPR access before enabling it On certain configurations (certain macbooks), even though all the conditions for SIDPR access described in the datasheet are met, actually reading those registers just returns 0 and have no effect on write. Verify SIDPR is actually working before enabling it. This is reported by Ryan Roth in bz#10512. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Ryan Roth <ryan.roth@ch2m.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-05-01 05:03:08 +04:00
/* if IPM is already 3, SCR access is probably working. Don't
* un-inhibit power save modes as BIOS might have inhibited
* them for a reason.
*/
if ((scontrol & 0xf00) != 0x300) {
scontrol |= 0x300;
ata_piix: drop merged SCR access and use slave_link instead Now that libata has slave_link, there's no need to keep ugly merged SCR access. Drop it and use slave_link instead. This results in simpler code and much better separate link handling for master and slave. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:44 +04:00
piix_sidpr_scr_write(link0, SCR_CONTROL, scontrol);
piix_sidpr_scr_read(link0, SCR_CONTROL, &scontrol);
ata_piix: verify SIDPR access before enabling it On certain configurations (certain macbooks), even though all the conditions for SIDPR access described in the datasheet are met, actually reading those registers just returns 0 and have no effect on write. Verify SIDPR is actually working before enabling it. This is reported by Ryan Roth in bz#10512. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Ryan Roth <ryan.roth@ch2m.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-05-01 05:03:08 +04:00
if ((scontrol & 0xf00) != 0x300) {
dev_printk(KERN_INFO, host->dev, "SCR access via "
"SIDPR is available but doesn't work\n");
ata_piix: drop merged SCR access and use slave_link instead Now that libata has slave_link, there's no need to keep ugly merged SCR access. Drop it and use slave_link instead. This results in simpler code and much better separate link handling for master and slave. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:44 +04:00
return 0;
ata_piix: verify SIDPR access before enabling it On certain configurations (certain macbooks), even though all the conditions for SIDPR access described in the datasheet are met, actually reading those registers just returns 0 and have no effect on write. Verify SIDPR is actually working before enabling it. This is reported by Ryan Roth in bz#10512. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Ryan Roth <ryan.roth@ch2m.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-05-01 05:03:08 +04:00
}
}
ata_piix: drop merged SCR access and use slave_link instead Now that libata has slave_link, there's no need to keep ugly merged SCR access. Drop it and use slave_link instead. This results in simpler code and much better separate link handling for master and slave. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:44 +04:00
/* okay, SCRs available, set ops and ask libata for slave_link */
for (i = 0; i < 2; i++) {
struct ata_port *ap = host->ports[i];
ap->ops = &piix_sidpr_sata_ops;
if (ap->flags & ATA_FLAG_SLAVE_POSS) {
rc = ata_slave_link_init(ap);
if (rc)
return rc;
}
}
return 0;
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
}
ata_piix: save, use saved and restore IOCFG Certain ACPI implementations mess up IOCFG on _STM making libata detect cable type incorrectly after a suspend/resume cycle. This patch makes ata_piix save IOCFG on attach, use the saved value for things which aren't dynamic and restore it on detach so that the next driver also gets the BIOS initialized value. This patch contains the following changes. * makes ich_pata_cable_detect() use saved_iocfg. * make piix_iocfg_bit18_quirk() take @host and use saved_iocfg. * hpriv allocation moved upwards to save iocfg before doing anything else. This fixes bz#11879. Andreas Mohr reported and diagnosed the problem. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Andreas Mohr <andi@lisas.de> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-01-02 06:04:48 +03:00
static void piix_iocfg_bit18_quirk(struct ata_host *host)
ata_piix: implement IOCFG bit18 quirk Some notebooks need bit18 of IOCFG to be cleared for the drive bay to work even though the bit is NOOP according to the datasheet. This patch implement IOCFG bit18 quirk and apply it to Clevo M570U. http://bugzilla.kernel.org/show_bug.cgi?id=8051 Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: D. Angelis <dangelis@beta-cae.gr> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 05:15:18 +04:00
{
drivers/firmware: const-ify DMI API and internals Three main sets of changes: 1) dmi_get_system_info() return value should have been marked const, since callers should not be changing that data. 2) const-ify DMI internals, since DMI firmware tables should, whenever possible, be marked const to ensure we never ever write to that data area. 3) const-ify DMI API, to enable marking tables const where possible in low-level drivers. And if we're really lucky, this might enable some additional optimizations on the part of the compiler. The bulk of the changes are #2 and #3, which are interrelated. #1 could have been a separate patch, but it was so small compared to the others, it was easier to roll it into this changeset. Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2007-10-03 23:15:40 +04:00
static const struct dmi_system_id sysids[] = {
ata_piix: implement IOCFG bit18 quirk Some notebooks need bit18 of IOCFG to be cleared for the drive bay to work even though the bit is NOOP according to the datasheet. This patch implement IOCFG bit18 quirk and apply it to Clevo M570U. http://bugzilla.kernel.org/show_bug.cgi?id=8051 Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: D. Angelis <dangelis@beta-cae.gr> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 05:15:18 +04:00
{
/* Clevo M570U sets IOCFG bit 18 if the cdrom
* isn't used to boot the system which
* disables the channel.
*/
.ident = "M570U",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Clevo Co."),
DMI_MATCH(DMI_PRODUCT_NAME, "M570U"),
},
},
[libata] ata_piix: properly terminate DMI system list If you don't terminate a list, bad things happen... Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-09-01 14:48:52 +04:00
{ } /* terminate list */
ata_piix: implement IOCFG bit18 quirk Some notebooks need bit18 of IOCFG to be cleared for the drive bay to work even though the bit is NOOP according to the datasheet. This patch implement IOCFG bit18 quirk and apply it to Clevo M570U. http://bugzilla.kernel.org/show_bug.cgi?id=8051 Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: D. Angelis <dangelis@beta-cae.gr> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 05:15:18 +04:00
};
ata_piix: save, use saved and restore IOCFG Certain ACPI implementations mess up IOCFG on _STM making libata detect cable type incorrectly after a suspend/resume cycle. This patch makes ata_piix save IOCFG on attach, use the saved value for things which aren't dynamic and restore it on detach so that the next driver also gets the BIOS initialized value. This patch contains the following changes. * makes ich_pata_cable_detect() use saved_iocfg. * make piix_iocfg_bit18_quirk() take @host and use saved_iocfg. * hpriv allocation moved upwards to save iocfg before doing anything else. This fixes bz#11879. Andreas Mohr reported and diagnosed the problem. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Andreas Mohr <andi@lisas.de> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-01-02 06:04:48 +03:00
struct pci_dev *pdev = to_pci_dev(host->dev);
struct piix_host_priv *hpriv = host->private_data;
ata_piix: implement IOCFG bit18 quirk Some notebooks need bit18 of IOCFG to be cleared for the drive bay to work even though the bit is NOOP according to the datasheet. This patch implement IOCFG bit18 quirk and apply it to Clevo M570U. http://bugzilla.kernel.org/show_bug.cgi?id=8051 Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: D. Angelis <dangelis@beta-cae.gr> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 05:15:18 +04:00
if (!dmi_check_system(sysids))
return;
/* The datasheet says that bit 18 is NOOP but certain systems
* seem to use it to disable a channel. Clear the bit on the
* affected systems.
*/
ata_piix: save, use saved and restore IOCFG Certain ACPI implementations mess up IOCFG on _STM making libata detect cable type incorrectly after a suspend/resume cycle. This patch makes ata_piix save IOCFG on attach, use the saved value for things which aren't dynamic and restore it on detach so that the next driver also gets the BIOS initialized value. This patch contains the following changes. * makes ich_pata_cable_detect() use saved_iocfg. * make piix_iocfg_bit18_quirk() take @host and use saved_iocfg. * hpriv allocation moved upwards to save iocfg before doing anything else. This fixes bz#11879. Andreas Mohr reported and diagnosed the problem. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Andreas Mohr <andi@lisas.de> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-01-02 06:04:48 +03:00
if (hpriv->saved_iocfg & (1 << 18)) {
ata_piix: implement IOCFG bit18 quirk Some notebooks need bit18 of IOCFG to be cleared for the drive bay to work even though the bit is NOOP according to the datasheet. This patch implement IOCFG bit18 quirk and apply it to Clevo M570U. http://bugzilla.kernel.org/show_bug.cgi?id=8051 Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: D. Angelis <dangelis@beta-cae.gr> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 05:15:18 +04:00
dev_printk(KERN_INFO, &pdev->dev,
"applying IOCFG bit18 quirk\n");
ata_piix: save, use saved and restore IOCFG Certain ACPI implementations mess up IOCFG on _STM making libata detect cable type incorrectly after a suspend/resume cycle. This patch makes ata_piix save IOCFG on attach, use the saved value for things which aren't dynamic and restore it on detach so that the next driver also gets the BIOS initialized value. This patch contains the following changes. * makes ich_pata_cable_detect() use saved_iocfg. * make piix_iocfg_bit18_quirk() take @host and use saved_iocfg. * hpriv allocation moved upwards to save iocfg before doing anything else. This fixes bz#11879. Andreas Mohr reported and diagnosed the problem. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Andreas Mohr <andi@lisas.de> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-01-02 06:04:48 +03:00
pci_write_config_dword(pdev, PIIX_IOCFG,
hpriv->saved_iocfg & ~(1 << 18));
ata_piix: implement IOCFG bit18 quirk Some notebooks need bit18 of IOCFG to be cleared for the drive bay to work even though the bit is NOOP according to the datasheet. This patch implement IOCFG bit18 quirk and apply it to Clevo M570U. http://bugzilla.kernel.org/show_bug.cgi?id=8051 Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: D. Angelis <dangelis@beta-cae.gr> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 05:15:18 +04:00
}
}
SATA PIIX: Blacklist system that spins off disks during ACPI power off Some notebooks from HP have the problem that their BIOSes attempt to spin down hard drives before entering ACPI system states S4 and S5. This leads to a yo-yo effect during system power-off shutdown and the last phase of hibernation when the disk is first spun down by the kernel and then almost immediately turned on and off by the BIOS. This, in turn, may result in shortening the disk's life times. To prevent this from happening we can blacklist the affected systems using DMI information. Blacklist HP 2510p that uses the ata_piix driver. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-01-19 22:59:22 +03:00
static bool piix_broken_system_poweroff(struct pci_dev *pdev)
{
static const struct dmi_system_id broken_systems[] = {
{
.ident = "HP Compaq 2510p",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq 2510p"),
},
/* PCI slot number of the controller */
.driver_data = (void *)0x1FUL,
},
ata_piix: Add HP Compaq nc6000 to the broken poweroff list HP Compaq nc6000 suffers from the double disk spindown issue. Add it to the broken poweroff DMI list. Signed-off-by: Ville Syrjala <syrjala@sci.fi> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-05-19 02:37:44 +04:00
{
.ident = "HP Compaq nc6000",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nc6000"),
},
/* PCI slot number of the controller */
.driver_data = (void *)0x1FUL,
},
SATA PIIX: Blacklist system that spins off disks during ACPI power off Some notebooks from HP have the problem that their BIOSes attempt to spin down hard drives before entering ACPI system states S4 and S5. This leads to a yo-yo effect during system power-off shutdown and the last phase of hibernation when the disk is first spun down by the kernel and then almost immediately turned on and off by the BIOS. This, in turn, may result in shortening the disk's life times. To prevent this from happening we can blacklist the affected systems using DMI information. Blacklist HP 2510p that uses the ata_piix driver. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-01-19 22:59:22 +03:00
{ } /* terminate list */
};
const struct dmi_system_id *dmi = dmi_first_match(broken_systems);
if (dmi) {
unsigned long slot = (unsigned long)dmi->driver_data;
/* apply the quirk only to on-board controllers */
return slot == PCI_SLOT(pdev->devfn);
}
return false;
}
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
/**
* piix_init_one - Register PIIX ATA PCI device with kernel services
* @pdev: PCI device to register
* @ent: Entry in piix_pci_tbl matching with @pdev
*
* Called from kernel PCI layer. We probe for combined mode (sigh),
* and then hand over control to libata, for it to do the rest.
*
* LOCKING:
* Inherited from PCI layer (may sleep).
*
* RETURNS:
* Zero on success, or -ERRNO value.
*/
ata_piix.c:piix_init_one() must be __devinit This patch fixes the following section mismatches: <-- snip --> ... WARNING: drivers/ata/built-in.o(.text+0x15072): Section mismatch in reference from the function piix_init_one() to the function .devinit.text:piix_init_sata_map() WARNING: drivers/ata/built-in.o(.text+0x150dd): Section mismatch in reference from the function piix_init_one() to the function .devinit.text:piix_init_pcs() WARNING: drivers/ata/built-in.o(.text+0x150e5): Section mismatch in reference from the function piix_init_one() to the function .devinit.text:piix_init_sidpr() WARNING: drivers/ata/built-in.o(.text+0x15107): Section mismatch in reference from the function piix_init_one() to the function .devinit.text:piix_check_450nx_errata() ... <-- snip --> Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-30 23:02:02 +03:00
static int __devinit piix_init_one(struct pci_dev *pdev,
const struct pci_device_id *ent)
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
{
static int printed_version;
libata: update libata LLDs to use devres Update libata LLDs to use devres. Core layer is already converted to support managed LLDs. This patch simplifies initialization and fixes many resource related bugs in init failure and detach path. For example, all converted drivers now handle ata_device_add() failure gracefully without excessive resource rollback code. As most resources are released automatically on driver detach, many drivers don't need or can do with much simpler ->{port|host}_stop(). In general, stop callbacks are need iff port or host needs to be given commands to shut it down. Note that freezing is enough in many cases and ports are automatically frozen before being detached. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 10:00:28 +03:00
struct device *dev = &pdev->dev;
[PATCH] ata_piix: implement proper port map Replace combined mode handling via PIIX_COMB/COMB_PATA_P0 with proper port map. PIIX now prints port configuration during initialization. ATA_FLAG_SLAVE_POSS is now turned on for SATA ports only when the slave device is actually avaliable. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-02-28 19:25:39 +03:00
struct ata_port_info port_info[2];
libata: clean up SFF init mess The intention of using port_mask in SFF init helpers was to eventually support exoctic configurations such as combination of legacy and native port on the same controller. This never became actually necessary and the related code always has been subtly broken one way or the other. Now that new init model is in place, there is no reason to make common helpers capable of handling all corner cases. Exotic cases can simply dealt within LLDs as necessary. This patch removes port_mask handling in SFF init helpers. SFF init helpers don't take n_ports argument and interpret it into port_mask anymore. All information is carried via port_info. n_ports argument is dropped and always two ports are allocated. LLD can tell SFF to skip certain port by marking it dummy. Note that SFF code has been treating unuvailable ports this way for a long time until recent breakage fix from Linus and is consistent with how other drivers handle with unavailable ports. This fixes 1-port legacy host handling still broken after the recent native mode fix and simplifies SFF init logic. The following changes are made... * ata_pci_init_native_host() and ata_init_legacy_host() both now try to initialized whatever they can and mark failed ports dummy. They return 0 if any port is successfully initialized. * ata_pci_prepare_native_host() and ata_pci_init_one() now doesn't take n_ports argument. All info should be specified via port_info array. Always two ports are allocated. * ata_pci_init_bmdma() exported to be used by LLDs in exotic cases. * port_info handling in all LLDs are standardized - all port_info arrays are const stack variable named ppi. Unless the second port is different from the first, its port_info is specified as NULL (tells libata that it's identical to the last non-NULL port_info). * pata_hpt37x/hpt3x2n: don't modify static variable directly. Make an on-stack copy instead as ata_piix does. * pata_uli: It has 4 ports instead of 2. Don't use ata_pci_prepare_native_host(). Allocate the host explicitly and use init helpers. It's simple enough. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-05-04 14:43:58 +04:00
const struct ata_port_info *ppi[] = { &port_info[0], &port_info[1] };
ata_piix: implement LPM support Now that DIPM can be used independently from HIPM, ata_piix can support LPM too. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-09-01 19:50:08 +04:00
struct scsi_host_template *sht = &piix_sht;
libata: Grand renaming. The biggest change is that ata_host_set is renamed to ata_host. * ata_host_set => ata_host * ata_probe_ent->host_flags => ata_probe_ent->port_flags * ata_probe_ent->host_set_flags => ata_probe_ent->_host_flags * ata_host_stats => ata_port_stats * ata_port->host => ata_port->scsi_host * ata_port->host_set => ata_port->host * ata_port_info->host_flags => ata_port_info->flags * ata_(.*)host_set(.*)\(\) => ata_\1host\2() The leading underscore in ata_probe_ent->_host_flags is to avoid reusing ->host_flags for different purpose. Currently, the only user of the field is libata-bmdma.c and probe_ent itself is scheduled to be removed. ata_port->host is reused for different purpose but this field is used inside libata core proper and of different type. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-24 11:19:22 +04:00
unsigned long port_flags;
ata_piix: convert to prepare - activate initialization ata_piix requires more configuration during initialization than most other SFF compliant controllers and one-go initialzation with ata_pci_one() is too rigid. This patch converts ata_piix to use two step prepare - activate initialization used by other more advanced controllers. This conversion brings the happy side effect of enabling PCI device before accessing PCI configuration registers. Other than that, there shouldn't be any behavior change. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:29 +03:00
struct ata_host *host;
struct piix_host_priv *hpriv;
int rc;
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
if (!printed_version++)
[libata ata_piix] use dev_printk() where appropriate
2005-10-30 14:42:18 +03:00
dev_printk(KERN_DEBUG, &pdev->dev,
"version " DRV_VERSION "\n");
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
ata_piix: Turn on hotplugging support for older chips We can't do this for the later ones as they have all sorts of magic boot time stuff that needs reviewing and the like. However we can do it for the older ones and it turns out we need to as some IBM docking stations have a second PIIX series device in them and without this change you can't use it very well Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-05-06 20:10:08 +04:00
/* no hotplugging support for later devices (FIXME) */
if (!in_module_init && ent->driver_data >= ich5_sata)
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
return -ENODEV;
SATA PIIX: Blacklist system that spins off disks during ACPI power off Some notebooks from HP have the problem that their BIOSes attempt to spin down hard drives before entering ACPI system states S4 and S5. This leads to a yo-yo effect during system power-off shutdown and the last phase of hibernation when the disk is first spun down by the kernel and then almost immediately turned on and off by the BIOS. This, in turn, may result in shortening the disk's life times. To prevent this from happening we can blacklist the affected systems using DMI information. Blacklist HP 2510p that uses the ata_piix driver. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-01-19 22:59:22 +03:00
if (piix_broken_system_poweroff(pdev)) {
piix_port_info[ent->driver_data].flags |=
ATA_FLAG_NO_POWEROFF_SPINDOWN |
ATA_FLAG_NO_HIBERNATE_SPINDOWN;
dev_info(&pdev->dev, "quirky BIOS, skipping spindown "
"on poweroff and hibernation\n");
}
ata_piix: convert to prepare - activate initialization ata_piix requires more configuration during initialization than most other SFF compliant controllers and one-go initialzation with ata_pci_one() is too rigid. This patch converts ata_piix to use two step prepare - activate initialization used by other more advanced controllers. This conversion brings the happy side effect of enabling PCI device before accessing PCI configuration registers. Other than that, there shouldn't be any behavior change. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:29 +03:00
port_info[0] = piix_port_info[ent->driver_data];
port_info[1] = piix_port_info[ent->driver_data];
port_flags = port_info[0].flags;
/* enable device and prepare host */
rc = pcim_enable_device(pdev);
if (rc)
return rc;
ata_piix: save, use saved and restore IOCFG Certain ACPI implementations mess up IOCFG on _STM making libata detect cable type incorrectly after a suspend/resume cycle. This patch makes ata_piix save IOCFG on attach, use the saved value for things which aren't dynamic and restore it on detach so that the next driver also gets the BIOS initialized value. This patch contains the following changes. * makes ich_pata_cable_detect() use saved_iocfg. * make piix_iocfg_bit18_quirk() take @host and use saved_iocfg. * hpriv allocation moved upwards to save iocfg before doing anything else. This fixes bz#11879. Andreas Mohr reported and diagnosed the problem. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Andreas Mohr <andi@lisas.de> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-01-02 06:04:48 +03:00
hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL);
if (!hpriv)
return -ENOMEM;
/* Save IOCFG, this will be used for cable detection, quirk
* detection and restoration on detach. This is necessary
* because some ACPI implementations mess up cable related
* bits on _STM. Reported on kernel bz#11879.
*/
pci_read_config_dword(pdev, PIIX_IOCFG, &hpriv->saved_iocfg);
ata_piix: don't attach to ICH6M in ahci mode ata_piix when attached to ICH6M in AHCI mode doesn't provide any benefit over using ahci and has detection problems. Don't let ata_piix claim ICH6M if it's in AHCI mode. This change makes ICH6R the only one which ata_piix can attach to even when it's in ahci mode which is necessary as some devices don't work properly under ahci mode. Drop PIIX_FLAG_AHCI and match the controller directly so that piix_disable_ahci() is called only for it. This change makes PIIX_SCC no longer used and it gets dropped too. This fixes bz 9491. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Robert M. Albrecht <romal@gmx.de> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 09:46:58 +03:00
/* ICH6R may be driven by either ata_piix or ahci driver
* regardless of BIOS configuration. Make sure AHCI mode is
* off.
*/
if (pdev->vendor == PCI_VENDOR_ID_INTEL && pdev->device == 0x2652) {
ata: duplicate variable sparse warning drivers/ata/ata_piix.c:1502:7: warning: symbol 'rc' shadows an earlier one Signed-off-by: Stephen Hemminger <shemminger@vyatta.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-09-08 20:31:39 +04:00
rc = piix_disable_ahci(pdev);
ata_piix: don't attach to ICH6M in ahci mode ata_piix when attached to ICH6M in AHCI mode doesn't provide any benefit over using ahci and has detection problems. Don't let ata_piix claim ICH6M if it's in AHCI mode. This change makes ICH6R the only one which ata_piix can attach to even when it's in ahci mode which is necessary as some devices don't work properly under ahci mode. Drop PIIX_FLAG_AHCI and match the controller directly so that piix_disable_ahci() is called only for it. This change makes PIIX_SCC no longer used and it gets dropped too. This fixes bz 9491. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Robert M. Albrecht <romal@gmx.de> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-03-26 09:46:58 +03:00
if (rc)
return rc;
}
ata_piix: convert to prepare - activate initialization ata_piix requires more configuration during initialization than most other SFF compliant controllers and one-go initialzation with ata_pci_one() is too rigid. This patch converts ata_piix to use two step prepare - activate initialization used by other more advanced controllers. This conversion brings the happy side effect of enabling PCI device before accessing PCI configuration registers. Other than that, there shouldn't be any behavior change. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:29 +03:00
/* SATA map init can change port_info, do it before prepping host */
if (port_flags & ATA_FLAG_SATA)
hpriv->map = piix_init_sata_map(pdev, port_info,
piix_map_db_table[ent->driver_data]);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
libata-sff: separate out BMDMA init Separate out ata_pci_bmdma_prepare_host() and ata_pci_bmdma_init_one() from their SFF counterparts. SFF ones no longer try to initialize BMDMA or set PCI master. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-05-20 00:10:22 +04:00
rc = ata_pci_bmdma_prepare_host(pdev, ppi, &host);
ata_piix: convert to prepare - activate initialization ata_piix requires more configuration during initialization than most other SFF compliant controllers and one-go initialzation with ata_pci_one() is too rigid. This patch converts ata_piix to use two step prepare - activate initialization used by other more advanced controllers. This conversion brings the happy side effect of enabling PCI device before accessing PCI configuration registers. Other than that, there shouldn't be any behavior change. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:29 +03:00
if (rc)
return rc;
host->private_data = hpriv;
[PATCH] ata_piix: fix MAP VALUE interpretation for for ICH6/7 Unlike their older siblings, ICH6 and 7 use different scheme for MAP VALUE. This patch makes ata_piix interpret MV properly on ICH6/7. Pre-ICH6/7 The value of these bits indicate the address range the SATA port responds to, and whether or not the SATA and IDE functions are combined. 000 = Non-combined. P0 is primary master. P1 is secondary master. 001 = Non-combined. P0 is secondary master. P1 is primary master. 100 = Combined. P0 is primary master. P1 is primary slave. P-ATA is 2:0 Map Value secondary. 101 = Combined. P0 is primary slave. P1 is primary master. P-ATA is secondary. 110 = Combined. P-ATA is primary. P0 is secondary master. P1 is secondary slave. 111 = Combined. P-ATA is primary. P0 is secondary slave. P1 is secondary master. ICH6/7 Map Value - R/W. Map Value (MV): The value in the bits below indicate the address range the SATA ports responds to, and whether or not the PATA and SATA functions are combined. When in combined mode, the AHCI memory space is not available and AHCI may not be used. 00 = Non-combined. P0 is primary master, P2 is the primary slave. P1 is secondary master, P3 is the 1:0 secondary slave (desktop only). P0 is primary master, P2 is the primary slave (mobile only). 01 = Combined. IDE is primary. P1 is secondary master, P3 is the secondary slave. (desktop only) 10 = Combined. P0 is primary master. P2 is primary slave. IDE is secondary 11 = Reserved Signed-off-by: Tejun Heo <htejun@gmail.com> -- Jeff, without this patch, ata_piix misdetects my ICH7's combined mode, ending up not applying bridge limits to PX-710SA and configuring IDE drive on 40-c cable to UDMA/66. Thanks. Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
2005-12-18 11:17:07 +03:00
ata_piix: convert to prepare - activate initialization ata_piix requires more configuration during initialization than most other SFF compliant controllers and one-go initialzation with ata_pci_one() is too rigid. This patch converts ata_piix to use two step prepare - activate initialization used by other more advanced controllers. This conversion brings the happy side effect of enabling PCI device before accessing PCI configuration registers. Other than that, there shouldn't be any behavior change. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:29 +03:00
/* initialize controller */
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
if (port_flags & ATA_FLAG_SATA) {
ata_piix: convert to prepare - activate initialization ata_piix requires more configuration during initialization than most other SFF compliant controllers and one-go initialzation with ata_pci_one() is too rigid. This patch converts ata_piix to use two step prepare - activate initialization used by other more advanced controllers. This conversion brings the happy side effect of enabling PCI device before accessing PCI configuration registers. Other than that, there shouldn't be any behavior change. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:29 +03:00
piix_init_pcs(host, piix_map_db_table[ent->driver_data]);
ata_piix: drop merged SCR access and use slave_link instead Now that libata has slave_link, there's no need to keep ugly merged SCR access. Drop it and use slave_link instead. This results in simpler code and much better separate link handling for master and slave. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-31 12:02:44 +04:00
rc = piix_init_sidpr(host);
if (rc)
return rc;
ata_piix: implement LPM support Now that DIPM can be used independently from HIPM, ata_piix can support LPM too. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-09-01 19:50:08 +04:00
if (host->ports[0]->ops == &piix_sidpr_sata_ops)
sht = &piix_sidpr_sht;
ata_piix: implement SIDPR SCR access For ICH8, SCRs can be accessed using index and data register pair located at BAR 5. This patch implements support for it such that PHY status, errors and hardreset are available for those controllers. This is the only case where two devices on a PATA channel have access to SCRs and creates a unique problem of mapping two SCRs to one link. Note that this is different from PMP case in that they aren't quite separate links - e.g. softreset resets both devices. This problem is worked around by merging the SCR values. To upper layer, it looks like there is a single link with one set of SCRs but with two devices. This works well enough for PHY event, error reporting and hardreset. Supporting hardreset is important because in rare cases SATA devices fail to recover without it after PHY errors. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:30 +03:00
}
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
ata_piix: implement IOCFG bit18 quirk Some notebooks need bit18 of IOCFG to be cleared for the drive bay to work even though the bit is NOOP according to the datasheet. This patch implement IOCFG bit18 quirk and apply it to Clevo M570U. http://bugzilla.kernel.org/show_bug.cgi?id=8051 Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: D. Angelis <dangelis@beta-cae.gr> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 05:15:18 +04:00
/* apply IOCFG bit18 quirk */
ata_piix: save, use saved and restore IOCFG Certain ACPI implementations mess up IOCFG on _STM making libata detect cable type incorrectly after a suspend/resume cycle. This patch makes ata_piix save IOCFG on attach, use the saved value for things which aren't dynamic and restore it on detach so that the next driver also gets the BIOS initialized value. This patch contains the following changes. * makes ich_pata_cable_detect() use saved_iocfg. * make piix_iocfg_bit18_quirk() take @host and use saved_iocfg. * hpriv allocation moved upwards to save iocfg before doing anything else. This fixes bz#11879. Andreas Mohr reported and diagnosed the problem. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Andreas Mohr <andi@lisas.de> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-01-02 06:04:48 +03:00
piix_iocfg_bit18_quirk(host);
ata_piix: implement IOCFG bit18 quirk Some notebooks need bit18 of IOCFG to be cleared for the drive bay to work even though the bit is NOOP according to the datasheet. This patch implement IOCFG bit18 quirk and apply it to Clevo M570U. http://bugzilla.kernel.org/show_bug.cgi?id=8051 Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: D. Angelis <dangelis@beta-cae.gr> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 05:15:18 +04:00
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
/* On ICH5, some BIOSen disable the interrupt using the
* PCI_COMMAND_INTX_DISABLE bit added in PCI 2.3.
* On ICH6, this bit has the same effect, but only when
* MSI is disabled (and it is disabled, as we don't use
* message-signalled interrupts currently).
*/
libata: Grand renaming. The biggest change is that ata_host_set is renamed to ata_host. * ata_host_set => ata_host * ata_probe_ent->host_flags => ata_probe_ent->port_flags * ata_probe_ent->host_set_flags => ata_probe_ent->_host_flags * ata_host_stats => ata_port_stats * ata_port->host => ata_port->scsi_host * ata_port->host_set => ata_port->host * ata_port_info->host_flags => ata_port_info->flags * ata_(.*)host_set(.*)\(\) => ata_\1host\2() The leading underscore in ata_probe_ent->_host_flags is to avoid reusing ->host_flags for different purpose. Currently, the only user of the field is libata-bmdma.c and probe_ent itself is scheduled to be removed. ata_port->host is reused for different purpose but this field is used inside libata core proper and of different type. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-24 11:19:22 +04:00
if (port_flags & PIIX_FLAG_CHECKINTR)
[PATCH] PCI/libata INTx cleanup Simple cleanup to eliminate X copies of the pci_enable_intx() function in libata. Moved ahci.c's pci_intx() to pci.c and use it throughout libata and msi.c. Signed-off-by: Brett Russ <russb@emc.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2005-08-15 23:23:41 +04:00
pci_intx(pdev, 1);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
[PATCH] libata: ata_piix 450NX errata Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
2005-12-08 22:22:28 +03:00
if (piix_check_450nx_errata(pdev)) {
/* This writes into the master table but it does not
really matter for this errata as we will apply it to
all the PIIX devices on the board */
ata_piix: convert to prepare - activate initialization ata_piix requires more configuration during initialization than most other SFF compliant controllers and one-go initialzation with ata_pci_one() is too rigid. This patch converts ata_piix to use two step prepare - activate initialization used by other more advanced controllers. This conversion brings the happy side effect of enabling PCI device before accessing PCI configuration registers. Other than that, there shouldn't be any behavior change. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:29 +03:00
host->ports[0]->mwdma_mask = 0;
host->ports[0]->udma_mask = 0;
host->ports[1]->mwdma_mask = 0;
host->ports[1]->udma_mask = 0;
[PATCH] libata: ata_piix 450NX errata Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
2005-12-08 22:22:28 +03:00
}
[libata] ata_piix: Enable parallel scan This patch turns on parallel scanning for the ata_piix driver. This driver is used on most netbooks (no AHCI for cheap storage it seems). The scan is the dominating time factor in the kernel boot for these devices; with this flag it gets cut in half for the device I used for testing (eeepc). Alan took a look at the driver source and concluded that it ought to be safe to do for this driver. Alan has also checked with the hardware team. Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-05-13 18:02:42 +04:00
host->flags |= ATA_HOST_PARALLEL_SCAN;
ata_piix: convert to prepare - activate initialization ata_piix requires more configuration during initialization than most other SFF compliant controllers and one-go initialzation with ata_pci_one() is too rigid. This patch converts ata_piix to use two step prepare - activate initialization used by other more advanced controllers. This conversion brings the happy side effect of enabling PCI device before accessing PCI configuration registers. Other than that, there shouldn't be any behavior change. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2008-01-18 12:36:29 +03:00
pci_set_master(pdev);
ata_piix: implement LPM support Now that DIPM can be used independently from HIPM, ata_piix can support LPM too. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-09-01 19:50:08 +04:00
return ata_pci_sff_activate_host(host, ata_bmdma_interrupt, sht);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
}
ata_piix: save, use saved and restore IOCFG Certain ACPI implementations mess up IOCFG on _STM making libata detect cable type incorrectly after a suspend/resume cycle. This patch makes ata_piix save IOCFG on attach, use the saved value for things which aren't dynamic and restore it on detach so that the next driver also gets the BIOS initialized value. This patch contains the following changes. * makes ich_pata_cable_detect() use saved_iocfg. * make piix_iocfg_bit18_quirk() take @host and use saved_iocfg. * hpriv allocation moved upwards to save iocfg before doing anything else. This fixes bz#11879. Andreas Mohr reported and diagnosed the problem. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Andreas Mohr <andi@lisas.de> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-01-02 06:04:48 +03:00
static void piix_remove_one(struct pci_dev *pdev)
{
struct ata_host *host = dev_get_drvdata(&pdev->dev);
struct piix_host_priv *hpriv = host->private_data;
pci_write_config_dword(pdev, PIIX_IOCFG, hpriv->saved_iocfg);
ata_pci_remove_one(pdev);
}
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
static int __init piix_init(void)
{
int rc;
[PATCH] libata: replace pci_module_init() with pci_register_driver() Replace pci_module_init() with pci_register_driver(). Signed-off-by: Pavel Roskin <proski@gnu.org> Signed-off-by: Tejun Heo <htejun@gmail.com>
2006-08-10 13:13:18 +04:00
DPRINTK("pci_register_driver\n");
rc = pci_register_driver(&piix_pci_driver);
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
2005-04-17 02:20:36 +04:00
if (rc)
return rc;
in_module_init = 0;
DPRINTK("done\n");
return 0;
}
static void __exit piix_exit(void)
{
pci_unregister_driver(&piix_pci_driver);
}
module_init(piix_init);
module_exit(piix_exit);
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