2009-11-03 11:23:50 +02:00
/*
* linux / drivers / video / omap2 / dss / dss . h
*
* Copyright ( C ) 2009 Nokia Corporation
* Author : Tomi Valkeinen < tomi . valkeinen @ nokia . com >
*
* Some code and ideas taken from drivers / video / omap / driver
* by Imre Deak .
*
* This program is free software ; you can redistribute it and / or modify it
* under the terms of the GNU General Public License version 2 as published by
* the Free Software Foundation .
*
* This program is distributed in the hope that it will be useful , but WITHOUT
* ANY WARRANTY ; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE . See the GNU General Public License for
* more details .
*
* You should have received a copy of the GNU General Public License along with
* this program . If not , see < http : //www.gnu.org/licenses/>.
*/
# ifndef __OMAP2_DSS_H
# define __OMAP2_DSS_H
2012-10-10 15:55:19 +03:00
# include <linux/interrupt.h>
2012-09-24 17:12:58 +05:30
# ifdef pr_fmt
# undef pr_fmt
2009-11-03 11:23:50 +02:00
# endif
2012-09-24 17:12:58 +05:30
# ifdef DSS_SUBSYS_NAME
# define pr_fmt(fmt) DSS_SUBSYS_NAME ": " fmt
# else
# define pr_fmt(fmt) fmt
2009-11-03 11:23:50 +02:00
# endif
2012-09-24 17:12:58 +05:30
# define DSSDBG(format, ...) \
pr_debug ( format , # # __VA_ARGS__ )
2009-11-03 11:23:50 +02:00
# ifdef DSS_SUBSYS_NAME
# define DSSERR(format, ...) \
printk ( KERN_ERR " omapdss " DSS_SUBSYS_NAME " error: " format , \
# # __VA_ARGS__)
# else
# define DSSERR(format, ...) \
printk ( KERN_ERR " omapdss error: " format , # # __VA_ARGS__ )
# endif
# ifdef DSS_SUBSYS_NAME
# define DSSINFO(format, ...) \
printk ( KERN_INFO " omapdss " DSS_SUBSYS_NAME " : " format , \
# # __VA_ARGS__)
# else
# define DSSINFO(format, ...) \
printk ( KERN_INFO " omapdss: " format , # # __VA_ARGS__ )
# endif
# ifdef DSS_SUBSYS_NAME
# define DSSWARN(format, ...) \
printk ( KERN_WARNING " omapdss " DSS_SUBSYS_NAME " : " format , \
# # __VA_ARGS__)
# else
# define DSSWARN(format, ...) \
printk ( KERN_WARNING " omapdss: " format , # # __VA_ARGS__ )
# endif
/* OMAP TRM gives bitfields as start:end, where start is the higher bit
number . For example 7 : 0 */
# define FLD_MASK(start, end) (((1 << ((start) - (end) + 1)) - 1) << (end))
# define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end))
# define FLD_GET(val, start, end) (((val) & FLD_MASK(start, end)) >> (end))
# define FLD_MOD(orig, val, start, end) \
( ( ( orig ) & ~ FLD_MASK ( start , end ) ) | FLD_VAL ( val , start , end ) )
2011-08-22 17:41:57 +05:30
enum dss_io_pad_mode {
DSS_IO_PAD_MODE_RESET ,
DSS_IO_PAD_MODE_RFBI ,
DSS_IO_PAD_MODE_BYPASS ,
2009-11-03 11:23:50 +02:00
} ;
2011-03-09 16:31:38 +05:30
enum dss_hdmi_venc_clk_source_select {
DSS_VENC_TV_CLK = 0 ,
DSS_HDMI_M_PCLK = 1 ,
} ;
2011-08-25 18:35:58 +05:30
enum dss_dsi_content_type {
DSS_DSI_CONTENT_DCS ,
DSS_DSI_CONTENT_GENERIC ,
} ;
2012-09-22 12:38:19 +05:30
enum dss_writeback_channel {
DSS_WB_LCD1_MGR = 0 ,
DSS_WB_LCD2_MGR = 1 ,
DSS_WB_TV_MGR = 2 ,
DSS_WB_OVL0 = 3 ,
DSS_WB_OVL1 = 4 ,
DSS_WB_OVL2 = 5 ,
DSS_WB_OVL3 = 6 ,
DSS_WB_LCD3_MGR = 7 ,
} ;
2009-11-03 11:23:50 +02:00
struct dispc_clock_info {
/* rates that we get with dividers below */
unsigned long lck ;
unsigned long pck ;
/* dividers */
u16 lck_div ;
u16 pck_div ;
} ;
struct dsi_clock_info {
/* rates that we get with dividers below */
unsigned long fint ;
unsigned long clkin4ddr ;
unsigned long clkin ;
2011-03-08 05:50:35 -06:00
unsigned long dsi_pll_hsdiv_dispc_clk ; /* OMAP3: DSI1_PLL_CLK
* OMAP4 : PLLx_CLK1 */
unsigned long dsi_pll_hsdiv_dsi_clk ; /* OMAP3: DSI2_PLL_CLK
* OMAP4 : PLLx_CLK2 */
2009-11-03 11:23:50 +02:00
unsigned long lp_clk ;
/* dividers */
u16 regn ;
u16 regm ;
2011-03-08 05:50:35 -06:00
u16 regm_dispc ; /* OMAP3: REGM3
* OMAP4 : REGM4 */
u16 regm_dsi ; /* OMAP3: REGM4
* OMAP4 : REGM5 */
2009-11-03 11:23:50 +02:00
u16 lp_clk_div ;
} ;
2012-06-21 11:07:44 +05:30
struct reg_field {
u16 reg ;
u8 high ;
u8 low ;
} ;
2012-06-29 14:03:48 +05:30
struct dss_lcd_mgr_config {
enum dss_io_pad_mode io_pad_mode ;
bool stallmode ;
bool fifohandcheck ;
struct dispc_clock_info clock_info ;
int video_port_width ;
int lcden_sig_polarity ;
} ;
2009-11-03 11:23:50 +02:00
struct seq_file ;
struct platform_device ;
/* core */
2012-10-10 10:46:06 +03:00
struct platform_device * dss_get_core_pdev ( void ) ;
2012-02-20 11:50:06 +02:00
int dss_dsi_enable_pads ( int dsi_id , unsigned lane_mask ) ;
void dss_dsi_disable_pads ( int dsi_id , unsigned lane_mask ) ;
2012-03-08 12:52:38 +02:00
int dss_set_min_bus_tput ( struct device * dev , unsigned long tput ) ;
2012-03-02 18:01:07 +02:00
int dss_debugfs_create_file ( const char * name , void ( * write ) ( struct seq_file * ) ) ;
2009-11-03 11:23:50 +02:00
/* display */
int dss_suspend_all_devices ( void ) ;
int dss_resume_all_devices ( void ) ;
void dss_disable_all_devices ( void ) ;
2013-02-13 13:40:19 +02:00
int display_init_sysfs ( struct platform_device * pdev ) ;
void display_uninit_sysfs ( struct platform_device * pdev ) ;
2009-11-03 11:23:50 +02:00
/* manager */
2013-05-14 10:53:21 +03:00
int dss_init_overlay_managers ( void ) ;
void dss_uninit_overlay_managers ( void ) ;
int dss_init_overlay_managers_sysfs ( struct platform_device * pdev ) ;
void dss_uninit_overlay_managers_sysfs ( struct platform_device * pdev ) ;
2011-12-13 13:18:52 +02:00
int dss_mgr_simple_check ( struct omap_overlay_manager * mgr ,
const struct omap_overlay_manager_info * info ) ;
2012-04-27 01:07:28 +05:30
int dss_mgr_check_timings ( struct omap_overlay_manager * mgr ,
const struct omap_video_timings * timings ) ;
2011-12-08 10:32:37 +02:00
int dss_mgr_check ( struct omap_overlay_manager * mgr ,
struct omap_overlay_manager_info * info ,
2012-04-27 01:22:28 +05:30
const struct omap_video_timings * mgr_timings ,
2012-05-23 17:01:35 +05:30
const struct dss_lcd_mgr_config * config ,
2011-12-08 10:32:37 +02:00
struct omap_overlay_info * * overlay_infos ) ;
2009-11-03 11:23:50 +02:00
2012-06-29 14:37:03 +05:30
static inline bool dss_mgr_is_lcd ( enum omap_channel id )
{
if ( id = = OMAP_DSS_CHANNEL_LCD | | id = = OMAP_DSS_CHANNEL_LCD2 | |
id = = OMAP_DSS_CHANNEL_LCD3 )
return true ;
else
return false ;
}
2012-08-06 14:44:09 +03:00
int dss_manager_kobj_init ( struct omap_overlay_manager * mgr ,
struct platform_device * pdev ) ;
void dss_manager_kobj_uninit ( struct omap_overlay_manager * mgr ) ;
2009-11-03 11:23:50 +02:00
/* overlay */
void dss_init_overlays ( struct platform_device * pdev ) ;
void dss_uninit_overlays ( struct platform_device * pdev ) ;
void dss_overlay_setup_dispc_manager ( struct omap_overlay_manager * mgr ) ;
2011-12-13 13:18:52 +02:00
int dss_ovl_simple_check ( struct omap_overlay * ovl ,
const struct omap_overlay_info * info ) ;
2012-04-27 01:22:28 +05:30
int dss_ovl_check ( struct omap_overlay * ovl , struct omap_overlay_info * info ,
const struct omap_video_timings * mgr_timings ) ;
2012-06-25 14:58:48 +05:30
bool dss_ovl_use_replication ( struct dss_lcd_mgr_config config ,
enum omap_color_mode mode ) ;
2012-08-06 14:40:00 +03:00
int dss_overlay_kobj_init ( struct omap_overlay * ovl ,
struct platform_device * pdev ) ;
void dss_overlay_kobj_uninit ( struct omap_overlay * ovl ) ;
2009-11-03 11:23:50 +02:00
/* DSS */
2012-02-17 17:41:13 +02:00
int dss_init_platform_driver ( void ) __init ;
2011-01-24 06:21:57 +00:00
void dss_uninit_platform_driver ( void ) ;
2009-11-03 11:23:50 +02:00
2012-12-12 10:37:03 +02:00
unsigned long dss_get_dispc_clk_rate ( void ) ;
2012-09-21 12:09:54 +03:00
int dss_dpi_select_source ( enum omap_channel channel ) ;
2011-03-09 16:31:38 +05:30
void dss_select_hdmi_venc_clk_source ( enum dss_hdmi_venc_clk_source_select ) ;
2011-08-31 14:33:31 +03:00
enum dss_hdmi_venc_clk_source_select dss_get_hdmi_venc_clk_source ( void ) ;
2011-04-12 13:52:23 +05:30
const char * dss_get_generic_clk_source_name ( enum omap_dss_clk_source clk_src ) ;
2011-01-24 06:21:58 +00:00
void dss_dump_clocks ( struct seq_file * s ) ;
2009-11-03 11:23:50 +02:00
2012-09-29 11:25:42 +05:30
# if defined(CONFIG_OMAP2_DSS_DEBUGFS)
2011-01-24 06:21:58 +00:00
void dss_debug_dump_clocks ( struct seq_file * s ) ;
# endif
2009-11-03 11:23:50 +02:00
2012-11-28 17:01:39 +05:30
int dss_get_ctx_loss_count ( void ) ;
2012-07-20 17:18:49 +05:30
void dss_sdi_init ( int datapairs ) ;
2009-11-03 11:23:50 +02:00
int dss_sdi_enable ( void ) ;
void dss_sdi_disable ( void ) ;
2011-05-12 17:26:29 +05:30
void dss_select_dsi_clk_source ( int dsi_module ,
enum omap_dss_clk_source clk_src ) ;
2011-03-08 05:50:35 -06:00
void dss_select_lcd_clk_source ( enum omap_channel channel ,
2011-04-12 13:52:23 +05:30
enum omap_dss_clk_source clk_src ) ;
enum omap_dss_clk_source dss_get_dispc_clk_source ( void ) ;
2011-05-12 17:26:29 +05:30
enum omap_dss_clk_source dss_get_dsi_clk_source ( int dsi_module ) ;
2011-04-12 13:52:23 +05:30
enum omap_dss_clk_source dss_get_lcd_clk_source ( enum omap_channel channel ) ;
2010-01-08 18:00:36 +02:00
2009-11-03 11:23:50 +02:00
void dss_set_venc_output ( enum omap_dss_venc_type type ) ;
void dss_set_dac_pwrdn_bgz ( bool enable ) ;
2013-10-31 14:44:23 +02:00
int dss_set_fck_rate ( unsigned long rate ) ;
2009-11-03 11:23:50 +02:00
2013-10-31 14:44:23 +02:00
typedef bool ( * dss_div_calc_func ) ( unsigned long fck , void * data ) ;
2013-03-05 16:34:05 +02:00
bool dss_div_calc ( unsigned long fck_min , dss_div_calc_func func , void * data ) ;
2009-11-03 11:23:50 +02:00
/* SDI */
2012-02-17 17:41:13 +02:00
int sdi_init_platform_driver ( void ) __init ;
void sdi_uninit_platform_driver ( void ) __exit ;
2009-11-03 11:23:50 +02:00
/* DSI */
2013-04-18 12:16:39 +03:00
typedef bool ( * dsi_pll_calc_func ) ( int regn , int regm , unsigned long fint ,
unsigned long pll , void * data ) ;
typedef bool ( * dsi_hsdiv_calc_func ) ( int regm_dispc , unsigned long dispc ,
void * data ) ;
2010-05-07 11:58:41 +02:00
# ifdef CONFIG_OMAP2_DSS_DSI
2011-05-12 17:26:29 +05:30
struct dentry ;
struct file_operations ;
2012-02-17 17:41:13 +02:00
int dsi_init_platform_driver ( void ) __init ;
void dsi_uninit_platform_driver ( void ) __exit ;
2009-11-03 11:23:50 +02:00
2011-05-27 10:52:19 +03:00
int dsi_runtime_get ( struct platform_device * dsidev ) ;
void dsi_runtime_put ( struct platform_device * dsidev ) ;
2009-11-03 11:23:50 +02:00
void dsi_dump_clocks ( struct seq_file * s ) ;
void dsi_irq_handler ( void ) ;
2011-09-08 18:42:16 +05:30
u8 dsi_get_pixel_size ( enum omap_dss_dsi_pixel_format fmt ) ;
2013-03-05 16:39:00 +02:00
unsigned long dsi_get_pll_clkin ( struct platform_device * dsidev ) ;
bool dsi_hsdiv_calc ( struct platform_device * dsidev , unsigned long pll ,
unsigned long out_min , dsi_hsdiv_calc_func func , void * data ) ;
bool dsi_pll_calc ( struct platform_device * dsidev , unsigned long clkin ,
unsigned long pll_min , unsigned long pll_max ,
dsi_pll_calc_func func , void * data ) ;
2011-05-12 17:26:26 +05:30
unsigned long dsi_get_pll_hsdiv_dispc_rate ( struct platform_device * dsidev ) ;
int dsi_pll_set_clock_div ( struct platform_device * dsidev ,
struct dsi_clock_info * cinfo ) ;
int dsi_pll_init ( struct platform_device * dsidev , bool enable_hsclk ,
bool enable_hsdiv ) ;
void dsi_pll_uninit ( struct platform_device * dsidev , bool disconnect_lanes ) ;
void dsi_wait_pll_hsdiv_dispc_active ( struct platform_device * dsidev ) ;
void dsi_wait_pll_hsdiv_dsi_active ( struct platform_device * dsidev ) ;
struct platform_device * dsi_get_dsidev_from_id ( int module ) ;
2010-05-07 11:58:41 +02:00
# else
2011-05-27 10:52:19 +03:00
static inline int dsi_runtime_get ( struct platform_device * dsidev )
{
return 0 ;
}
static inline void dsi_runtime_put ( struct platform_device * dsidev )
{
}
2011-09-08 18:42:16 +05:30
static inline u8 dsi_get_pixel_size ( enum omap_dss_dsi_pixel_format fmt )
{
WARN ( " %s: DSI not compiled in, returning pixel_size as 0 \n " , __func__ ) ;
return 0 ;
}
2011-05-12 17:26:26 +05:30
static inline unsigned long dsi_get_pll_hsdiv_dispc_rate ( struct platform_device * dsidev )
2011-03-08 05:50:34 -06:00
{
WARN ( " %s: DSI not compiled in, returning rate as 0 \n " , __func__ ) ;
return 0 ;
}
2011-04-30 15:38:15 +03:00
static inline int dsi_pll_set_clock_div ( struct platform_device * dsidev ,
struct dsi_clock_info * cinfo )
{
WARN ( " %s: DSI not compiled in \n " , __func__ ) ;
return - ENODEV ;
}
static inline int dsi_pll_init ( struct platform_device * dsidev ,
bool enable_hsclk , bool enable_hsdiv )
{
WARN ( " %s: DSI not compiled in \n " , __func__ ) ;
return - ENODEV ;
}
static inline void dsi_pll_uninit ( struct platform_device * dsidev ,
bool disconnect_lanes )
{
}
2011-05-12 17:26:26 +05:30
static inline void dsi_wait_pll_hsdiv_dispc_active ( struct platform_device * dsidev )
2010-06-09 15:28:12 +03:00
{
}
2011-05-12 17:26:26 +05:30
static inline void dsi_wait_pll_hsdiv_dsi_active ( struct platform_device * dsidev )
2010-06-09 15:28:12 +03:00
{
}
2011-05-12 17:26:26 +05:30
static inline struct platform_device * dsi_get_dsidev_from_id ( int module )
{
return NULL ;
}
2013-04-18 12:16:39 +03:00
static inline unsigned long dsi_get_pll_clkin ( struct platform_device * dsidev )
{
return 0 ;
}
static inline bool dsi_hsdiv_calc ( struct platform_device * dsidev ,
unsigned long pll , unsigned long out_min ,
dsi_hsdiv_calc_func func , void * data )
{
return false ;
}
static inline bool dsi_pll_calc ( struct platform_device * dsidev ,
unsigned long clkin ,
unsigned long pll_min , unsigned long pll_max ,
dsi_pll_calc_func func , void * data )
{
return false ;
}
2010-05-07 11:58:41 +02:00
# endif
2009-11-03 11:23:50 +02:00
/* DPI */
2012-02-17 17:41:13 +02:00
int dpi_init_platform_driver ( void ) __init ;
void dpi_uninit_platform_driver ( void ) __exit ;
2009-11-03 11:23:50 +02:00
/* DISPC */
2012-02-17 17:41:13 +02:00
int dispc_init_platform_driver ( void ) __init ;
void dispc_uninit_platform_driver ( void ) __exit ;
2009-11-03 11:23:50 +02:00
void dispc_dump_clocks ( struct seq_file * s ) ;
void dispc_enable_sidle ( void ) ;
void dispc_disable_sidle ( void ) ;
void dispc_lcd_enable_signal ( bool enable ) ;
void dispc_pck_free_enable ( bool enable ) ;
2011-08-16 13:49:15 +03:00
void dispc_enable_fifomerge ( bool enable ) ;
void dispc_enable_gamma_table ( bool enable ) ;
void dispc_set_loadmode ( enum omap_dss_load_mode mode ) ;
2013-03-05 16:32:08 +02:00
typedef bool ( * dispc_div_calc_func ) ( int lckd , int pckd , unsigned long lck ,
unsigned long pck , void * data ) ;
bool dispc_div_calc ( unsigned long dispc ,
unsigned long pck_min , unsigned long pck_max ,
dispc_div_calc_func func , void * data ) ;
2012-04-16 12:53:44 +05:30
bool dispc_mgr_timings_ok ( enum omap_channel channel ,
2012-04-27 01:07:28 +05:30
const struct omap_video_timings * timings ) ;
2011-08-16 13:49:15 +03:00
unsigned long dispc_fclk_rate ( void ) ;
int dispc_calc_clock_rates ( unsigned long dispc_fclk_rate ,
struct dispc_clock_info * cinfo ) ;
2011-10-31 08:58:52 +02:00
void dispc_ovl_set_fifo_threshold ( enum omap_plane plane , u32 low , u32 high ) ;
2012-01-13 13:17:01 +02:00
void dispc_ovl_compute_fifo_thresholds ( enum omap_plane plane ,
2012-05-15 15:31:01 +03:00
u32 * fifo_low , u32 * fifo_high , bool use_fifomerge ,
bool manual_update ) ;
2012-11-07 18:17:35 +02:00
2011-08-16 13:49:15 +03:00
unsigned long dispc_mgr_lclk_rate ( enum omap_channel channel ) ;
unsigned long dispc_mgr_pclk_rate ( enum omap_channel channel ) ;
2012-04-23 12:16:50 +05:30
unsigned long dispc_core_clk_rate ( void ) ;
2012-06-29 14:00:54 +05:30
void dispc_mgr_set_clock_div ( enum omap_channel channel ,
2012-10-03 09:09:11 +02:00
const struct dispc_clock_info * cinfo ) ;
2011-08-16 13:45:15 +03:00
int dispc_mgr_get_clock_div ( enum omap_channel channel ,
2010-12-02 11:27:11 +00:00
struct dispc_clock_info * cinfo ) ;
2013-05-16 10:44:13 +03:00
void dispc_set_tv_pclk ( unsigned long pclk ) ;
2009-11-03 11:23:50 +02:00
2012-09-22 12:39:33 +05:30
u32 dispc_wb_get_framedone_irq ( void ) ;
bool dispc_wb_go_busy ( void ) ;
void dispc_wb_go ( void ) ;
void dispc_wb_enable ( bool enable ) ;
bool dispc_wb_is_enabled ( void ) ;
2012-09-22 12:38:19 +05:30
void dispc_wb_set_channel_in ( enum dss_writeback_channel channel ) ;
2012-08-31 12:32:52 +05:30
int dispc_wb_setup ( const struct omap_dss_writeback_info * wi ,
2012-08-24 16:59:26 +05:30
bool mem_to_mem , const struct omap_video_timings * timings ) ;
2012-09-22 12:38:19 +05:30
2009-11-03 11:23:50 +02:00
/* VENC */
2012-02-17 17:41:13 +02:00
int venc_init_platform_driver ( void ) __init ;
void venc_uninit_platform_driver ( void ) __exit ;
2009-11-03 11:23:50 +02:00
2011-03-12 12:04:27 +05:30
/* HDMI */
2012-02-17 17:41:13 +02:00
int hdmi_init_platform_driver ( void ) __init ;
void hdmi_uninit_platform_driver ( void ) __exit ;
2011-03-12 12:04:27 +05:30
2009-11-03 11:23:50 +02:00
/* RFBI */
2012-02-17 17:41:13 +02:00
int rfbi_init_platform_driver ( void ) __init ;
void rfbi_uninit_platform_driver ( void ) __exit ;
2009-11-03 11:23:50 +02:00
2009-12-17 14:35:21 +02:00
# ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
static inline void dss_collect_irq_stats ( u32 irqstatus , unsigned * irq_arr )
{
int b ;
for ( b = 0 ; b < 32 ; + + b ) {
if ( irqstatus & ( 1 < < b ) )
irq_arr [ b ] + + ;
}
}
# endif
2009-11-03 11:23:50 +02:00
# endif