[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:02 +02:00
/*
* arch / arm / mach - loki / common . c
*
* Core functions for Marvell Loki ( 88 RC8480 ) SoCs
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed " as is " without any
* warranty of any kind , whether express or implied .
*/
# include <linux/kernel.h>
# include <linux/init.h>
# include <linux/platform_device.h>
# include <linux/serial_8250.h>
# include <linux/mbus.h>
2011-05-15 13:32:40 +02:00
# include <linux/dma-mapping.h>
[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:02 +02:00
# include <asm/page.h>
# include <asm/timex.h>
# include <asm/mach/map.h>
# include <asm/mach/time.h>
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# include <mach/bridge-regs.h>
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# include <mach/loki.h>
2008-08-09 13:44:58 +02:00
# include <plat/orion_nand.h>
# include <plat/time.h>
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# include <plat/common.h>
[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:02 +02:00
# include "common.h"
/*****************************************************************************
* I / O Address Mapping
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
static struct map_desc loki_io_desc [ ] __initdata = {
{
. virtual = LOKI_REGS_VIRT_BASE ,
. pfn = __phys_to_pfn ( LOKI_REGS_PHYS_BASE ) ,
. length = LOKI_REGS_SIZE ,
. type = MT_DEVICE ,
} ,
} ;
void __init loki_map_io ( void )
{
iotable_init ( loki_io_desc , ARRAY_SIZE ( loki_io_desc ) ) ;
}
/*****************************************************************************
2011-05-15 13:32:44 +02:00
* GE00
[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:02 +02:00
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
void __init loki_ge0_init ( struct mv643xx_eth_platform_data * eth_data )
{
writel ( 0x00079220 , GE0_VIRT_BASE + 0x20b0 ) ;
2011-05-15 13:32:44 +02:00
orion_ge00_init ( eth_data , & loki_mbus_dram_info ,
GE0_PHYS_BASE , IRQ_LOKI_GBE_A_INT ,
0 , LOKI_TCLK ) ;
[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:02 +02:00
}
/*****************************************************************************
2011-05-15 13:32:44 +02:00
* GE01
[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:02 +02:00
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
void __init loki_ge1_init ( struct mv643xx_eth_platform_data * eth_data )
{
writel ( 0x00079220 , GE1_VIRT_BASE + 0x20b0 ) ;
2011-05-15 13:32:44 +02:00
orion_ge01_init ( eth_data , & loki_mbus_dram_info ,
GE1_PHYS_BASE , IRQ_LOKI_GBE_B_INT ,
0 , LOKI_TCLK ) ;
[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:02 +02:00
}
/*****************************************************************************
* SAS / SATA
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
static struct resource loki_sas_resources [ ] = {
{
. name = " mvsas0 mem " ,
. start = SAS0_PHYS_BASE ,
. end = SAS0_PHYS_BASE + 0x01ff ,
. flags = IORESOURCE_MEM ,
} , {
. name = " mvsas0 irq " ,
. start = IRQ_LOKI_SAS_A ,
. end = IRQ_LOKI_SAS_A ,
. flags = IORESOURCE_IRQ ,
} , {
. name = " mvsas1 mem " ,
. start = SAS1_PHYS_BASE ,
. end = SAS1_PHYS_BASE + 0x01ff ,
. flags = IORESOURCE_MEM ,
} , {
. name = " mvsas1 irq " ,
. start = IRQ_LOKI_SAS_B ,
. end = IRQ_LOKI_SAS_B ,
. flags = IORESOURCE_IRQ ,
} ,
} ;
static struct platform_device loki_sas = {
. name = " mvsas " ,
. id = 0 ,
. dev = {
2011-05-15 13:32:40 +02:00
. coherent_dma_mask = DMA_BIT_MASK ( 32 ) ,
[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:02 +02:00
} ,
. num_resources = ARRAY_SIZE ( loki_sas_resources ) ,
. resource = loki_sas_resources ,
} ;
void __init loki_sas_init ( void )
{
writel ( 0x8300f707 , DDR_REG ( 0x1424 ) ) ;
platform_device_register ( & loki_sas ) ;
}
/*****************************************************************************
* UART0
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
void __init loki_uart0_init ( void )
{
2011-05-15 13:32:41 +02:00
orion_uart0_init ( UART0_VIRT_BASE , UART0_PHYS_BASE ,
IRQ_LOKI_UART0 , LOKI_TCLK ) ;
[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:02 +02:00
}
/*****************************************************************************
* UART1
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
void __init loki_uart1_init ( void )
{
2011-05-15 13:32:41 +02:00
orion_uart1_init ( UART1_VIRT_BASE , UART1_PHYS_BASE ,
IRQ_LOKI_UART1 , LOKI_TCLK ) ;
[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:02 +02:00
}
/*****************************************************************************
* Time handling
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
2010-10-15 16:50:26 +02:00
void __init loki_init_early ( void )
{
orion_time_set_base ( TIMER_VIRT_BASE ) ;
}
[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:02 +02:00
static void loki_timer_init ( void )
{
2010-10-15 16:50:26 +02:00
orion_time_init ( BRIDGE_VIRT_BASE , BRIDGE_INT_TIMER1_CLR ,
IRQ_LOKI_BRIDGE , LOKI_TCLK ) ;
[ARM] add Marvell Loki (88RC8480) SoC support
The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.
This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22 22:45:02 +02:00
}
struct sys_timer loki_timer = {
. init = loki_timer_init ,
} ;
/*****************************************************************************
* General
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
void __init loki_init ( void )
{
printk ( KERN_INFO " Loki ID: 88RC8480. TCLK=%d. \n " , LOKI_TCLK ) ;
loki_setup_cpu_mbus ( ) ;
}
