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clk: meson: s4: fix pwm_j_div parent clock

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[ Upstream commit c591745831e75b11ef19fb33c5c5a16e4d3f7fbf ]

Update peripherals pwm_j_div's parent clock to pwm_j_mux

Fixes: 57b55c76aaf1 ("clk: meson: S4: add support for Amlogic S4 SoC peripheral clock controller")
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Link: https://lore.kernel.org/r/20240516071612.2978201-1-xianwei.zhao@amlogic.com
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Xianwei Zhao 2024-05-16 15:16:12 +08:00 committed by Greg Kroah-Hartman
parent b156f8f482
commit 0019bd1e6c
1 changed files with 1 additions and 1 deletions
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2
drivers/clk/meson/s4-peripherals.c
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@ -2978,7 +2978,7 @@ static struct clk_regmap s4_pwm_j_div = {
.name = "pwm_j_div",
.ops = &clk_regmap_divider_ops,
.parent_hws = (const struct clk_hw *[]) {
&s4_pwm_h_mux.hw
&s4_pwm_j_mux.hw
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,