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drm/amdgpu: handle asics with 1 SDMA instance

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This patch will handle asics with 1 SDMA instance.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Xiaojian Du 2021-12-29 15:03:11 +08:00 committed by Alex Deucher
parent c1eeb3d2e8
commit 06aeb75332
1 changed files with 3 additions and 2 deletions
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5
drivers/gpu/drm/amd/amdgpu/soc21.c
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@ -252,8 +252,9 @@ static int soc21_read_register(struct amdgpu_device *adev, u32 se_num,
*value = 0;
for (i = 0; i < ARRAY_SIZE(soc21_allowed_read_registers); i++) {
en = &soc21_allowed_read_registers[i];
if (reg_offset !=
(adev->reg_offset[en->hwip][en->inst][en->seg] + en->reg_offset))
if ((i == 7 && (adev->sdma.num_instances == 1)) || /* some asics don't have SDMA1 */
reg_offset !=
(adev->reg_offset[en->hwip][en->inst][en->seg] + en->reg_offset))
continue;
*value = soc21_get_register_value(adev,