Merge tag 'qcom-drivers-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
Qualcomm driver updates for v5.17 This introduces RPM power-domain support for the SM8450, SM6125 and QCM2290 platforms. It them clean up the platform-based naming of the resources definitions throughout the RPMh PD driver. The last-level cache controller driver gains SM8350 support. The RPM sleep stats driver gains support for several older systems that had a slightly different memory layout for this information. The socinfo gains SM8450, SM6350 and SM7227 definitions. In addition to the DeviceTree binding updates related to these changes new compatibles was added to describe the SM8450 and the Kryo 780 CPU. Lastly a few typo and style fixes are introduced. * tag 'qcom-drivers-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (27 commits) soc: qcom: rpmh-rsc: Fix typo in a comment soc: qcom: socinfo: Add SM6350 and SM7225 dt-bindings: arm: msm: Don't mark LLCC interrupt as required dt-bindings: firmware: scm: Add SM6350 compatible dt-bindings: arm: msm: Add LLCC for SM6350 soc: qcom: rpmhpd: Sort power-domain definitions and lists soc: qcom: rpmhpd: Remove mx/cx relationship on sc7280 soc: qcom: rpmhpd: Rename rpmhpd struct names soc: qcom: rpmhpd: sm8450: Add the missing .peer for sm8450_cx_ao soc: qcom: socinfo: add SM8450 ID soc: qcom: rpmhpd: Add SM8450 power domains dt-bindings: power: rpmpd: Add SM8450 to rpmpd binding soc: qcom: smem: Update max processor count dt-bindings: arm: qcom: Document SM8450 SoC and boards dt-bindings: firmware: scm: Add SM8450 compatible dt-bindings: arm: cpus: Add kryo780 compatible soc: qcom: rpmpd: Add support for sm6125 dt-bindings: qcom-rpmpd: Add sm6125 power domains soc: qcom: aoss: constify static struct thermal_cooling_device_ops PM: AVS: qcom-cpr: Use div64_ul instead of do_div ... Link: https://lore.kernel.org/r/20211221040452.3620633-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
@ -174,6 +174,7 @@ properties:
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- qcom,kryo560
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- qcom,kryo570
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- qcom,kryo685
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- qcom,kryo780
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- qcom,scorpion
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enable-method:
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@ -24,6 +24,7 @@ properties:
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- qcom,sc7180-llcc
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- qcom,sc7280-llcc
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- qcom,sdm845-llcc
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- qcom,sm6350-llcc
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- qcom,sm8150-llcc
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- qcom,sm8250-llcc
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@ -44,7 +45,6 @@ required:
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- compatible
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- reg
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- reg-names
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- interrupts
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additionalProperties: false
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@ -50,6 +50,7 @@ description: |
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sm8150
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sm8250
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sm8350
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sm8450
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The 'board' element must be one of the following strings:
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@ -257,6 +258,11 @@ properties:
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- qcom,sm8350-mtp
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- const: qcom,sm8350
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- items:
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- enum:
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- qcom,sm8450-qrd
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- const: qcom,sm8450
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additionalProperties: true
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...
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@ -26,9 +26,11 @@ Required properties:
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* "qcom,scm-sc7280"
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* "qcom,scm-sdm845"
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* "qcom,scm-sdx55"
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* "qcom,scm-sm6350"
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* "qcom,scm-sm8150"
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* "qcom,scm-sm8250"
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* "qcom,scm-sm8350"
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* "qcom,scm-sm8450"
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and:
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* "qcom,scm"
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- clocks: Specifies clocks needed by the SCM interface, if any:
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@ -24,6 +24,7 @@ properties:
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- qcom,msm8994-rpmpd
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- qcom,msm8996-rpmpd
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- qcom,msm8998-rpmpd
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- qcom,qcm2290-rpmpd
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- qcom,qcs404-rpmpd
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- qcom,sdm660-rpmpd
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- qcom,sc7180-rpmhpd
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@ -32,10 +33,12 @@ properties:
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- qcom,sdm845-rpmhpd
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- qcom,sdx55-rpmhpd
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- qcom,sm6115-rpmpd
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- qcom,sm6125-rpmpd
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- qcom,sm6350-rpmhpd
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- qcom,sm8150-rpmhpd
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- qcom,sm8250-rpmhpd
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- qcom,sm8350-rpmhpd
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- qcom,sm8450-rpmhpd
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'#power-domain-cells':
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const: 1
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@ -21,6 +21,11 @@ properties:
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enum:
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- qcom,rpmh-stats
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- qcom,rpm-stats
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# For older RPM firmware versions with fixed offset for the sleep stats
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- qcom,apq8084-rpm-stats
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- qcom,msm8226-rpm-stats
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- qcom,msm8916-rpm-stats
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- qcom,msm8974-rpm-stats
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reg:
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maxItems: 1
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@ -1010,7 +1010,7 @@ static int cpr_interpolate(const struct corner *corner, int step_volt,
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return corner->uV;
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temp = f_diff * (uV_high - uV_low);
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do_div(temp, f_high - f_low);
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temp = div64_ul(temp, f_high - f_low);
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/*
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* max_volt_scale has units of uV/MHz while freq values
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@ -195,6 +195,28 @@ static const struct llcc_slice_config sm8250_data[] = {
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{ LLCC_WRCACHE, 31, 256, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
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};
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static const struct llcc_slice_config sm8350_data[] = {
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{ LLCC_CPUSS, 1, 3072, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 1 },
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{ LLCC_VIDSC0, 2, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
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{ LLCC_AUDIO, 6, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 0 },
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{ LLCC_MDMHPGRW, 7, 1024, 3, 0, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
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{ LLCC_MODHW, 9, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
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{ LLCC_CMPT, 10, 3072, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
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{ LLCC_GPUHTW, 11, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
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{ LLCC_GPU, 12, 1024, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 1, 0 },
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{ LLCC_MMUHWT, 13, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 1 },
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{ LLCC_DISP, 16, 3072, 2, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
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{ LLCC_MDMPNG, 21, 1024, 0, 1, 0xf, 0x0, 0, 0, 0, 0, 1, 0 },
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{ LLCC_AUDHW, 22, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
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{ LLCC_CVP, 28, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
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{ LLCC_MODPE, 29, 256, 1, 1, 0xf, 0x0, 0, 0, 0, 0, 1, 0 },
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{ LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0x1, 1, 0, 0, 0, 1, 0 },
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{ LLCC_WRCACHE, 31, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 1 },
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{ LLCC_CVPFW, 17, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
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{ LLCC_CPUSS1, 3, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
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{ LLCC_CPUHWT, 5, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 1 },
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};
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static const struct qcom_llcc_config sc7180_cfg = {
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.sct_data = sc7180_data,
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.size = ARRAY_SIZE(sc7180_data),
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@ -228,6 +250,11 @@ static const struct qcom_llcc_config sm8250_cfg = {
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.size = ARRAY_SIZE(sm8250_data),
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};
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static const struct qcom_llcc_config sm8350_cfg = {
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.sct_data = sm8350_data,
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.size = ARRAY_SIZE(sm8350_data),
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};
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static struct llcc_drv_data *drv_data = (void *) -EPROBE_DEFER;
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/**
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@ -644,6 +671,7 @@ static const struct of_device_id qcom_llcc_of_match[] = {
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{ .compatible = "qcom,sm6350-llcc", .data = &sm6350_cfg },
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{ .compatible = "qcom,sm8150-llcc", .data = &sm8150_cfg },
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{ .compatible = "qcom,sm8250-llcc", .data = &sm8250_cfg },
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{ .compatible = "qcom,sm8350-llcc", .data = &sm8350_cfg },
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{ }
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};
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@ -352,7 +352,7 @@ static int qmp_cdev_set_cur_state(struct thermal_cooling_device *cdev,
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return ret;
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}
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static struct thermal_cooling_device_ops qmp_cooling_device_ops = {
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static const struct thermal_cooling_device_ops qmp_cooling_device_ops = {
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.get_max_state = qmp_cdev_get_max_state,
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.get_cur_state = qmp_cdev_get_cur_state,
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.set_cur_state = qmp_cdev_set_cur_state,
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@ -237,6 +237,15 @@ static const struct stats_config rpm_data = {
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.subsystem_stats_in_smem = false,
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};
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/* Older RPM firmwares have the stats at a fixed offset instead */
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static const struct stats_config rpm_data_dba0 = {
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.stats_offset = 0xdba0,
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.num_records = 2,
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.appended_stats_avail = true,
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.dynamic_offset = false,
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.subsystem_stats_in_smem = false,
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};
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static const struct stats_config rpmh_data = {
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.stats_offset = 0x48,
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.num_records = 3,
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@ -246,6 +255,10 @@ static const struct stats_config rpmh_data = {
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};
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static const struct of_device_id qcom_stats_table[] = {
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{ .compatible = "qcom,apq8084-rpm-stats", .data = &rpm_data_dba0 },
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{ .compatible = "qcom,msm8226-rpm-stats", .data = &rpm_data_dba0 },
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{ .compatible = "qcom,msm8916-rpm-stats", .data = &rpm_data_dba0 },
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{ .compatible = "qcom,msm8974-rpm-stats", .data = &rpm_data_dba0 },
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{ .compatible = "qcom,rpm-stats", .data = &rpm_data },
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{ .compatible = "qcom,rpmh-stats", .data = &rpmh_data },
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{ }
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@ -96,7 +96,7 @@ static void qmi_recv_del_server(struct qmi_handle *qmi,
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* @node: id of the dying node
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*
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* Signals the client that all previously registered services on this node are
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* now gone and then calls the bye callback to allow the client client further
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* now gone and then calls the bye callback to allow the client further
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* cleaning up resources associated with this remote.
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*/
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static void qmi_recv_bye(struct qmi_handle *qmi,
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@ -691,7 +691,7 @@ static int find_slots(struct tcs_group *tcs, const struct tcs_request *msg,
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* @drv: The controller.
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* @msg: The data to be written to the controller.
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*
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* This should only be called for for sleep/wake state, never active-only
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* This should only be called for sleep/wake state, never active-only
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* state.
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*
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* The caller must ensure that no other RPMH actions are happening and the
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@ -63,73 +63,134 @@ struct rpmhpd_desc {
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static DEFINE_MUTEX(rpmhpd_lock);
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/* SDM845 RPMH powerdomains */
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/* RPMH powerdomains */
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static struct rpmhpd sdm845_ebi = {
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static struct rpmhpd cx_ao;
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static struct rpmhpd mx;
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static struct rpmhpd mx_ao;
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static struct rpmhpd cx = {
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.pd = { .name = "cx", },
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.peer = &cx_ao,
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.res_name = "cx.lvl",
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};
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static struct rpmhpd cx_ao = {
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.pd = { .name = "cx_ao", },
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.active_only = true,
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.peer = &cx,
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.res_name = "cx.lvl",
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};
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static struct rpmhpd cx_ao_w_mx_parent;
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static struct rpmhpd cx_w_mx_parent = {
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.pd = { .name = "cx", },
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.peer = &cx_ao_w_mx_parent,
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.parent = &mx.pd,
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.res_name = "cx.lvl",
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};
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static struct rpmhpd cx_ao_w_mx_parent = {
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.pd = { .name = "cx_ao", },
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.active_only = true,
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.peer = &cx_w_mx_parent,
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.parent = &mx_ao.pd,
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.res_name = "cx.lvl",
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};
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static struct rpmhpd ebi = {
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.pd = { .name = "ebi", },
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.res_name = "ebi.lvl",
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};
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static struct rpmhpd sdm845_lmx = {
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.pd = { .name = "lmx", },
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.res_name = "lmx.lvl",
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};
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static struct rpmhpd sdm845_lcx = {
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.pd = { .name = "lcx", },
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.res_name = "lcx.lvl",
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};
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static struct rpmhpd sdm845_gfx = {
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static struct rpmhpd gfx = {
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.pd = { .name = "gfx", },
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.res_name = "gfx.lvl",
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};
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static struct rpmhpd sdm845_mss = {
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static struct rpmhpd lcx = {
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.pd = { .name = "lcx", },
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.res_name = "lcx.lvl",
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};
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static struct rpmhpd lmx = {
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.pd = { .name = "lmx", },
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.res_name = "lmx.lvl",
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};
|
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|
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static struct rpmhpd mmcx_ao;
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static struct rpmhpd mmcx = {
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.pd = { .name = "mmcx", },
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.peer = &mmcx_ao,
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.res_name = "mmcx.lvl",
|
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};
|
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|
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static struct rpmhpd mmcx_ao = {
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.pd = { .name = "mmcx_ao", },
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.active_only = true,
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.peer = &mmcx,
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.res_name = "mmcx.lvl",
|
||||
};
|
||||
|
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static struct rpmhpd mmcx_ao_w_cx_parent;
|
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static struct rpmhpd mmcx_w_cx_parent = {
|
||||
.pd = { .name = "mmcx", },
|
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.peer = &mmcx_ao_w_cx_parent,
|
||||
.parent = &cx.pd,
|
||||
.res_name = "mmcx.lvl",
|
||||
};
|
||||
|
||||
static struct rpmhpd mmcx_ao_w_cx_parent = {
|
||||
.pd = { .name = "mmcx_ao", },
|
||||
.active_only = true,
|
||||
.peer = &mmcx_w_cx_parent,
|
||||
.parent = &cx_ao.pd,
|
||||
.res_name = "mmcx.lvl",
|
||||
};
|
||||
|
||||
static struct rpmhpd mss = {
|
||||
.pd = { .name = "mss", },
|
||||
.res_name = "mss.lvl",
|
||||
};
|
||||
|
||||
static struct rpmhpd sdm845_mx_ao;
|
||||
static struct rpmhpd sdm845_mx = {
|
||||
static struct rpmhpd mx_ao;
|
||||
static struct rpmhpd mx = {
|
||||
.pd = { .name = "mx", },
|
||||
.peer = &sdm845_mx_ao,
|
||||
.peer = &mx_ao,
|
||||
.res_name = "mx.lvl",
|
||||
};
|
||||
|
||||
static struct rpmhpd sdm845_mx_ao = {
|
||||
static struct rpmhpd mx_ao = {
|
||||
.pd = { .name = "mx_ao", },
|
||||
.active_only = true,
|
||||
.peer = &sdm845_mx,
|
||||
.peer = &mx,
|
||||
.res_name = "mx.lvl",
|
||||
};
|
||||
|
||||
static struct rpmhpd sdm845_cx_ao;
|
||||
static struct rpmhpd sdm845_cx = {
|
||||
.pd = { .name = "cx", },
|
||||
.peer = &sdm845_cx_ao,
|
||||
.parent = &sdm845_mx.pd,
|
||||
.res_name = "cx.lvl",
|
||||
static struct rpmhpd mxc_ao;
|
||||
static struct rpmhpd mxc = {
|
||||
.pd = { .name = "mxc", },
|
||||
.peer = &mxc_ao,
|
||||
.res_name = "mxc.lvl",
|
||||
};
|
||||
|
||||
static struct rpmhpd sdm845_cx_ao = {
|
||||
.pd = { .name = "cx_ao", },
|
||||
static struct rpmhpd mxc_ao = {
|
||||
.pd = { .name = "mxc_ao", },
|
||||
.active_only = true,
|
||||
.peer = &sdm845_cx,
|
||||
.parent = &sdm845_mx_ao.pd,
|
||||
.res_name = "cx.lvl",
|
||||
.peer = &mxc,
|
||||
.res_name = "mxc.lvl",
|
||||
};
|
||||
|
||||
/* SDM845 RPMH powerdomains */
|
||||
static struct rpmhpd *sdm845_rpmhpds[] = {
|
||||
[SDM845_EBI] = &sdm845_ebi,
|
||||
[SDM845_MX] = &sdm845_mx,
|
||||
[SDM845_MX_AO] = &sdm845_mx_ao,
|
||||
[SDM845_CX] = &sdm845_cx,
|
||||
[SDM845_CX_AO] = &sdm845_cx_ao,
|
||||
[SDM845_LMX] = &sdm845_lmx,
|
||||
[SDM845_LCX] = &sdm845_lcx,
|
||||
[SDM845_GFX] = &sdm845_gfx,
|
||||
[SDM845_MSS] = &sdm845_mss,
|
||||
[SDM845_CX] = &cx_w_mx_parent,
|
||||
[SDM845_CX_AO] = &cx_ao_w_mx_parent,
|
||||
[SDM845_EBI] = &ebi,
|
||||
[SDM845_GFX] = &gfx,
|
||||
[SDM845_LCX] = &lcx,
|
||||
[SDM845_LMX] = &lmx,
|
||||
[SDM845_MSS] = &mss,
|
||||
[SDM845_MX] = &mx,
|
||||
[SDM845_MX_AO] = &mx_ao,
|
||||
};
|
||||
|
||||
static const struct rpmhpd_desc sdm845_desc = {
|
||||
@ -139,9 +200,9 @@ static const struct rpmhpd_desc sdm845_desc = {
|
||||
|
||||
/* SDX55 RPMH powerdomains */
|
||||
static struct rpmhpd *sdx55_rpmhpds[] = {
|
||||
[SDX55_MSS] = &sdm845_mss,
|
||||
[SDX55_MX] = &sdm845_mx,
|
||||
[SDX55_CX] = &sdm845_cx,
|
||||
[SDX55_CX] = &cx_w_mx_parent,
|
||||
[SDX55_MSS] = &mss,
|
||||
[SDX55_MX] = &mx,
|
||||
};
|
||||
|
||||
static const struct rpmhpd_desc sdx55_desc = {
|
||||
@ -151,12 +212,12 @@ static const struct rpmhpd_desc sdx55_desc = {
|
||||
|
||||
/* SM6350 RPMH powerdomains */
|
||||
static struct rpmhpd *sm6350_rpmhpds[] = {
|
||||
[SM6350_CX] = &sdm845_cx,
|
||||
[SM6350_GFX] = &sdm845_gfx,
|
||||
[SM6350_LCX] = &sdm845_lcx,
|
||||
[SM6350_LMX] = &sdm845_lmx,
|
||||
[SM6350_MSS] = &sdm845_mss,
|
||||
[SM6350_MX] = &sdm845_mx,
|
||||
[SM6350_CX] = &cx_w_mx_parent,
|
||||
[SM6350_GFX] = &gfx,
|
||||
[SM6350_LCX] = &lcx,
|
||||
[SM6350_LMX] = &lmx,
|
||||
[SM6350_MSS] = &mss,
|
||||
[SM6350_MX] = &mx,
|
||||
};
|
||||
|
||||
static const struct rpmhpd_desc sm6350_desc = {
|
||||
@ -165,33 +226,18 @@ static const struct rpmhpd_desc sm6350_desc = {
|
||||
};
|
||||
|
||||
/* SM8150 RPMH powerdomains */
|
||||
|
||||
static struct rpmhpd sm8150_mmcx_ao;
|
||||
static struct rpmhpd sm8150_mmcx = {
|
||||
.pd = { .name = "mmcx", },
|
||||
.peer = &sm8150_mmcx_ao,
|
||||
.res_name = "mmcx.lvl",
|
||||
};
|
||||
|
||||
static struct rpmhpd sm8150_mmcx_ao = {
|
||||
.pd = { .name = "mmcx_ao", },
|
||||
.active_only = true,
|
||||
.peer = &sm8150_mmcx,
|
||||
.res_name = "mmcx.lvl",
|
||||
};
|
||||
|
||||
static struct rpmhpd *sm8150_rpmhpds[] = {
|
||||
[SM8150_MSS] = &sdm845_mss,
|
||||
[SM8150_EBI] = &sdm845_ebi,
|
||||
[SM8150_LMX] = &sdm845_lmx,
|
||||
[SM8150_LCX] = &sdm845_lcx,
|
||||
[SM8150_GFX] = &sdm845_gfx,
|
||||
[SM8150_MX] = &sdm845_mx,
|
||||
[SM8150_MX_AO] = &sdm845_mx_ao,
|
||||
[SM8150_CX] = &sdm845_cx,
|
||||
[SM8150_CX_AO] = &sdm845_cx_ao,
|
||||
[SM8150_MMCX] = &sm8150_mmcx,
|
||||
[SM8150_MMCX_AO] = &sm8150_mmcx_ao,
|
||||
[SM8150_CX] = &cx_w_mx_parent,
|
||||
[SM8150_CX_AO] = &cx_ao_w_mx_parent,
|
||||
[SM8150_EBI] = &ebi,
|
||||
[SM8150_GFX] = &gfx,
|
||||
[SM8150_LCX] = &lcx,
|
||||
[SM8150_LMX] = &lmx,
|
||||
[SM8150_MMCX] = &mmcx,
|
||||
[SM8150_MMCX_AO] = &mmcx_ao,
|
||||
[SM8150_MSS] = &mss,
|
||||
[SM8150_MX] = &mx,
|
||||
[SM8150_MX_AO] = &mx_ao,
|
||||
};
|
||||
|
||||
static const struct rpmhpd_desc sm8150_desc = {
|
||||
@ -199,17 +245,18 @@ static const struct rpmhpd_desc sm8150_desc = {
|
||||
.num_pds = ARRAY_SIZE(sm8150_rpmhpds),
|
||||
};
|
||||
|
||||
/* SM8250 RPMH powerdomains */
|
||||
static struct rpmhpd *sm8250_rpmhpds[] = {
|
||||
[SM8250_CX] = &sdm845_cx,
|
||||
[SM8250_CX_AO] = &sdm845_cx_ao,
|
||||
[SM8250_EBI] = &sdm845_ebi,
|
||||
[SM8250_GFX] = &sdm845_gfx,
|
||||
[SM8250_LCX] = &sdm845_lcx,
|
||||
[SM8250_LMX] = &sdm845_lmx,
|
||||
[SM8250_MMCX] = &sm8150_mmcx,
|
||||
[SM8250_MMCX_AO] = &sm8150_mmcx_ao,
|
||||
[SM8250_MX] = &sdm845_mx,
|
||||
[SM8250_MX_AO] = &sdm845_mx_ao,
|
||||
[SM8250_CX] = &cx_w_mx_parent,
|
||||
[SM8250_CX_AO] = &cx_ao_w_mx_parent,
|
||||
[SM8250_EBI] = &ebi,
|
||||
[SM8250_GFX] = &gfx,
|
||||
[SM8250_LCX] = &lcx,
|
||||
[SM8250_LMX] = &lmx,
|
||||
[SM8250_MMCX] = &mmcx,
|
||||
[SM8250_MMCX_AO] = &mmcx_ao,
|
||||
[SM8250_MX] = &mx,
|
||||
[SM8250_MX_AO] = &mx_ao,
|
||||
};
|
||||
|
||||
static const struct rpmhpd_desc sm8250_desc = {
|
||||
@ -218,34 +265,20 @@ static const struct rpmhpd_desc sm8250_desc = {
|
||||
};
|
||||
|
||||
/* SM8350 Power domains */
|
||||
static struct rpmhpd sm8350_mxc_ao;
|
||||
static struct rpmhpd sm8350_mxc = {
|
||||
.pd = { .name = "mxc", },
|
||||
.peer = &sm8350_mxc_ao,
|
||||
.res_name = "mxc.lvl",
|
||||
};
|
||||
|
||||
static struct rpmhpd sm8350_mxc_ao = {
|
||||
.pd = { .name = "mxc_ao", },
|
||||
.active_only = true,
|
||||
.peer = &sm8350_mxc,
|
||||
.res_name = "mxc.lvl",
|
||||
};
|
||||
|
||||
static struct rpmhpd *sm8350_rpmhpds[] = {
|
||||
[SM8350_CX] = &sdm845_cx,
|
||||
[SM8350_CX_AO] = &sdm845_cx_ao,
|
||||
[SM8350_EBI] = &sdm845_ebi,
|
||||
[SM8350_GFX] = &sdm845_gfx,
|
||||
[SM8350_LCX] = &sdm845_lcx,
|
||||
[SM8350_LMX] = &sdm845_lmx,
|
||||
[SM8350_MMCX] = &sm8150_mmcx,
|
||||
[SM8350_MMCX_AO] = &sm8150_mmcx_ao,
|
||||
[SM8350_MX] = &sdm845_mx,
|
||||
[SM8350_MX_AO] = &sdm845_mx_ao,
|
||||
[SM8350_MXC] = &sm8350_mxc,
|
||||
[SM8350_MXC_AO] = &sm8350_mxc_ao,
|
||||
[SM8350_MSS] = &sdm845_mss,
|
||||
[SM8350_CX] = &cx_w_mx_parent,
|
||||
[SM8350_CX_AO] = &cx_ao_w_mx_parent,
|
||||
[SM8350_EBI] = &ebi,
|
||||
[SM8350_GFX] = &gfx,
|
||||
[SM8350_LCX] = &lcx,
|
||||
[SM8350_LMX] = &lmx,
|
||||
[SM8350_MMCX] = &mmcx,
|
||||
[SM8350_MMCX_AO] = &mmcx_ao,
|
||||
[SM8350_MSS] = &mss,
|
||||
[SM8350_MX] = &mx,
|
||||
[SM8350_MX_AO] = &mx_ao,
|
||||
[SM8350_MXC] = &mxc,
|
||||
[SM8350_MXC_AO] = &mxc_ao,
|
||||
};
|
||||
|
||||
static const struct rpmhpd_desc sm8350_desc = {
|
||||
@ -253,16 +286,38 @@ static const struct rpmhpd_desc sm8350_desc = {
|
||||
.num_pds = ARRAY_SIZE(sm8350_rpmhpds),
|
||||
};
|
||||
|
||||
/* SM8450 RPMH powerdomains */
|
||||
static struct rpmhpd *sm8450_rpmhpds[] = {
|
||||
[SM8450_CX] = &cx,
|
||||
[SM8450_CX_AO] = &cx_ao,
|
||||
[SM8450_EBI] = &ebi,
|
||||
[SM8450_GFX] = &gfx,
|
||||
[SM8450_LCX] = &lcx,
|
||||
[SM8450_LMX] = &lmx,
|
||||
[SM8450_MMCX] = &mmcx_w_cx_parent,
|
||||
[SM8450_MMCX_AO] = &mmcx_ao_w_cx_parent,
|
||||
[SM8450_MSS] = &mss,
|
||||
[SM8450_MX] = &mx,
|
||||
[SM8450_MX_AO] = &mx_ao,
|
||||
[SM8450_MXC] = &mxc,
|
||||
[SM8450_MXC_AO] = &mxc_ao,
|
||||
};
|
||||
|
||||
static const struct rpmhpd_desc sm8450_desc = {
|
||||
.rpmhpds = sm8450_rpmhpds,
|
||||
.num_pds = ARRAY_SIZE(sm8450_rpmhpds),
|
||||
};
|
||||
|
||||
/* SC7180 RPMH powerdomains */
|
||||
static struct rpmhpd *sc7180_rpmhpds[] = {
|
||||
[SC7180_CX] = &sdm845_cx,
|
||||
[SC7180_CX_AO] = &sdm845_cx_ao,
|
||||
[SC7180_GFX] = &sdm845_gfx,
|
||||
[SC7180_MX] = &sdm845_mx,
|
||||
[SC7180_MX_AO] = &sdm845_mx_ao,
|
||||
[SC7180_LMX] = &sdm845_lmx,
|
||||
[SC7180_LCX] = &sdm845_lcx,
|
||||
[SC7180_MSS] = &sdm845_mss,
|
||||
[SC7180_CX] = &cx_w_mx_parent,
|
||||
[SC7180_CX_AO] = &cx_ao_w_mx_parent,
|
||||
[SC7180_GFX] = &gfx,
|
||||
[SC7180_LCX] = &lcx,
|
||||
[SC7180_LMX] = &lmx,
|
||||
[SC7180_MSS] = &mss,
|
||||
[SC7180_MX] = &mx,
|
||||
[SC7180_MX_AO] = &mx_ao,
|
||||
};
|
||||
|
||||
static const struct rpmhpd_desc sc7180_desc = {
|
||||
@ -272,15 +327,15 @@ static const struct rpmhpd_desc sc7180_desc = {
|
||||
|
||||
/* SC7280 RPMH powerdomains */
|
||||
static struct rpmhpd *sc7280_rpmhpds[] = {
|
||||
[SC7280_CX] = &sdm845_cx,
|
||||
[SC7280_CX_AO] = &sdm845_cx_ao,
|
||||
[SC7280_EBI] = &sdm845_ebi,
|
||||
[SC7280_GFX] = &sdm845_gfx,
|
||||
[SC7280_MX] = &sdm845_mx,
|
||||
[SC7280_MX_AO] = &sdm845_mx_ao,
|
||||
[SC7280_LMX] = &sdm845_lmx,
|
||||
[SC7280_LCX] = &sdm845_lcx,
|
||||
[SC7280_MSS] = &sdm845_mss,
|
||||
[SC7280_CX] = &cx,
|
||||
[SC7280_CX_AO] = &cx_ao,
|
||||
[SC7280_EBI] = &ebi,
|
||||
[SC7280_GFX] = &gfx,
|
||||
[SC7280_LCX] = &lcx,
|
||||
[SC7280_LMX] = &lmx,
|
||||
[SC7280_MSS] = &mss,
|
||||
[SC7280_MX] = &mx,
|
||||
[SC7280_MX_AO] = &mx_ao,
|
||||
};
|
||||
|
||||
static const struct rpmhpd_desc sc7280_desc = {
|
||||
@ -290,17 +345,17 @@ static const struct rpmhpd_desc sc7280_desc = {
|
||||
|
||||
/* SC8180x RPMH powerdomains */
|
||||
static struct rpmhpd *sc8180x_rpmhpds[] = {
|
||||
[SC8180X_CX] = &sdm845_cx,
|
||||
[SC8180X_CX_AO] = &sdm845_cx_ao,
|
||||
[SC8180X_EBI] = &sdm845_ebi,
|
||||
[SC8180X_GFX] = &sdm845_gfx,
|
||||
[SC8180X_LCX] = &sdm845_lcx,
|
||||
[SC8180X_LMX] = &sdm845_lmx,
|
||||
[SC8180X_MMCX] = &sm8150_mmcx,
|
||||
[SC8180X_MMCX_AO] = &sm8150_mmcx_ao,
|
||||
[SC8180X_MSS] = &sdm845_mss,
|
||||
[SC8180X_MX] = &sdm845_mx,
|
||||
[SC8180X_MX_AO] = &sdm845_mx_ao,
|
||||
[SC8180X_CX] = &cx_w_mx_parent,
|
||||
[SC8180X_CX_AO] = &cx_ao_w_mx_parent,
|
||||
[SC8180X_EBI] = &ebi,
|
||||
[SC8180X_GFX] = &gfx,
|
||||
[SC8180X_LCX] = &lcx,
|
||||
[SC8180X_LMX] = &lmx,
|
||||
[SC8180X_MMCX] = &mmcx,
|
||||
[SC8180X_MMCX_AO] = &mmcx_ao,
|
||||
[SC8180X_MSS] = &mss,
|
||||
[SC8180X_MX] = &mx,
|
||||
[SC8180X_MX_AO] = &mx_ao,
|
||||
};
|
||||
|
||||
static const struct rpmhpd_desc sc8180x_desc = {
|
||||
@ -318,6 +373,7 @@ static const struct of_device_id rpmhpd_match_table[] = {
|
||||
{ .compatible = "qcom,sm8150-rpmhpd", .data = &sm8150_desc },
|
||||
{ .compatible = "qcom,sm8250-rpmhpd", .data = &sm8250_desc },
|
||||
{ .compatible = "qcom,sm8350-rpmhpd", .data = &sm8350_desc },
|
||||
{ .compatible = "qcom,sm8450-rpmhpd", .data = &sm8450_desc },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, rpmhpd_match_table);
|
||||
|
||||
@ -102,7 +102,6 @@ struct rpmpd {
|
||||
const bool active_only;
|
||||
unsigned int corner;
|
||||
bool enabled;
|
||||
const char *res_name;
|
||||
const int res_type;
|
||||
const int res_id;
|
||||
struct qcom_smd_rpm *rpm;
|
||||
@ -396,6 +395,45 @@ static const struct rpmpd_desc sm6115_desc = {
|
||||
.max_state = RPM_SMD_LEVEL_TURBO_NO_CPR,
|
||||
};
|
||||
|
||||
/* sm6125 RPM Power domains */
|
||||
DEFINE_RPMPD_PAIR(sm6125, vddcx, vddcx_ao, RWCX, LEVEL, 0);
|
||||
DEFINE_RPMPD_VFL(sm6125, vddcx_vfl, RWCX, 0);
|
||||
|
||||
DEFINE_RPMPD_PAIR(sm6125, vddmx, vddmx_ao, RWMX, LEVEL, 0);
|
||||
DEFINE_RPMPD_VFL(sm6125, vddmx_vfl, RWMX, 0);
|
||||
|
||||
static struct rpmpd *sm6125_rpmpds[] = {
|
||||
[SM6125_VDDCX] = &sm6125_vddcx,
|
||||
[SM6125_VDDCX_AO] = &sm6125_vddcx_ao,
|
||||
[SM6125_VDDCX_VFL] = &sm6125_vddcx_vfl,
|
||||
[SM6125_VDDMX] = &sm6125_vddmx,
|
||||
[SM6125_VDDMX_AO] = &sm6125_vddmx_ao,
|
||||
[SM6125_VDDMX_VFL] = &sm6125_vddmx_vfl,
|
||||
};
|
||||
|
||||
static const struct rpmpd_desc sm6125_desc = {
|
||||
.rpmpds = sm6125_rpmpds,
|
||||
.num_pds = ARRAY_SIZE(sm6125_rpmpds),
|
||||
.max_state = RPM_SMD_LEVEL_BINNING,
|
||||
};
|
||||
|
||||
static struct rpmpd *qcm2290_rpmpds[] = {
|
||||
[QCM2290_VDDCX] = &sm6115_vddcx,
|
||||
[QCM2290_VDDCX_AO] = &sm6115_vddcx_ao,
|
||||
[QCM2290_VDDCX_VFL] = &sm6115_vddcx_vfl,
|
||||
[QCM2290_VDDMX] = &sm6115_vddmx,
|
||||
[QCM2290_VDDMX_AO] = &sm6115_vddmx_ao,
|
||||
[QCM2290_VDDMX_VFL] = &sm6115_vddmx_vfl,
|
||||
[QCM2290_VDD_LPI_CX] = &sm6115_vdd_lpi_cx,
|
||||
[QCM2290_VDD_LPI_MX] = &sm6115_vdd_lpi_mx,
|
||||
};
|
||||
|
||||
static const struct rpmpd_desc qcm2290_desc = {
|
||||
.rpmpds = qcm2290_rpmpds,
|
||||
.num_pds = ARRAY_SIZE(qcm2290_rpmpds),
|
||||
.max_state = RPM_SMD_LEVEL_TURBO_NO_CPR,
|
||||
};
|
||||
|
||||
static const struct of_device_id rpmpd_match_table[] = {
|
||||
{ .compatible = "qcom,mdm9607-rpmpd", .data = &mdm9607_desc },
|
||||
{ .compatible = "qcom,msm8916-rpmpd", .data = &msm8916_desc },
|
||||
@ -405,9 +443,11 @@ static const struct of_device_id rpmpd_match_table[] = {
|
||||
{ .compatible = "qcom,msm8994-rpmpd", .data = &msm8994_desc },
|
||||
{ .compatible = "qcom,msm8996-rpmpd", .data = &msm8996_desc },
|
||||
{ .compatible = "qcom,msm8998-rpmpd", .data = &msm8998_desc },
|
||||
{ .compatible = "qcom,qcm2290-rpmpd", .data = &qcm2290_desc },
|
||||
{ .compatible = "qcom,qcs404-rpmpd", .data = &qcs404_desc },
|
||||
{ .compatible = "qcom,sdm660-rpmpd", .data = &sdm660_desc },
|
||||
{ .compatible = "qcom,sm6115-rpmpd", .data = &sm6115_desc },
|
||||
{ .compatible = "qcom,sm6125-rpmpd", .data = &sm6125_desc },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, rpmpd_match_table);
|
||||
|
||||
@ -85,7 +85,7 @@
|
||||
#define SMEM_GLOBAL_HOST 0xfffe
|
||||
|
||||
/* Max number of processors/hosts in a system */
|
||||
#define SMEM_HOST_COUNT 14
|
||||
#define SMEM_HOST_COUNT 15
|
||||
|
||||
/**
|
||||
* struct smem_proc_comm - proc_comm communication struct (legacy)
|
||||
|
||||
@ -313,8 +313,11 @@ static const struct soc_id soc_id[] = {
|
||||
{ 421, "IPQ6000" },
|
||||
{ 422, "IPQ6010" },
|
||||
{ 425, "SC7180" },
|
||||
{ 434, "SM6350" },
|
||||
{ 453, "IPQ6005" },
|
||||
{ 455, "QRB5165" },
|
||||
{ 457, "SM8450" },
|
||||
{ 459, "SM7225" },
|
||||
};
|
||||
|
||||
static const char *socinfo_machine(struct device *dev, unsigned int id)
|
||||
|
||||
@ -68,6 +68,21 @@
|
||||
#define SM8350_MXC_AO 11
|
||||
#define SM8350_MSS 12
|
||||
|
||||
/* SM8450 Power Domain Indexes */
|
||||
#define SM8450_CX 0
|
||||
#define SM8450_CX_AO 1
|
||||
#define SM8450_EBI 2
|
||||
#define SM8450_GFX 3
|
||||
#define SM8450_LCX 4
|
||||
#define SM8450_LMX 5
|
||||
#define SM8450_MMCX 6
|
||||
#define SM8450_MMCX_AO 7
|
||||
#define SM8450_MX 8
|
||||
#define SM8450_MX_AO 9
|
||||
#define SM8450_MXC 10
|
||||
#define SM8450_MXC_AO 11
|
||||
#define SM8450_MSS 12
|
||||
|
||||
/* SC7180 Power Domain Indexes */
|
||||
#define SC7180_CX 0
|
||||
#define SC7180_CX_AO 1
|
||||
@ -219,6 +234,24 @@
|
||||
#define SM6115_VDD_LPI_CX 6
|
||||
#define SM6115_VDD_LPI_MX 7
|
||||
|
||||
/* SM6125 Power Domains */
|
||||
#define SM6125_VDDCX 0
|
||||
#define SM6125_VDDCX_AO 1
|
||||
#define SM6125_VDDCX_VFL 2
|
||||
#define SM6125_VDDMX 3
|
||||
#define SM6125_VDDMX_AO 4
|
||||
#define SM6125_VDDMX_VFL 5
|
||||
|
||||
/* QCM2290 Power Domains */
|
||||
#define QCM2290_VDDCX 0
|
||||
#define QCM2290_VDDCX_AO 1
|
||||
#define QCM2290_VDDCX_VFL 2
|
||||
#define QCM2290_VDDMX 3
|
||||
#define QCM2290_VDDMX_AO 4
|
||||
#define QCM2290_VDDMX_VFL 5
|
||||
#define QCM2290_VDD_LPI_CX 6
|
||||
#define QCM2290_VDD_LPI_MX 7
|
||||
|
||||
/* RPM SMD Power Domain performance levels */
|
||||
#define RPM_SMD_LEVEL_RETENTION 16
|
||||
#define RPM_SMD_LEVEL_RETENTION_PLUS 32
|
||||
|
||||
@ -33,6 +33,9 @@
|
||||
#define LLCC_MODPE 29
|
||||
#define LLCC_APTCM 30
|
||||
#define LLCC_WRCACHE 31
|
||||
#define LLCC_CVPFW 32
|
||||
#define LLCC_CPUSS1 33
|
||||
#define LLCC_CPUHWT 36
|
||||
|
||||
/**
|
||||
* struct llcc_slice_desc - Cache slice descriptor
|
||||
|
||||
Reference in New Issue
Block a user