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drm/i915/pvc: Add recommended MMIO setting

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As with past platforms, the bspec's performance tuning guide provides
recommended MMIO settings.  Although not technically "workarounds" we
apply these through the workaround framework to ensure that they're
re-applied at the proper times (e.g., on engine resets) and that any
conflicts with real workarounds are flagged.

Bspec: 72161
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220613165314.862029-1-matthew.d.roper@intel.com
This commit is contained in:
Matt Roper 2022-06-13 09:53:14 -07:00
parent 9affc1b87e
commit 1556c3b4c7
2 changed files with 14 additions and 0 deletions
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5
drivers/gpu/drm/i915/gt/intel_gt_regs.h
View File

@ -981,6 +981,11 @@
#define XEHP_L3SCQREG7 _MMIO(0xb188)
#define BLEND_FILL_CACHING_OPT_DIS REG_BIT(3)
#define XEHPC_L3SCRUB _MMIO(0xb18c)
#define SCRUB_CL_DWNGRADE_SHARED REG_BIT(12)
#define SCRUB_RATE_PER_BANK_MASK REG_GENMASK(2, 0)
#define SCRUB_RATE_4B_PER_CLK REG_FIELD_PREP(SCRUB_RATE_PER_BANK_MASK, 0x6)
#define L3SQCREG1_CCS0 _MMIO(0xb200)
#define FLUSHALLNONCOH REG_BIT(5)

9
drivers/gpu/drm/i915/gt/intel_workarounds.c
View File

@ -2679,6 +2679,15 @@ general_render_compute_wa_init(struct intel_engine_cs *engine, struct i915_wa_li
{
struct drm_i915_private *i915 = engine->i915;
if (IS_PONTEVECCHIO(i915)) {
/*
* The following is not actually a "workaround" but rather
* a recommended tuning setting documented in the bspec's
* performance guide section.
*/
wa_write(wal, XEHPC_L3SCRUB, SCRUB_CL_DWNGRADE_SHARED | SCRUB_RATE_4B_PER_CLK);
}
if (IS_XEHPSDV(i915)) {
/* Wa_1409954639 */
wa_masked_en(wal,