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dmaengine: dw-edma: Improve number of channels check

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It was added some extra checks to ensure that the driver doesn't try to
use more DMA channels than actually are available in hardware.

Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Link: https://lore.kernel.org/r/cfb2b0a4f97ae9dc83ebe5ea59d6a51d69ea3654.1613674948.git.gustavo.pimentel@synopsys.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Gustavo Pimentel 2021-02-18 20:04:01 +01:00 committed by Vinod Koul
parent 85e7518f42
commit 16b90dd94d
2 changed files with 11 additions and 12 deletions
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21
drivers/dma/dw-edma/dw-edma-core.c
View File

@ -914,19 +914,16 @@ int dw_edma_probe(struct dw_edma_chip *chip)
raw_spin_lock_init(&dw->lock);
if (!dw->wr_ch_cnt) {
/* Find out how many write channels are supported by hardware */
dw->wr_ch_cnt = dw_edma_v0_core_ch_count(dw, EDMA_DIR_WRITE);
if (!dw->wr_ch_cnt)
return -EINVAL;
}
dw->wr_ch_cnt = min_t(u16, dw->wr_ch_cnt,
dw_edma_v0_core_ch_count(dw, EDMA_DIR_WRITE));
dw->wr_ch_cnt = min_t(u16, dw->wr_ch_cnt, EDMA_MAX_WR_CH);
if (!dw->rd_ch_cnt) {
/* Find out how many read channels are supported by hardware */
dw->rd_ch_cnt = dw_edma_v0_core_ch_count(dw, EDMA_DIR_READ);
if (!dw->rd_ch_cnt)
return -EINVAL;
}
dw->rd_ch_cnt = min_t(u16, dw->rd_ch_cnt,
dw_edma_v0_core_ch_count(dw, EDMA_DIR_READ));
dw->rd_ch_cnt = min_t(u16, dw->rd_ch_cnt, EDMA_MAX_RD_CH);
if (!dw->wr_ch_cnt && !dw->rd_ch_cnt)
return -EINVAL;
dev_vdbg(dev, "Channels:\twrite=%d, read=%d\n",
dw->wr_ch_cnt, dw->rd_ch_cnt);

2
drivers/dma/dw-edma/dw-edma-core.h
View File

@ -15,6 +15,8 @@
#include "../virt-dma.h"
#define EDMA_LL_SZ 24
#define EDMA_MAX_WR_CH 8
#define EDMA_MAX_RD_CH 8
enum dw_edma_dir {
EDMA_DIR_WRITE = 0,