iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

More Qualcomm ARM64 DTS updates for v5.20

Browse Source 
Related to SDM845, the Xiaomi Mi Mix2s is introduced, the DB845c on
 SDM845 gains support for the second GPI DMA controller and has the GENI
 I2C and SPI instances wired up to their respective GPI DMA controller.
 
 QCS404 USB controller and PHY assignment is corrected and IPQ8074 gains
 APCS definition to handle outgoing IPC interrupts.
 
 Lastly a range of Devicetree validation issues are addressed.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmLYjLobHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3F5h8QANItInM0qgZTRPXq+x2z
 a2RWDX1YL5hmFR+KnTutC3nr5vjiRkBt6Vx8BCiTp6hKFhP36xKUeMVqUiIZ+M1H
 xBrtQzrLsw/M0xgDYT9b8xiarF+p8ZnKxK9be4hf9/BEvpeK2ec6yqH0UG+Hxv/G
 +346jU7hP5XUUZqLNR/17u5vNl/aWK1plyWC03xxaAX9QD8pS/Or+99HHm4SMC+H
 H9B1V86ul30Hh4Po8u2KPo/xZG6cpd25+FozcapMG8h7YomjphgMT1xqeB7klMVV
 9qQYbjcTD4vXG3/fNyonuj9heoWYgFUPmSfIgnPx8HtHiGmB4BaP65ruWMYu7CfZ
 2sAxk6bcB+CrwktCITeiS0pUNj3ySBrGs3GK8Qde4b5ipVJ5mTbwTVWrJYMRZQrL
 7UakNmkruh08ctVa1wGJfXwnq6j7Q/1SEfi3rHXFlcZJqTQN9KEVKUhD1tXhgZSy
 4DOtdOaoi6eVwc4aslM4EH1NjBEIWTbSNminLeHl8WAVIsxQbHt+/i15hDb47Zd2
 3Ed18iLwqSHuWctobcx0CiTGgRnvIiVckrJO87y1Csdf3YQBOPJ1gkM1CiH4EOUY
 FtsNTYpihJ+xGH5U5vhVqIZ1iBvuaV38ryQs7SaU2E6Z0AHBeD8BP5BO6inBEWnk
 fT1lIyrZcO8mGwrlX7FCJ8UP
 =yD5f
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLZTRkACgkQmmx57+YA
 GNk56g/+MenTEV5wlvuPDGOnrCjejMO1+gOMBNBibJoz5NwvnVZMT9JA+jBlL+4K
 jqwLcGCEcj2Uxi//oCXPazHkp1MNPeDf5l+sDTqYddgl5pURhNljCAv9vGCanFFk
 V+4AtC9o/xiCwtpWGYuTSDOm2IEeeVXdwT2B7Ph3O5ucABczB2zEUAK7F7n9mq+d
 aLefmE8LOTP+a83EBZgKsZ2J/QEtSSRqf3fMURP/kj7zVOjJsCc8AJyXnZjpHHxq
 AGufsPyoWCWQGRJKHbrI7/ofrU/aSH6OsrNJC9SwiyfC0OXRXsD763kPMp+bi499
 1vidjcrPTmmYlJhDolpv3YFnwV695dMNZjRw6oIJ6uyrEI3Ska7ltKJF5W0maiHg
 DT79Cu2Ru/EjAqkfb4DUtopG4hprTeG9IS4uhXTE1edB9N1AZGQrSD0z/jc2J7g9
 inQuM9ljxrU8XvQYSDEv3i6vaA/JM10kcwhI1C33l51XZttzk6rh9xO0DuOpul8p
 08VbXR9SThYnIR6rQLW31BDKldDkugaPUG+v9vaEbodq6E14bSawqLQ63jAsyu+V
 ATfVtaRtadioMgyuIRcQg/Ab73svTjd8/MqLVvCBdZc64NGIibg7DlsObEE0MeFV
 oS6aEzMqKf6rt3bK3zgMBpB7G0iyEkY+X5SN/TcmwasXcY6hXLw=
 =y0DL
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

More Qualcomm ARM64 DTS updates for v5.20

Related to SDM845, the Xiaomi Mi Mix2s is introduced, the DB845c on
SDM845 gains support for the second GPI DMA controller and has the GENI
I2C and SPI instances wired up to their respective GPI DMA controller.

QCS404 USB controller and PHY assignment is corrected and IPQ8074 gains
APCS definition to handle outgoing IPC interrupts.

Lastly a range of Devicetree validation issues are addressed.

* tag 'qcom-arm64-for-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (53 commits)
  arm64: dts: qcom: Add support for Xiaomi Mi Mix2s
  dt-bindings: arm: qcom: Add Xiaomi Mi Mix2s bindings
  dt-bindings: arm: qcom: Document lg,judyln and lg,judyp devices
  dt-bindings: arm: qcom: add missing SM6350 board compatibles
  dt-bindings: arm: qcom: add missing SM6125 board compatibles
  dt-bindings: arm: qcom: add missing SDM845 board compatibles
  dt-bindings: arm: qcom: add missing SDM636 board compatibles
  dt-bindings: arm: qcom: add missing SDM630 board compatibles
  dt-bindings: arm: qcom: add missing QCS404 board compatibles
  dt-bindings: arm: qcom: add missing MSM8992 board compatibles
  dt-bindings: arm: qcom: add missing MSM8998 board compatibles
  dt-bindings: vendor-prefixes: add Shift GmbH
  dt-bindings: arm: qcom: add missing SM8350 board compatibles
  dt-bindings: arm: qcom: add missing SM8250 board compatibles
  dt-bindings: arm: qcom: add missing SM8150 board compatibles
  dt-bindings: arm: qcom: add missing MSM8994 board compatibles
  dt-bindings: arm: qcom: add missing MSM8916 board compatibles
  dt-bindings: arm: qcom: fix MSM8994 boards compatibles
  dt-bindings: arm: qcom: fix MSM8916 MTP compatibles
  dt-bindings: arm: qcom: fix Longcheer L8150 compatibles
  ...

Link: https://lore.kernel.org/r/20220720231643.2114565-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-07-21 14:56:56 +02:00
commit 2c947cd63b
24 changed files with 1131 additions and 151 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

111
Documentation/devicetree/bindings/arm/qcom.yaml
View File

@ -38,6 +38,8 @@ description: |
msm8992
msm8994
msm8996
msm8998
qcs404
sa8155p
sa8540p
sc7180
@ -47,10 +49,13 @@ description: |
sda660
sdm630
sdm632
sdm636
sdm660
sdm845
sdx55
sdx65
sm6125
sm6350
sm7225
sm8150
sm8250
@ -159,28 +164,50 @@ properties:
- const: qcom,msm8974
- items:
- enum:
- alcatel,idol347
- const: qcom,msm8916-mtp/1
- const: qcom,msm8916-mtp
- const: qcom,msm8916-mtp/1
- const: qcom,msm8916
- items:
- enum:
- longcheer,l8150
- alcatel,idol347
- asus,z00l
- huawei,g7
- longcheer,l8910
- samsung,a3u-eur
- samsung,a5u-eur
- samsung,j5
- samsung,serranove
- wingtech,wt88047
- const: qcom,msm8916
- items:
- const: longcheer,l8150
- const: qcom,msm8916-v1-qrd/9-v1
- const: qcom,msm8916
- items:
- enum:
- lg,bullhead
- microsoft,talkman
- xiaomi,libra
- const: qcom,msm8992
- items:
- enum:
- sony,karin_windy
- const: qcom,apq8094
- items:
- enum:
- huawei,angler
- microsoft,cityman
- sony,ivy-row
- sony,karin-row
- sony,satsuki-row
- sony,sumire-row
- sony,suzuran-row
- qcom,msm8994
- const: qcom,apq8094
- const: qcom,msm8994
- items:
- enum:
@ -200,6 +227,20 @@ properties:
- xiaomi,scorpio
- const: qcom,msm8996
- items:
- enum:
- asus,novago-tp370ql
- fxtec,pro1
- hp,envy-x2
- lenovo,miix-630
- oneplus,cheeseburger
- oneplus,dumpling
- qcom,msm8998-mtp
- sony,xperia-lilac
- sony,xperia-maple
- sony,xperia-poplar
- const: qcom,msm8998
- items:
- enum:
- qcom,ipq4019-ap-dk01.1-c1
@ -548,6 +589,14 @@ properties:
- qcom,sc8280xp-qrd
- const: qcom,sc8280xp
- items:
- enum:
- sony,discovery-row
- sony,kirin-row
- sony,pioneer-row
- sony,voyager-row
- const: qcom,sdm630
- items:
- enum:
- inforce,ifc6560
@ -558,6 +607,11 @@ properties:
- fairphone,fp3
- const: qcom,sdm632
- items:
- enum:
- sony,mermaid-row
- const: qcom,sdm636
- items:
- enum:
- xiaomi,lavender
@ -581,6 +635,13 @@ properties:
- qcom,ipq6018-cp01-c1
- const: qcom,ipq6018
- items:
- enum:
- qcom,qcs404-evb-1000
- qcom,qcs404-evb-4000
- const: qcom,qcs404-evb
- const: qcom,qcs404
- items:
- enum:
- qcom,sa8155p-adp
@ -591,6 +652,34 @@ properties:
- qcom,sa8295p-adp
- const: qcom,sa8540p
- items:
- enum:
- lenovo,yoga-c630
- lg,judyln
- lg,judyp
- oneplus,enchilada
- oneplus,fajita
- qcom,sdm845-mtp
- shift,axolotl
- samsung,w737
- sony,akari-row
- sony,akatsuki-row
- sony,apollo-row
- thundercomm,db845c
- xiaomi,beryllium
- xiaomi,polaris
- const: qcom,sdm845
- items:
- enum:
- sony,pdx201
- const: qcom,sm6125
- items:
- enum:
- sony,pdx213
- const: qcom,sm6350
- items:
- enum:
- fairphone,fp4
@ -598,19 +687,29 @@ properties:
- items:
- enum:
- microsoft,surface-duo
- qcom,sm8150-hdk
- qcom,sm8150-mtp
- sony,bahamut-generic
- sony,griffin-generic
- const: qcom,sm8150
- items:
- enum:
- qcom,qrb5165-rb5
- qcom,sm8250-hdk
- qcom,sm8250-mtp
- sony,pdx203-generic
- sony,pdx206-generic
- const: qcom,sm8250
- items:
- enum:
- microsoft,surface-duo2
- qcom,sm8350-hdk
- qcom,sm8350-mtp
- sony,pdx214-generic
- sony,pdx215-generic
- const: qcom,sm8350
- items:

4
Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml
View File

@ -63,8 +63,8 @@ additionalProperties: true
examples:
- |
/ {
model = "Qualcomm Technologies, Inc. QCS404";
compatible = "qcom,qcs404";
model = "Qualcomm Technologies, Inc. QCS404 EVB 1000";
compatible = "qcom,qcs404-evb-1000", "qcom,qcs404-evb", "qcom,qcs404";
#address-cells = <2>;
#size-cells = <2>;

2
Documentation/devicetree/bindings/vendor-prefixes.yaml
View File

@ -1103,6 +1103,8 @@ patternProperties:
description: SGX Sensortech
"^sharp,.*":
description: Sharp Corporation
"^shift,.*":
description: SHIFT GmbH
"^shimafuji,.*":
description: Shimafuji Electric, Inc.
"^shiratech,.*":

1
arch/arm64/boot/dts/qcom/Makefile
View File

@ -129,6 +129,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm845-sony-xperia-tama-akari.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-sony-xperia-tama-akatsuki.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-sony-xperia-tama-apollo.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-xiaomi-beryllium.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-xiaomi-polaris.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-shift-axolotl.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm850-lenovo-yoga-c630.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm850-samsung-w737.dtb

3
arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
View File

@ -5,11 +5,8 @@
#include "ipq8074.dtsi"
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Qualcomm Technologies, Inc. IPQ8074-HK01";
compatible = "qcom,ipq8074-hk01", "qcom,ipq8074";
interrupt-parent = <&intc>;
aliases {
serial0 = &blsp1_uart5;

5
arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi
View File

@ -7,11 +7,6 @@
#include "ipq8074.dtsi"
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
interrupt-parent = <&intc>;
aliases {
serial0 = &blsp1_uart5;
};

12
arch/arm64/boot/dts/qcom/ipq8074.dtsi
View File

@ -7,8 +7,12 @@
#include <dt-bindings/clock/qcom,gcc-ipq8074.h>
/ {
#address-cells = <2>;
#size-cells = <2>;
model = "Qualcomm Technologies, Inc. IPQ8074";
compatible = "qcom,ipq8074";
interrupt-parent = <&intc>;
clocks {
sleep_clk: sleep_clk {
@ -662,6 +666,14 @@
timeout-sec = <30>;
};
apcs_glb: mailbox@b111000 {
compatible = "qcom,ipq8074-apcs-apps-global";
reg = <0x0b111000 0x6000>;
#clock-cells = <1>;
#mbox-cells = <1>;
};
timer@b120000 {
#address-cells = <1>;
#size-cells = <1>;

10
arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino-poplar.dts
View File

@ -26,11 +26,13 @@
};
&vreg_l18a_2p85 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
/* Note: Round-down from 2850000 to be a multiple of PLDO step-size 8000 */
regulator-min-microvolt = <2848000>;
regulator-max-microvolt = <2848000>;
};
&vreg_l22a_2p85 {
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <2700000>;
/* Note: Round-down from 2700000 to be a multiple of PLDO step-size 8000 */
regulator-min-microvolt = <2696000>;
regulator-max-microvolt = <2696000>;
};

4
arch/arm64/boot/dts/qcom/qcs404.dtsi
View File

@ -548,7 +548,7 @@
compatible = "snps,dwc3";
reg = <0x07580000 0xcd00>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb2_phy_sec>, <&usb3_phy>;
phys = <&usb2_phy_prim>, <&usb3_phy>;
phy-names = "usb2-phy", "usb3-phy";
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x10>;
@ -577,7 +577,7 @@
compatible = "snps,dwc3";
reg = <0x078c0000 0xcc00>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb2_phy_prim>;
phys = <&usb2_phy_sec>;
phy-names = "usb2-phy";
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x10>;

10
arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
View File

@ -58,7 +58,7 @@
leds {
compatible = "gpio-leds";
user4 {
led-user4 {
label = "green:user4";
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_GREEN>;
@ -67,7 +67,7 @@
default-state = "off";
};
wlan {
led-wlan {
label = "yellow:wlan";
function = LED_FUNCTION_WLAN;
color = <LED_COLOR_ID_YELLOW>;
@ -76,7 +76,7 @@
default-state = "off";
};
bt {
led-bt {
label = "blue:bt";
function = LED_FUNCTION_BLUETOOTH;
color = <LED_COLOR_ID_BLUE>;
@ -84,7 +84,6 @@
linux,default-trigger = "bluetooth-power";
default-state = "off";
};
};
lt9611_1v2: lt9611-vdd12-regulator {
@ -816,6 +815,9 @@
&pm8150l_lpg {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
led@1 {
reg = <1>;
color = <LED_COLOR_ID_GREEN>;

9
arch/arm64/boot/dts/qcom/sc7180.dtsi
View File

@ -2911,7 +2911,7 @@
status = "disabled";
mdp: mdp@ae01000 {
mdp: display-controller@ae01000 {
compatible = "qcom,sc7180-dpu";
reg = <0 0x0ae01000 0 0x8f000>,
<0 0x0aeb0000 0 0x2008>;
@ -3080,7 +3080,11 @@
compatible = "qcom,sc7180-dp";
status = "disabled";
reg = <0 0x0ae90000 0 0x1400>;
reg = <0 0xae90000 0 0x200>,
<0 0xae90200 0 0x200>,
<0 0xae90400 0 0xc00>,
<0 0xae91000 0 0x400>,
<0 0xae91400 0 0x400>;
interrupt-parent = <&mdss>;
interrupts = <12>;
@ -3092,7 +3096,6 @@
<&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
clock-names = "core_iface", "core_aux", "ctrl_link",
"ctrl_link_iface", "stream_pixel";
#clock-cells = <1>;
assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
<&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;

64
arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi
View File

@ -5,6 +5,70 @@
* Copyright (c) 2022, The Linux Foundation. All rights reserved.
*/
/* PINCTRL */
&lpass_dmic01_clk {
drive-strength = <8>;
bias-disable;
};
&lpass_dmic01_clk_sleep {
drive-strength = <2>;
};
&lpass_dmic01_data {
bias-pull-down;
};
&lpass_dmic23_clk {
drive-strength = <8>;
bias-disable;
};
&lpass_dmic23_clk_sleep {
drive-strength = <2>;
};
&lpass_dmic23_data {
bias-pull-down;
};
&lpass_rx_swr_clk {
drive-strength = <2>;
slew-rate = <1>;
bias-disable;
};
&lpass_rx_swr_clk_sleep {
bias-pull-down;
};
&lpass_rx_swr_data {
drive-strength = <2>;
slew-rate = <1>;
bias-bus-hold;
};
&lpass_rx_swr_data_sleep {
bias-pull-down;
};
&lpass_tx_swr_clk {
drive-strength = <2>;
slew-rate = <1>;
bias-disable;
};
&lpass_tx_swr_clk_sleep {
bias-pull-down;
};
&lpass_tx_swr_data {
drive-strength = <2>;
slew-rate = <1>;
bias-bus-hold;
};
&mi2s1_data0 {
drive-strength = <6>;
bias-disable;

61
arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
View File

@ -155,67 +155,6 @@ ap_ts_pen_1v8: &i2c13 {
* - If a pin is totally internal to Qcard then it gets Qcard name.
* - If a pin is not hooked up on Qcard, it gets no name.
*/
&lpass_dmic01_clk {
drive-strength = <8>;
bias-disable;
};
&lpass_dmic01_clk_sleep {
drive-strength = <2>;
};
&lpass_dmic01_data {
bias-pull-down;
};
&lpass_dmic23_clk {
drive-strength = <8>;
bias-disable;
};
&lpass_dmic23_clk_sleep {
drive-strength = <2>;
};
&lpass_dmic23_data {
bias-pull-down;
};
&lpass_rx_swr_clk {
drive-strength = <2>;
slew-rate = <1>;
bias-disable;
};
&lpass_rx_swr_clk_sleep {
bias-pull-down;
};
&lpass_rx_swr_data {
drive-strength = <2>;
slew-rate = <1>;
bias-bus-hold;
};
&lpass_rx_swr_data_sleep {
bias-pull-down;
};
&lpass_tx_swr_clk {
drive-strength = <2>;
slew-rate = <1>;
bias-disable;
};
&lpass_tx_swr_clk_sleep {
bias-pull-down;
};
&lpass_tx_swr_data {
drive-strength = <2>;
slew-rate = <1>;
bias-bus-hold;
};
&pm8350c_gpios {
gpio-line-names = "FLASH_STROBE_1", /* 1 */

2
arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
View File

@ -435,8 +435,6 @@ ap_i2c_tpm: &i2c14 {
pinctrl-names = "default";
pinctrl-0 = <&dp_hot_plug_det>;
data-lanes = <0 1>;
vdda-1p2-supply = <&vdd_a_usbssdp_0_1p2>;
vdda-0p9-supply = <&vdd_a_usbssdp_0_core>;
};
&mdss_mdp {

3
arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi
View File

@ -311,9 +311,6 @@
/* NOTE: Not all Qcards have eDP connector stuffed */
&mdss_edp {
vdda-0p9-supply = <&vdd_a_edp_0_0p9>;
vdda-1p2-supply = <&vdd_a_edp_0_1p2>;
aux-bus {
edp_panel: panel {
compatible = "edp-panel";

34
arch/arm64/boot/dts/qcom/sc7280.dtsi
View File

@ -3174,10 +3174,11 @@
assigned-clock-rates = <19200000>, <200000000>;
interrupts-extended = <&intc GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 13 IRQ_TYPE_EDGE_RISING>,
<&pdc 12 IRQ_TYPE_EDGE_RISING>;
<&pdc 12 IRQ_TYPE_EDGE_RISING>,
<&pdc 13 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "hs_phy_irq",
"dm_hs_phy_irq", "dp_hs_phy_irq";
"dp_hs_phy_irq",
"dm_hs_phy_irq";
power-domains = <&gcc GCC_USB30_SEC_GDSC>;
@ -3357,13 +3358,13 @@
assigned-clock-rates = <19200000>, <200000000>;
interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 17 IRQ_TYPE_EDGE_BOTH>,
<&pdc 14 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 15 IRQ_TYPE_EDGE_BOTH>,
<&pdc 14 IRQ_TYPE_LEVEL_HIGH>;
<&pdc 17 IRQ_TYPE_EDGE_BOTH>;
interrupt-names = "hs_phy_irq",
"ss_phy_irq",
"dp_hs_phy_irq",
"dm_hs_phy_irq",
"dp_hs_phy_irq";
"ss_phy_irq";
power-domains = <&gcc GCC_USB30_PRIM_GDSC>;
@ -3716,21 +3717,16 @@
interrupt-parent = <&mdss>;
interrupts = <14>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_EDP_CLKREF_EN>,
<&dispcc DISP_CC_MDSS_AHB_CLK>,
clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
<&dispcc DISP_CC_MDSS_EDP_AUX_CLK>,
<&dispcc DISP_CC_MDSS_EDP_LINK_CLK>,
<&dispcc DISP_CC_MDSS_EDP_LINK_INTF_CLK>,
<&dispcc DISP_CC_MDSS_EDP_PIXEL_CLK>;
clock-names = "core_xo",
"core_ref",
"core_iface",
clock-names = "core_iface",
"core_aux",
"ctrl_link",
"ctrl_link_iface",
"stream_pixel";
#clock-cells = <1>;
assigned-clocks = <&dispcc DISP_CC_MDSS_EDP_LINK_CLK_SRC>,
<&dispcc DISP_CC_MDSS_EDP_PIXEL_CLK_SRC>;
assigned-clock-parents = <&mdss_edp_phy 0>, <&mdss_edp_phy 1>;
@ -3741,9 +3737,6 @@
operating-points-v2 = <&edp_opp_table>;
power-domains = <&rpmhpd SC7280_CX>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
ports {
@ -3810,7 +3803,11 @@
mdss_dp: displayport-controller@ae90000 {
compatible = "qcom,sc7280-dp";
reg = <0 0x0ae90000 0 0x1400>;
reg = <0 0xae90000 0 0x200>,
<0 0xae90200 0 0x200>,
<0 0xae90400 0 0xc00>,
<0 0xae91000 0 0x400>,
<0 0xae91400 0 0x400>;
interrupt-parent = <&mdss>;
interrupts = <12>;
@ -3825,7 +3822,6 @@
"ctrl_link",
"ctrl_link_iface",
"stream_pixel";
#clock-cells = <1>;
assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
<&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;

40
arch/arm64/boot/dts/qcom/sc8280xp.dtsi
View File

@ -36,6 +36,9 @@
compatible = "operating-points-v2";
opp-shared;
opp-300000000 {
opp-hz = /bits/ 64 <300000000>;
};
opp-403200000 {
opp-hz = /bits/ 64 <403200000>;
};
@ -476,7 +479,7 @@
pmu {
compatible = "arm,armv8-pmuv3";
interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
};
psci {
@ -1276,16 +1279,16 @@
#size-cells = <2>;
ranges;
clocks = <&gcc GCC_USB30_PRIM_MASTER_CLK>,
<&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
<&gcc GCC_USB30_PRIM_MASTER_CLK>,
<&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
<&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
<&gcc GCC_USB30_PRIM_SLEEP_CLK>,
<&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
<&gcc GCC_AGGRE_USB_NOC_AXI_CLK>,
<&gcc GCC_AGGRE_USB_NOC_NORTH_AXI_CLK>,
<&gcc GCC_AGGRE_USB_NOC_SOUTH_AXI_CLK>,
<&gcc GCC_SYS_NOC_USB_AXI_CLK>;
clock-names = "core", "iface", "bus_aggr", "utmi", "sleep",
clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi",
"noc_aggr", "noc_aggr_north", "noc_aggr_south", "noc_sys";
assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
@ -1296,8 +1299,10 @@
<&pdc 14 IRQ_TYPE_EDGE_BOTH>,
<&pdc 15 IRQ_TYPE_EDGE_BOTH>,
<&pdc 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hs_phy_irq", "dp_hs_phy_irq",
"dm_hs_phy_irq", "ss_phy_irq";
interrupt-names = "pwr_event",
"dp_hs_phy_irq",
"dm_hs_phy_irq",
"ss_phy_irq";
power-domains = <&gcc USB30_PRIM_GDSC>;
@ -1326,28 +1331,30 @@
#size-cells = <2>;
ranges;
clocks = <&gcc GCC_USB30_SEC_MASTER_CLK>,
<&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>,
clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>,
<&gcc GCC_USB30_SEC_MASTER_CLK>,
<&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>,
<&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
<&gcc GCC_USB30_SEC_SLEEP_CLK>,
<&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
<&gcc GCC_AGGRE_USB_NOC_AXI_CLK>,
<&gcc GCC_AGGRE_USB_NOC_NORTH_AXI_CLK>,
<&gcc GCC_AGGRE_USB_NOC_SOUTH_AXI_CLK>,
<&gcc GCC_SYS_NOC_USB_AXI_CLK>;
clock-names = "core", "iface", "bus_aggr", "utmi", "sleep",
clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi",
"noc_aggr", "noc_aggr_north", "noc_aggr_south", "noc_sys";
assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
<&gcc GCC_USB30_SEC_MASTER_CLK>;
assigned-clock-rates = <19200000>, <200000000>;
interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
interrupts-extended = <&intc GIC_SPI 811 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 12 IRQ_TYPE_EDGE_BOTH>,
<&pdc 13 IRQ_TYPE_EDGE_BOTH>,
<&pdc 16 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hs_phy_irq", "dp_hs_phy_irq",
"dm_hs_phy_irq", "ss_phy_irq";
<&pdc 136 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pwr_event",
"dp_hs_phy_irq",
"dm_hs_phy_irq",
"ss_phy_irq";
power-domains = <&gcc USB30_SEC_GDSC>;
@ -1580,7 +1587,6 @@
<GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
@ -1591,6 +1597,7 @@
<GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
@ -1665,6 +1672,7 @@
reg = <0x0 0x17c20000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x20000000>;
frame@17c21000 {
frame-number = <0>;

6
arch/arm64/boot/dts/qcom/sdm845-db845c.dts
View File

@ -443,6 +443,10 @@
status = "okay";
};
&gpi_dma1 {
status = "okay";
};
&gpu {
status = "okay";
zap-shader {
@ -495,12 +499,14 @@
&i2c11 {
/* On Low speed expansion */
clock-frequency = <100000>;
label = "LS-I2C1";
status = "okay";
};
&i2c14 {
/* On Low speed expansion */
clock-frequency = <100000>;
label = "LS-I2C0";
status = "okay";
};

762
arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts Normal file
View File

@ -0,0 +1,762 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2020, Xilin Wu <strongtz@yeah.net>
* Copyright (c) 2022, Molly Sophia <mollysophia379@gmail.com>
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/sound/qcom,q6afe.h>
#include <dt-bindings/sound/qcom,q6asm.h>
#include "sdm845.dtsi"
#include "pm8998.dtsi"
#include "pmi8998.dtsi"
#include "pm8005.dtsi"
/*
* Delete following upstream (sdm845.dtsi) reserved
* memory mappings which are different in this device.
*/
/delete-node/ &rmtfs_mem;
/delete-node/ &adsp_mem;
/delete-node/ &wlan_msa_mem;
/delete-node/ &mpss_region;
/delete-node/ &venus_mem;
/delete-node/ &cdsp_mem;
/delete-node/ &mba_region;
/delete-node/ &slpi_mem;
/delete-node/ &spss_mem;
/ {
model = "Xiaomi Mi MIX 2S";
compatible = "xiaomi,polaris", "qcom,sdm845";
chassis-type = "handset";
/* required for bootloader to select correct board */
qcom,msm-id = <0x141 0x20001>;
qcom,board-id = <0x2a 0x0>;
aliases {
serial0 = &uart9;
serial1 = &uart6;
};
gpio-keys {
compatible = "gpio-keys";
autorepeat;
pinctrl-names = "default";
pinctrl-0 = <&volume_up_gpio>;
key-vol-up {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
debounce-interval = <15>;
};
};
reserved-memory {
adsp_mem: memory@8c500000 {
reg = <0 0x8c500000 0 0x1e00000>;
no-map;
};
wlan_msa_mem: memory@8e300000 {
reg = <0 0x8e300000 0 0x100000>;
no-map;
};
mpss_region: memory@8e400000 {
reg = <0 0x8e400000 0 0x7800000>;
no-map;
};
venus_mem: memory@95c00000 {
reg = <0 0x95c00000 0 0x500000>;
no-map;
};
cdsp_mem: memory@96100000 {
reg = <0 0x96100000 0 0x800000>;
no-map;
};
mba_region: memory@96900000 {
reg = <0 0x96900000 0 0x200000>;
no-map;
};
slpi_mem: memory@96b00000 {
reg = <0 0x96b00000 0 0x1400000>;
no-map;
};
spss_mem: memory@97f00000 {
reg = <0 0x97f00000 0 0x100000>;
no-map;
};
rmtfs_mem: memory@f6301000 {
compatible = "qcom,rmtfs-mem";
reg = <0 0xf6301000 0 0x200000>;
no-map;
qcom,client-id = <1>;
qcom,vmid = <15>;
};
};
battery: battery {
compatible = "simple-battery";
charge-full-design-microamp-hours = <3400000>;
voltage-min-design-microvolt = <3400000>;
voltage-max-design-microvolt = <4400000>;
};
vreg_tp_vddio: vreg-tp-vddio {
compatible = "regulator-fixed";
regulator-name = "vreg_tp_vddio";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&tlmm 23 0>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
};
vreg_s4a_1p8: vreg-s4a-1p8 {
compatible = "regulator-fixed";
regulator-name = "vreg_s4a_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
};
&apps_rsc {
pm8998-rpmh-regulators {
compatible = "qcom,pm8998-rpmh-regulators";
qcom,pmic-id = "a";
vreg_s2a_1p1: smps2 {
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
};
vreg_s3a_1p35: smps3 {
regulator-min-microvolt = <1352000>;
regulator-max-microvolt = <1352000>;
};
vreg_s5a_2p04: smps5 {
regulator-min-microvolt = <1904000>;
regulator-max-microvolt = <2040000>;
};
vreg_s7a_1p025: smps7 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1028000>;
};
vdda_mipi_dsi0_pll:
vdda_ufs1_core:
vreg_l1a_0p875: ldo1 {
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <880000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l2a_1p2: ldo2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-always-on;
};
vreg_l3a_1p0: ldo3 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l5a_0p8: ldo5 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l6a_1p8: ldo6 {
regulator-min-microvolt = <1856000>;
regulator-max-microvolt = <1856000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l7a_1p8: ldo7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l8a_1p2: ldo8 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1248000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l9a_1p8: ldo9 {
regulator-min-microvolt = <1704000>;
regulator-max-microvolt = <2928000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l10a_2p95: ldo10 {
regulator-min-microvolt = <1704000>;
regulator-max-microvolt = <2928000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l11a_1p05: ldo11 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1048000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l12a_1p8: ldo12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l13a_2p95: ldo13 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l14a_1p8: ldo14 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1880000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-always-on;
};
vreg_l15a_1p8: ldo15 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l16a_2p7: ldo16 {
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2704000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l17a_1p3: ldo17 {
regulator-min-microvolt = <1304000>;
regulator-max-microvolt = <1304000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-always-on;
};
vreg_l18a_2p9: ldo18 {
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l19a_3p1: ldo19 {
regulator-min-microvolt = <2856000>;
regulator-max-microvolt = <3104000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l20a_2p95: ldo20 {
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l21a_2p95: ldo21 {
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l22a_3p3: ldo22 {
regulator-min-microvolt = <2864000>;
regulator-max-microvolt = <3312000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l23a_3p3: ldo23 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3312000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l24a_3p075: ldo24 {
regulator-min-microvolt = <3088000>;
regulator-max-microvolt = <3088000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l25a_3p3: ldo25 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3312000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-always-on;
};
vdda_mipi_dsi0_1p2:
vdda_ufs1_1p2:
vreg_l26a_1p2: ldo26 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l28a_3p0: ldo28 {
regulator-min-microvolt = <2856000>;
regulator-max-microvolt = <3008000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-always-on;
};
vreg_lvs1a_1p8: lvs1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vreg_lvs2a_1p8: lvs2 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
};
pmi8998-rpmh-regulators {
compatible = "qcom,pmi8998-rpmh-regulators";
qcom,pmic-id = "b";
vreg_bob: bob {
regulator-min-microvolt = <3312000>;
regulator-max-microvolt = <3600000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
regulator-allow-bypass;
};
};
pm8005-rpmh-regulators {
compatible = "qcom,pm8005-rpmh-regulators";
qcom,pmic-id = "c";
vreg_smp3c_0p6: smps3 {
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <600000>;
regulator-always-on;
};
};
};
&cdsp_pas {
firmware-name = "qcom/sdm845/polaris/cdsp.mbn";
status = "okay";
};
&dsi0 {
vdda-supply = <&vdda_mipi_dsi0_1p2>;
status = "okay";
display_panel: panel@0 {
compatible = "jdi,fhd-nt35596s";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
vddio-supply = <&vreg_l14a_1p8>;
backlight = <&pmi8998_wled>;
vddpos-supply = <&lab>;
vddneg-supply = <&ibb>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sde_dsi_active>;
pinctrl-1 = <&sde_dsi_suspend>;
port {
panel_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
};
};
&dsi0_out {
remote-endpoint = <&panel_in>;
data-lanes = <0 1 2 3>;
};
&dsi0_phy {
vdds-supply = <&vdda_mipi_dsi0_pll>;
status = "okay";
};
&gcc {
protected-clocks = <GCC_QSPI_CORE_CLK>,
<GCC_QSPI_CORE_CLK_SRC>,
<GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
<GCC_LPASS_Q6_AXI_CLK>,
<GCC_LPASS_SWAY_CLK>;
};
&gmu {
status = "okay";
};
&gpi_dma0 {
status = "okay";
};
&gpi_dma1 {
status = "okay";
};
&gpu {
status = "okay";
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sdm845/polaris/a630_zap.mbn";
};
};
&ibb {
regulator-min-microvolt = <4600000>;
regulator-max-microvolt = <6000000>;
regulator-over-current-protection;
regulator-pull-down;
regulator-soft-start;
qcom,discharge-resistor-kohms = <300>;
};
&ipa {
memory-region = <&ipa_fw_mem>;
firmware-name = "qcom/sdm845/polaris/ipa_fws.mbn";
status = "okay";
};
&i2c14 {
clock-frequency = <400000>;
dmas = <&gpi_dma1 0 6 QCOM_GPI_I2C>,
<&gpi_dma1 1 6 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
status = "okay";
touchscreen@20 {
compatible = "syna,rmi4-i2c";
reg = <0x20>;
#address-cells = <1>;
#size-cells = <0>;
interrupts-extended = <&tlmm 125 0x2008>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&ts_int_default &ts_reset_default>;
pinctrl-1 = <&ts_int_sleep &ts_reset_sleep>;
vdd-supply = <&vreg_l28a_3p0>;
vio-supply = <&vreg_tp_vddio>;
syna,startup-delay-ms = <0xc8>;
syna,reset-delay-ms = <0xc8>;
rmi4-f01@1 {
syna,nosleep-mode = <0x1>;
reg = <0x1>;
};
rmi4-f12@12 {
syna,rezero-wait-ms = <0xc8>;
syna,clip-x-high = <0x438>;
syna,clip-y-high = <0x870>;
syna,sensor-type = <0x1>;
syna,clip-x-low = <0x0>;
syna,clip-y-low = <0x0>;
};
};
};
&lab {
regulator-min-microvolt = <4600000>;
regulator-max-microvolt = <6000000>;
regulator-soft-start;
regulator-pull-down;
};
&mdss {
status = "okay";
};
&mss_pil {
firmware-name = "qcom/sdm845/polaris/mba.mbn", "qcom/sdm845/polaris/modem.mbn";
status = "okay";
};
&pmi8998_wled {
qcom,current-limit-microamp = <20000>;
qcom,current-boost-limit = <970>;
qcom,ovp-millivolt = <19600>;
qcom,switching-freq = <600>;
qcom,num-strings = <4>;
qcom,cabc;
status = "okay";
};
&pm8998_gpio {
volume_up_gpio: pm8998_gpio6 {
pinconf {
qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
function = "normal";
pins = "gpio6";
input-enable;
bias-pull-up;
};
};
};
&pm8998_pon {
resin {
interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
compatible = "qcom,pm8941-resin";
linux,code = <KEY_VOLUMEDOWN>;
debounce = <15625>;
bias-pull-up;
};
};
&q6afedai {
qi2s@22 {
reg = <22>;
qcom,sd-lines = <0>;
};
};
&q6asmdai {
dai@0 {
reg = <0>;
};
dai@1 {
reg = <1>;
};
dai@2 {
reg = <2>;
};
};
&qupv3_id_0 {
status = "okay";
};
&qupv3_id_1 {
status = "okay";
};
&qup_i2c14_default {
pinconf {
pins = "gpio33", "gpio34";
drive-strength = <2>;
bias-disable;
};
};
&tlmm {
gpio-reserved-ranges = <0 4>, <81 4>;
ts_reset_default: ts-reset-default {
pins = "gpio99";
function = "gpio";
drive-strength = <16>;
output-high;
};
ts_int_default: ts-int-default {
pins = "gpio125";
function = "gpio";
bias-pull-down;
drive-strength = <16>;
input-enable;
};
ts_reset_sleep: ts-reset-sleep {
pins = "gpio99";
function = "gpio";
bias-disable;
drive-strength = <2>;
};
ts_int_sleep: ts-int-sleep {
pins = "gpio125";
function = "gpio";
bias-pull-down;
drive-strength = <2>;
input-enable;
};
sde_dsi_active: sde-dsi-active {
pins = "gpio6", "gpio10";
function = "gpio";
drive-strength = <8>;
bias-disable = <0>;
};
sde_dsi_suspend: sde-dsi-suspend {
pins = "gpio6", "gpio10";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
wcd_intr_default: wcd-intr-default {
pins = "goui54";
function = "gpio";
input-enable;
bias-pull-down;
drive-strength = <2>;
};
};
&uart6 {
status = "okay";
bluetooth {
compatible = "qcom,wcn3990-bt";
/* This path is relative to the qca/ subdir under lib/firmware. */
firmware-name = "polaris/crnv21.bin";
vddio-supply = <&vreg_s4a_1p8>;
vddxo-supply = <&vreg_l7a_1p8>;
vddrf-supply = <&vreg_l17a_1p3>;
vddch0-supply = <&vreg_l25a_3p3>;
max-speed = <3200000>;
};
};
&usb_1 {
/* We'll use this as USB 2.0 only */
qcom,select-utmi-as-pipe-clk;
status = "okay";
};
&usb_1_dwc3 {
dr_mode = "peripheral";
/* Fastest mode for USB 2 */
maximum-speed = "high-speed";
/* Remove USB3 phy */
phys = <&usb_1_hsphy>;
phy-names = "usb2-phy";
};
&usb_1_hsphy {
vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
vdda-pll-supply = <&vreg_l12a_1p8>;
vdd-supply = <&vreg_l1a_0p875>;
qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
qcom,imp-res-offset-value = <8>;
status = "okay";
};
&usb_1_qmpphy {
vdda-pll-supply = <&vreg_l1a_0p875>;
vdda-phy-supply = <&vreg_l26a_1p2>;
status = "okay";
};
&ufs_mem_hc {
reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
vcc-supply = <&vreg_l20a_2p95>;
vcc-max-microamp = <800000>;
status = "okay";
};
&ufs_mem_phy {
vdda-phy-supply = <&vdda_ufs1_core>;
vdda-pll-supply = <&vdda_ufs1_1p2>;
status = "okay";
};
&venus {
firmware-name = "qcom/sdm845/polaris/venus.mbn";
status = "okay";
};
&wcd9340 {
pinctrl-0 = <&wcd_intr_default>;
pinctrl-names = "default";
clock-names = "extclk";
clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
reset-gpios = <&tlmm 64 0>;
vdd-buck-sido-supply = <&vreg_s4a_1p8>;
vdd-buck-supply = <&vreg_s4a_1p8>;
vdd-tx-supply = <&vreg_s4a_1p8>;
vdd-rx-supply = <&vreg_s4a_1p8>;
vdd-io-supply = <&vreg_s4a_1p8>;
qcom,micbias1-microvolt = <2700000>;
qcom,micbias2-microvolt = <1800000>;
qcom,micbias3-microvolt = <2700000>;
qcom,micbias4-microvolt = <2700000>;
};
&wifi {
vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
vdd-3.3-ch1-supply = <&vreg_l23a_3p3>;
qcom,snoc-host-cap-skip-quirk;
status = "okay";
};
/* PINCTRL - additions to nodes defined in sdm845.dtsi */
&qup_uart6_default {
pinmux {
pins = "gpio45", "gpio46", "gpio47", "gpio48";
function = "qup6";
};
cts {
pins = "gpio45";
bias-disable;
};
rts-tx {
pins = "gpio46", "gpio47";
drive-strength = <2>;
bias-disable;
};
rx {
pins = "gpio48";
bias-pull-up;
};
};

92
arch/arm64/boot/dts/qcom/sdm845.dtsi
View File

@ -1208,6 +1208,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
<&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>,
<&gpi_dma0 1 0 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1262,6 +1265,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
<&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
<&gpi_dma0 1 1 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1278,6 +1284,9 @@
interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
interconnect-names = "qup-core", "qup-config";
dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
<&gpi_dma0 1 1 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1313,6 +1322,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
<&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>,
<&gpi_dma0 1 2 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1329,6 +1341,9 @@
interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
interconnect-names = "qup-core", "qup-config";
dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>,
<&gpi_dma0 1 2 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1364,6 +1379,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
<&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>,
<&gpi_dma0 1 3 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1380,6 +1398,9 @@
interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
interconnect-names = "qup-core", "qup-config";
dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>,
<&gpi_dma0 1 3 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1415,6 +1436,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
<&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>,
<&gpi_dma0 1 4 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1431,6 +1455,9 @@
interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
interconnect-names = "qup-core", "qup-config";
dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>,
<&gpi_dma0 1 4 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1466,6 +1493,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
<&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>,
<&gpi_dma0 1 5 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1482,6 +1512,9 @@
interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
interconnect-names = "qup-core", "qup-config";
dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>,
<&gpi_dma0 1 5 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1517,6 +1550,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
<&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma0 0 6 QCOM_GPI_I2C>,
<&gpi_dma0 1 6 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1533,6 +1569,9 @@
interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
interconnect-names = "qup-core", "qup-config";
dmas = <&gpi_dma0 0 6 QCOM_GPI_SPI>,
<&gpi_dma0 1 6 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1580,6 +1619,9 @@
interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
interconnect-names = "qup-core", "qup-config";
dmas = <&gpi_dma0 0 7 QCOM_GPI_SPI>,
<&gpi_dma0 1 7 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1653,6 +1695,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
<&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>,
<&gpi_dma1 1 0 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1669,6 +1714,9 @@
interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
interconnect-names = "qup-core", "qup-config";
dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>,
<&gpi_dma1 1 0 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1704,6 +1752,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
<&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
<&gpi_dma1 1 1 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1720,6 +1771,9 @@
interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
interconnect-names = "qup-core", "qup-config";
dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
<&gpi_dma1 1 1 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1755,6 +1809,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
<&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>,
<&gpi_dma1 1 2 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1771,6 +1828,9 @@
interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
interconnect-names = "qup-core", "qup-config";
dmas = <&gpi_dma1 0 2 QCOM_GPI_SPI>,
<&gpi_dma1 1 2 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1806,6 +1866,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
<&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>,
<&gpi_dma1 1 3 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1822,6 +1885,9 @@
interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
interconnect-names = "qup-core", "qup-config";
dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>,
<&gpi_dma1 1 3 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1857,6 +1923,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
<&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>,
<&gpi_dma1 1 4 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1873,6 +1942,9 @@
interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
interconnect-names = "qup-core", "qup-config";
dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>,
<&gpi_dma1 1 4 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1908,6 +1980,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
<&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>,
<&gpi_dma1 1 5 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1924,6 +1999,9 @@
interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
interconnect-names = "qup-core", "qup-config";
dmas = <&gpi_dma1 0 5 QCOM_GPI_SPI>,
<&gpi_dma1 1 5 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1959,6 +2037,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
<&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma1 0 6 QCOM_GPI_I2C>,
<&gpi_dma1 1 6 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1975,6 +2056,9 @@
interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
interconnect-names = "qup-core", "qup-config";
dmas = <&gpi_dma1 0 6 QCOM_GPI_SPI>,
<&gpi_dma1 1 6 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -2011,6 +2095,9 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
<&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config", "qup-memory";
dmas = <&gpi_dma1 0 7 QCOM_GPI_I2C>,
<&gpi_dma1 1 7 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
};
spi15: spi@a9c000 {
@ -2026,6 +2113,9 @@
interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
interconnect-names = "qup-core", "qup-config";
dmas = <&gpi_dma1 0 7 QCOM_GPI_SPI>,
<&gpi_dma1 1 7 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -4329,7 +4419,7 @@
#size-cells = <2>;
ranges;
mdss_mdp: mdp@ae01000 {
mdss_mdp: display-controller@ae01000 {
compatible = "qcom,sdm845-dpu";
reg = <0 0x0ae01000 0 0x8f000>,
<0 0x0aeb0000 0 0x2008>;

1
arch/arm64/boot/dts/qcom/sdm850.dtsi
View File

@ -16,6 +16,5 @@
cpu4_opp34: opp-2956800000 {
opp-hz = /bits/ 64 <2956800000>;
opp-peak-kBps = <7216000 25497600>;
turbo-mode;
};
};

4
arch/arm64/boot/dts/qcom/sm6350.dtsi
View File

@ -489,7 +489,7 @@
clock-names = "iface", "core", "xo";
qcom,dll-config = <0x000f642c>;
qcom,ddr-config = <0x80040868>;
power-domains = <&rpmhpd 0>;
power-domains = <&rpmhpd SM6350_CX>;
operating-points-v2 = <&sdhc1_opp_table>;
bus-width = <8>;
non-removable;
@ -935,7 +935,7 @@
clock-names = "iface", "core", "xo";
qcom,dll-config = <0x0007642c>;
qcom,ddr-config = <0x80040868>;
power-domains = <&rpmhpd 0>;
power-domains = <&rpmhpd SM6350_CX>;
operating-points-v2 = <&sdhc2_opp_table>;
bus-width = <4>;

22
arch/arm64/boot/dts/qcom/sm8250.dtsi
View File

@ -3018,11 +3018,13 @@
assigned-clock-rates = <19200000>, <200000000>;
interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 14 IRQ_TYPE_EDGE_BOTH>,
<&pdc 17 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 15 IRQ_TYPE_EDGE_BOTH>,
<&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hs_phy_irq", "dp_hs_phy_irq",
"dm_hs_phy_irq", "ss_phy_irq";
<&pdc 14 IRQ_TYPE_EDGE_BOTH>;
interrupt-names = "hs_phy_irq",
"ss_phy_irq",
"dm_hs_phy_irq",
"dp_hs_phy_irq";
power-domains = <&gcc USB30_PRIM_GDSC>;
@ -3073,11 +3075,13 @@
assigned-clock-rates = <19200000>, <200000000>;
interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 12 IRQ_TYPE_EDGE_BOTH>,
<&pdc 16 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 13 IRQ_TYPE_EDGE_BOTH>,
<&pdc 16 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hs_phy_irq", "dp_hs_phy_irq",
"dm_hs_phy_irq", "ss_phy_irq";
<&pdc 12 IRQ_TYPE_EDGE_BOTH>;
interrupt-names = "hs_phy_irq",
"ss_phy_irq",
"dm_hs_phy_irq",
"dp_hs_phy_irq";
power-domains = <&gcc USB30_SEC_GDSC>;
@ -3450,7 +3454,7 @@
#size-cells = <2>;
ranges;
mdss_mdp: mdp@ae01000 {
mdss_mdp: display-controller@ae01000 {
compatible = "qcom,sm8250-dpu";
reg = <0 0x0ae01000 0 0x8f000>,
<0 0x0aeb0000 0 0x2008>;

20
arch/arm64/boot/dts/qcom/sm8350.dtsi
View File

@ -2461,11 +2461,13 @@
assigned-clock-rates = <19200000>, <200000000>;
interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 14 IRQ_TYPE_EDGE_BOTH>,
<&pdc 17 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 15 IRQ_TYPE_EDGE_BOTH>,
<&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hs_phy_irq", "dp_hs_phy_irq",
"dm_hs_phy_irq", "ss_phy_irq";
<&pdc 14 IRQ_TYPE_EDGE_BOTH>;
interrupt-names = "hs_phy_irq",
"ss_phy_irq",
"dm_hs_phy_irq",
"dp_hs_phy_irq";
power-domains = <&gcc USB30_PRIM_GDSC>;
@ -2509,11 +2511,13 @@
assigned-clock-rates = <19200000>, <200000000>;
interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 12 IRQ_TYPE_EDGE_BOTH>,
<&pdc 16 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 13 IRQ_TYPE_EDGE_BOTH>,
<&pdc 16 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hs_phy_irq", "dp_hs_phy_irq",
"dm_hs_phy_irq", "ss_phy_irq";
<&pdc 12 IRQ_TYPE_EDGE_BOTH>;
interrupt-names = "hs_phy_irq",
"ss_phy_irq",
"dm_hs_phy_irq",
"dp_hs_phy_irq";
power-domains = <&gcc USB30_SEC_GDSC>;