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drm/amdgpu: update default timeout of Aldebaran SQ watchdog

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Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reivewed-by: Hawking Zhang <hawking.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Harish Kasiviswanathan
2021-02-23 12:42:18 -05:00
committed by Alex Deucher
parent bea9cd3f8d
commit 4464820dc7
2 changed files with 9 additions and 2 deletions
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4
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
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@ -177,7 +177,7 @@ uint amdgpu_ras_mask = 0xffffffff;
int amdgpu_bad_page_threshold = 100; int amdgpu_bad_page_threshold = 100;
struct amdgpu_watchdog_timer amdgpu_watchdog_timer = { struct amdgpu_watchdog_timer amdgpu_watchdog_timer = {
.timeout_fatal_disable = false, .timeout_fatal_disable = false,
.period = 0x3f, /* about 8s */ .period = 0x23, /* default to max. timeout = 1 << 0x23 cycles */
}; };
/** /**
@ -545,7 +545,7 @@ module_param_named(timeout_fatal_disable, amdgpu_watchdog_timer.timeout_fatal_di
* DOC: timeout_period (uint) * DOC: timeout_period (uint)
* Modify the watchdog timeout max_cycles as (1 << period) * Modify the watchdog timeout max_cycles as (1 << period)
*/ */
MODULE_PARM_DESC(timeout_period, "watchdog timeout period (0x1F = default), timeout maxCycles = (1 << period)"); MODULE_PARM_DESC(timeout_period, "watchdog timeout period (1 to 0x23(default), timeout maxCycles = (1 << period)");
module_param_named(timeout_period, amdgpu_watchdog_timer.period, uint, 0644); module_param_named(timeout_period, amdgpu_watchdog_timer.period, uint, 0644);
/** /**

7
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c
View File

@ -1138,6 +1138,13 @@ void gfx_v9_4_2_enable_watchdog_timer(struct amdgpu_device *adev)
data = REG_SET_FIELD(0, SQ_TIMEOUT_CONFIG, TIMEOUT_FATAL_DISABLE, data = REG_SET_FIELD(0, SQ_TIMEOUT_CONFIG, TIMEOUT_FATAL_DISABLE,
amdgpu_watchdog_timer.timeout_fatal_disable ? 1 : amdgpu_watchdog_timer.timeout_fatal_disable ? 1 :
0); 0);
if (amdgpu_watchdog_timer.timeout_fatal_disable &&
(amdgpu_watchdog_timer.period < 1 ||
amdgpu_watchdog_timer.period > 0x23)) {
dev_warn(adev->dev, "Watchdog period range is 1 to 0x23\n");
amdgpu_watchdog_timer.period = 0x23;
}
data = REG_SET_FIELD(data, SQ_TIMEOUT_CONFIG, PERIOD_SEL, data = REG_SET_FIELD(data, SQ_TIMEOUT_CONFIG, PERIOD_SEL,
amdgpu_watchdog_timer.period); amdgpu_watchdog_timer.period);