metag: IRQ handling
Add core IRQ handling for metag. The code in irq.c exposes the TBX signal numbers as Linux IRQs. Signed-off-by: James Hogan <james.hogan@imgtec.com>
This commit is contained in:
James Hogan
parent
ac919f0883
commit
63047ea360
32
arch/metag/include/asm/irq.h
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32
arch/metag/include/asm/irq.h
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@ -0,0 +1,32 @@
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#ifndef __ASM_METAG_IRQ_H
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#define __ASM_METAG_IRQ_H
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#ifdef CONFIG_4KSTACKS
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extern void irq_ctx_init(int cpu);
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extern void irq_ctx_exit(int cpu);
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# define __ARCH_HAS_DO_SOFTIRQ
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#else
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# define irq_ctx_init(cpu) do { } while (0)
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# define irq_ctx_exit(cpu) do { } while (0)
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#endif
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void tbi_startup_interrupt(int);
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void tbi_shutdown_interrupt(int);
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struct pt_regs;
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int tbisig_map(unsigned int hw);
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extern void do_IRQ(int irq, struct pt_regs *regs);
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#ifdef CONFIG_METAG_SUSPEND_MEM
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int traps_save_context(void);
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int traps_restore_context(void);
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#endif
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#include <asm-generic/irq.h>
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#ifdef CONFIG_HOTPLUG_CPU
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extern void migrate_irqs(void);
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#endif
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#endif /* __ASM_METAG_IRQ_H */
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94
arch/metag/include/asm/irqflags.h
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94
arch/metag/include/asm/irqflags.h
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/*
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* IRQ flags handling
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*
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* This file gets included from lowlevel asm headers too, to provide
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* wrapped versions of the local_irq_*() APIs, based on the
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* raw_local_irq_*() functions from the lowlevel headers.
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*/
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#ifndef _ASM_IRQFLAGS_H
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#define _ASM_IRQFLAGS_H
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#ifndef __ASSEMBLY__
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#include <asm/core_reg.h>
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#include <asm/metag_regs.h>
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#define INTS_OFF_MASK TXSTATI_BGNDHALT_BIT
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#ifdef CONFIG_SMP
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extern unsigned int get_trigger_mask(void);
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#else
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extern unsigned int global_trigger_mask;
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static inline unsigned int get_trigger_mask(void)
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{
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return global_trigger_mask;
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}
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#endif
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static inline unsigned long arch_local_save_flags(void)
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{
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return __core_reg_get(TXMASKI);
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}
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static inline int arch_irqs_disabled_flags(unsigned long flags)
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{
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return (flags & ~INTS_OFF_MASK) == 0;
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}
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static inline int arch_irqs_disabled(void)
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{
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unsigned long flags = arch_local_save_flags();
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return arch_irqs_disabled_flags(flags);
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}
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static inline unsigned long __irqs_disabled(void)
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{
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/*
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* We shouldn't enable exceptions if they are not already
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* enabled. This is required for chancalls to work correctly.
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*/
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return arch_local_save_flags() & INTS_OFF_MASK;
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}
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/*
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* For spinlocks, etc:
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*/
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static inline unsigned long arch_local_irq_save(void)
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{
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unsigned long flags = __irqs_disabled();
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asm volatile("SWAP %0,TXMASKI\n" : "=r" (flags) : "0" (flags)
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: "memory");
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return flags;
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}
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static inline void arch_local_irq_restore(unsigned long flags)
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{
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asm volatile("MOV TXMASKI,%0\n" : : "r" (flags) : "memory");
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}
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static inline void arch_local_irq_disable(void)
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{
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unsigned long flags = __irqs_disabled();
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asm volatile("MOV TXMASKI,%0\n" : : "r" (flags) : "memory");
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}
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static inline void arch_local_irq_enable(void)
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{
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#ifdef CONFIG_SMP
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preempt_disable();
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arch_local_irq_restore(get_trigger_mask());
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preempt_enable_no_resched();
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#else
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arch_local_irq_restore(get_trigger_mask());
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#endif
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}
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#endif /* (__ASSEMBLY__) */
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#endif /* !(_ASM_IRQFLAGS_H) */
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318
arch/metag/kernel/irq.c
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318
arch/metag/kernel/irq.c
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/*
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* Linux/Meta general interrupt handling code
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*
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*/
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/irqdomain.h>
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#include <linux/ratelimit.h>
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#include <asm/core_reg.h>
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#include <asm/mach/arch.h>
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#include <asm/uaccess.h>
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#ifdef CONFIG_4KSTACKS
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union irq_ctx {
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struct thread_info tinfo;
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u32 stack[THREAD_SIZE/sizeof(u32)];
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};
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static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly;
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static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly;
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#endif
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struct irq_domain *root_domain;
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static unsigned int startup_meta_irq(struct irq_data *data)
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{
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tbi_startup_interrupt(data->hwirq);
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return 0;
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}
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static void shutdown_meta_irq(struct irq_data *data)
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{
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tbi_shutdown_interrupt(data->hwirq);
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}
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void do_IRQ(int irq, struct pt_regs *regs)
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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#ifdef CONFIG_4KSTACKS
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struct irq_desc *desc;
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union irq_ctx *curctx, *irqctx;
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u32 *isp;
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#endif
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irq_enter();
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irq = irq_linear_revmap(root_domain, irq);
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#ifdef CONFIG_DEBUG_STACKOVERFLOW
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/* Debugging check for stack overflow: is there less than 1KB free? */
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{
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unsigned long sp;
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sp = __core_reg_get(A0StP);
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sp &= THREAD_SIZE - 1;
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if (unlikely(sp > (THREAD_SIZE - 1024)))
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pr_err("Stack overflow in do_IRQ: %ld\n", sp);
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}
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#endif
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#ifdef CONFIG_4KSTACKS
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curctx = (union irq_ctx *) current_thread_info();
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irqctx = hardirq_ctx[smp_processor_id()];
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/*
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* this is where we switch to the IRQ stack. However, if we are
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* already using the IRQ stack (because we interrupted a hardirq
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* handler) we can't do that and just have to keep using the
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* current stack (which is the irq stack already after all)
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*/
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if (curctx != irqctx) {
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/* build the stack frame on the IRQ stack */
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isp = (u32 *) ((char *)irqctx + sizeof(struct thread_info));
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irqctx->tinfo.task = curctx->tinfo.task;
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/*
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* Copy the softirq bits in preempt_count so that the
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* softirq checks work in the hardirq context.
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*/
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irqctx->tinfo.preempt_count =
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(irqctx->tinfo.preempt_count & ~SOFTIRQ_MASK) |
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(curctx->tinfo.preempt_count & SOFTIRQ_MASK);
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desc = irq_to_desc(irq);
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asm volatile (
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"MOV D0.5,%0\n"
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"MOV D1Ar1,%1\n"
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"MOV D1RtP,%2\n"
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"MOV D0Ar2,%3\n"
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"SWAP A0StP,D0.5\n"
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"SWAP PC,D1RtP\n"
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"MOV A0StP,D0.5\n"
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:
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: "r" (isp), "r" (irq), "r" (desc->handle_irq),
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"r" (desc)
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: "memory", "cc", "D1Ar1", "D0Ar2", "D1Ar3", "D0Ar4",
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"D1Ar5", "D0Ar6", "D0Re0", "D1Re0", "D0.4", "D1RtP",
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"D0.5"
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);
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} else
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#endif
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generic_handle_irq(irq);
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irq_exit();
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set_irq_regs(old_regs);
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}
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#ifdef CONFIG_4KSTACKS
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static char softirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss;
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static char hardirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss;
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/*
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* allocate per-cpu stacks for hardirq and for softirq processing
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*/
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void irq_ctx_init(int cpu)
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{
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union irq_ctx *irqctx;
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if (hardirq_ctx[cpu])
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return;
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irqctx = (union irq_ctx *) &hardirq_stack[cpu * THREAD_SIZE];
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irqctx->tinfo.task = NULL;
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irqctx->tinfo.exec_domain = NULL;
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irqctx->tinfo.cpu = cpu;
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irqctx->tinfo.preempt_count = HARDIRQ_OFFSET;
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irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
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hardirq_ctx[cpu] = irqctx;
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irqctx = (union irq_ctx *) &softirq_stack[cpu * THREAD_SIZE];
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irqctx->tinfo.task = NULL;
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irqctx->tinfo.exec_domain = NULL;
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irqctx->tinfo.cpu = cpu;
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irqctx->tinfo.preempt_count = 0;
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irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
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softirq_ctx[cpu] = irqctx;
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pr_info("CPU %u irqstacks, hard=%p soft=%p\n",
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cpu, hardirq_ctx[cpu], softirq_ctx[cpu]);
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}
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void irq_ctx_exit(int cpu)
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{
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hardirq_ctx[smp_processor_id()] = NULL;
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}
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extern asmlinkage void __do_softirq(void);
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asmlinkage void do_softirq(void)
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{
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unsigned long flags;
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struct thread_info *curctx;
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union irq_ctx *irqctx;
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u32 *isp;
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if (in_interrupt())
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return;
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local_irq_save(flags);
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if (local_softirq_pending()) {
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curctx = current_thread_info();
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irqctx = softirq_ctx[smp_processor_id()];
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irqctx->tinfo.task = curctx->task;
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/* build the stack frame on the softirq stack */
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isp = (u32 *) ((char *)irqctx + sizeof(struct thread_info));
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asm volatile (
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"MOV D0.5,%0\n"
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"SWAP A0StP,D0.5\n"
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"CALLR D1RtP,___do_softirq\n"
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"MOV A0StP,D0.5\n"
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:
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: "r" (isp)
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: "memory", "cc", "D1Ar1", "D0Ar2", "D1Ar3", "D0Ar4",
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"D1Ar5", "D0Ar6", "D0Re0", "D1Re0", "D0.4", "D1RtP",
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"D0.5"
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);
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/*
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* Shouldn't happen, we returned above if in_interrupt():
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*/
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WARN_ON_ONCE(softirq_count());
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}
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local_irq_restore(flags);
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}
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#endif
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static struct irq_chip meta_irq_type = {
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.name = "META-IRQ",
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.irq_startup = startup_meta_irq,
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.irq_shutdown = shutdown_meta_irq,
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};
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/**
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* tbisig_map() - Map a TBI signal number to a virtual IRQ number.
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* @hw: Number of the TBI signal. Must be in range.
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*
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* Returns: The virtual IRQ number of the TBI signal number IRQ specified by
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* @hw.
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*/
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int tbisig_map(unsigned int hw)
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{
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return irq_create_mapping(root_domain, hw);
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}
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/**
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* metag_tbisig_map() - map a tbi signal to a Linux virtual IRQ number
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* @d: root irq domain
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* @irq: virtual irq number
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* @hw: hardware irq number (TBI signal number)
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*
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* This sets up a virtual irq for a specified TBI signal number.
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*/
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static int metag_tbisig_map(struct irq_domain *d, unsigned int irq,
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irq_hw_number_t hw)
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{
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#ifdef CONFIG_SMP
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irq_set_chip_and_handler(irq, &meta_irq_type, handle_percpu_irq);
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#else
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irq_set_chip_and_handler(irq, &meta_irq_type, handle_simple_irq);
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#endif
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return 0;
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}
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static const struct irq_domain_ops metag_tbisig_domain_ops = {
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.map = metag_tbisig_map,
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};
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/*
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* void init_IRQ(void)
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*
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* Parameters: None
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*
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* Returns: Nothing
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*
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* This function should be called during kernel startup to initialize
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* the IRQ handling routines.
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*/
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void __init init_IRQ(void)
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{
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root_domain = irq_domain_add_linear(NULL, 32,
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&metag_tbisig_domain_ops, NULL);
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if (unlikely(!root_domain))
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panic("init_IRQ: cannot add root IRQ domain");
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irq_ctx_init(smp_processor_id());
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if (machine_desc->init_irq)
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machine_desc->init_irq();
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}
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int __init arch_probe_nr_irqs(void)
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{
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if (machine_desc->nr_irqs)
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nr_irqs = machine_desc->nr_irqs;
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return 0;
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}
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#ifdef CONFIG_HOTPLUG_CPU
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static void route_irq(struct irq_data *data, unsigned int irq, unsigned int cpu)
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{
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struct irq_desc *desc = irq_to_desc(irq);
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struct irq_chip *chip = irq_data_get_irq_chip(data);
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raw_spin_lock_irq(&desc->lock);
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if (chip->irq_set_affinity)
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chip->irq_set_affinity(data, cpumask_of(cpu), false);
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raw_spin_unlock_irq(&desc->lock);
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}
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/*
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* The CPU has been marked offline. Migrate IRQs off this CPU. If
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* the affinity settings do not allow other CPUs, force them onto any
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* available CPU.
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*/
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void migrate_irqs(void)
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{
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unsigned int i, cpu = smp_processor_id();
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struct irq_desc *desc;
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for_each_irq_desc(i, desc) {
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struct irq_data *data = irq_desc_get_irq_data(desc);
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unsigned int newcpu;
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if (irqd_is_per_cpu(data))
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continue;
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if (!cpumask_test_cpu(cpu, data->affinity))
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continue;
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newcpu = cpumask_any_and(data->affinity, cpu_online_mask);
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if (newcpu >= nr_cpu_ids) {
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pr_info_ratelimited("IRQ%u no longer affine to CPU%u\n",
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i, cpu);
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cpumask_setall(data->affinity);
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newcpu = cpumask_any_and(data->affinity,
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cpu_online_mask);
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}
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route_irq(data, i, newcpu);
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}
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}
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#endif /* CONFIG_HOTPLUG_CPU */
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