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MIPS: Push .set mips64r* into the functions needing it

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The {save,restore}_fp_context{,32} functions require that the assembler
allows the use of sdc instructions on any FP register, and this is
acomplished by setting the arch to mips64r2 or mips64r6
(using MIPS_ISA_ARCH_LEVEL_RAW).

However this has the effect of enabling the assembler to use mips64
instructions in the expansion of pseudo-instructions. This was done in
the (now-reverted) commit eec43a224c "MIPS: Save/restore MSA context
around signals" which led to my mistakenly believing that there was an
assembler bug, when in reality the assembler was just emitting mips64
instructions. Avoid the issue for future commits which will add code to
r4k_fpu.S by pushing the .set MIPS_ISA_ARCH_LEVEL_RAW directives into
the functions that require it, and remove the spurious assertion
declaring the assembler bug.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
[james.hogan@imgtec.com: Rebase on v4.0-rc1 and reword commit message to
 reflect use of MIPS_ISA_ARCH_LEVEL_RAW]
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9612/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Paul Burton 2015-03-27 17:00:03 +00:00 committed by Ralf Baechle
parent acaf6a97d6
commit 631afc65e8
2 changed files with 5 additions and 9 deletions
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12
arch/mips/include/asm/asmmacro.h
View File

@ -326,8 +326,7 @@
SET_HARDFLOAT SET_HARDFLOAT
.insn .insn
.word COPY_UW_MSA_INSN | (\n << 16) | (\ws << 11) .word COPY_UW_MSA_INSN | (\n << 16) | (\ws << 11)
/* move triggers an assembler bug... */ move \rd, $1
or \rd, $1, zero
.set pop .set pop
.endm .endm
@ -337,8 +336,7 @@
SET_HARDFLOAT SET_HARDFLOAT
.insn .insn
.word COPY_UD_MSA_INSN | (\n << 16) | (\ws << 11) .word COPY_UD_MSA_INSN | (\n << 16) | (\ws << 11)
/* move triggers an assembler bug... */ move \rd, $1
or \rd, $1, zero
.set pop .set pop
.endm .endm
@ -346,8 +344,7 @@
.set push .set push
.set noat .set noat
SET_HARDFLOAT SET_HARDFLOAT
/* move triggers an assembler bug... */ move $1, \rs
or $1, \rs, zero
.word INSERT_W_MSA_INSN | (\n << 16) | (\wd << 6) .word INSERT_W_MSA_INSN | (\n << 16) | (\wd << 6)
.set pop .set pop
.endm .endm
@ -356,8 +353,7 @@
.set push .set push
.set noat .set noat
SET_HARDFLOAT SET_HARDFLOAT
/* move triggers an assembler bug... */ move $1, \rs
or $1, \rs, zero
.word INSERT_D_MSA_INSN | (\n << 16) | (\wd << 6) .word INSERT_D_MSA_INSN | (\n << 16) | (\wd << 6)
.set pop .set pop
.endm .endm

2
arch/mips/kernel/r4k_fpu.S
View File

@ -34,7 +34,6 @@
.endm .endm
.set noreorder .set noreorder
.set MIPS_ISA_ARCH_LEVEL_RAW
LEAF(_save_fp_context) LEAF(_save_fp_context)
.set push .set push
@ -103,6 +102,7 @@ LEAF(_save_fp_context)
/* Save 32-bit process floating point context */ /* Save 32-bit process floating point context */
LEAF(_save_fp_context32) LEAF(_save_fp_context32)
.set push .set push
.set MIPS_ISA_ARCH_LEVEL_RAW
SET_HARDFLOAT SET_HARDFLOAT
cfc1 t1, fcr31 cfc1 t1, fcr31