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drm/amd/pm: add smu feature map support for smu_v13_0_7

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the pp_features can't display full feauture information
when these mapping is not exiting.

Signed-off-by: Yang Wang <KevinYang.Wang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Yang Wang 2022-05-11 12:50:48 +08:00 committed by Alex Deucher
parent d6810d7dfa
commit 6b1407795e
2 changed files with 73 additions and 8 deletions
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23
drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h
View File

@ -368,6 +368,29 @@ enum smu_clk_type {
__SMU_DUMMY_MAP(DATA_CALCULATION), \
__SMU_DUMMY_MAP(DPM_VCLK), \
__SMU_DUMMY_MAP(DPM_DCLK), \
__SMU_DUMMY_MAP(FW_DATA_READ), \
__SMU_DUMMY_MAP(DPM_GFX_POWER_OPTIMIZER), \
__SMU_DUMMY_MAP(DPM_DCN), \
__SMU_DUMMY_MAP(VMEMP_SCALING), \
__SMU_DUMMY_MAP(VDDIO_MEM_SCALING), \
__SMU_DUMMY_MAP(MM_DPM), \
__SMU_DUMMY_MAP(SOC_MPCLK_DS), \
__SMU_DUMMY_MAP(BACO_MPCLK_DS), \
__SMU_DUMMY_MAP(THROTTLERS), \
__SMU_DUMMY_MAP(SMARTSHIFT), \
__SMU_DUMMY_MAP(GFX_READ_MARGIN), \
__SMU_DUMMY_MAP(GFX_IMU), \
__SMU_DUMMY_MAP(GFX_PCC_DFLL), \
__SMU_DUMMY_MAP(BOOT_TIME_CAL), \
__SMU_DUMMY_MAP(BOOT_POWER_OPT), \
__SMU_DUMMY_MAP(GFXCLK_SPREAD_SPECTRUM), \
__SMU_DUMMY_MAP(SOC_PCC), \
__SMU_DUMMY_MAP(OPTIMIZED_VMIN), \
__SMU_DUMMY_MAP(CLOCK_POWER_DOWN_BYPASS), \
__SMU_DUMMY_MAP(MEM_TEMP_READ), \
__SMU_DUMMY_MAP(ATHUB_MMHUB_PG), \
__SMU_DUMMY_MAP(BACO_CG), \
__SMU_DUMMY_MAP(SOC_CG),
#undef __SMU_DUMMY_MAP
#define __SMU_DUMMY_MAP(feature) SMU_FEATURE_##feature##_BIT

58
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
View File

@ -131,14 +131,56 @@ static struct cmn2asic_mapping smu_v13_0_7_clk_map[SMU_CLK_COUNT] = {
};
static struct cmn2asic_mapping smu_v13_0_7_feature_mask_map[SMU_FEATURE_COUNT] = {
[SMU_FEATURE_DPM_GFXCLK_BIT] = {1, FEATURE_DPM_GFXCLK_BIT},
[SMU_FEATURE_DPM_UCLK_BIT] = {1, FEATURE_DPM_UCLK_BIT},
[SMU_FEATURE_DPM_FCLK_BIT] = {1, FEATURE_DPM_FCLK_BIT},
[SMU_FEATURE_DPM_SOCCLK_BIT] = {1, FEATURE_DPM_SOCCLK_BIT},
[SMU_FEATURE_DPM_LINK_BIT] = {1, FEATURE_DPM_LINK_BIT},
[SMU_FEATURE_DPM_VCLK_BIT] = {1, FEATURE_MM_DPM_BIT},
[SMU_FEATURE_DPM_DCLK_BIT] = {1, FEATURE_MM_DPM_BIT},
[SMU_FEATURE_FAN_CONTROL_BIT] = {1, FEATURE_FAN_CONTROL_BIT},
FEA_MAP(FW_DATA_READ),
FEA_MAP(DPM_GFXCLK),
FEA_MAP(DPM_GFX_POWER_OPTIMIZER),
FEA_MAP(DPM_UCLK),
FEA_MAP(DPM_FCLK),
FEA_MAP(DPM_SOCCLK),
FEA_MAP(DPM_MP0CLK),
FEA_MAP(DPM_LINK),
FEA_MAP(DPM_DCN),
FEA_MAP(VMEMP_SCALING),
FEA_MAP(VDDIO_MEM_SCALING),
FEA_MAP(DS_GFXCLK),
FEA_MAP(DS_SOCCLK),
FEA_MAP(DS_FCLK),
FEA_MAP(DS_LCLK),
FEA_MAP(DS_DCFCLK),
FEA_MAP(DS_UCLK),
FEA_MAP(GFX_ULV),
FEA_MAP(FW_DSTATE),
FEA_MAP(GFXOFF),
FEA_MAP(BACO),
FEA_MAP(MM_DPM),
FEA_MAP(SOC_MPCLK_DS),
FEA_MAP(BACO_MPCLK_DS),
FEA_MAP(THROTTLERS),
FEA_MAP(SMARTSHIFT),
FEA_MAP(GTHR),
FEA_MAP(ACDC),
FEA_MAP(VR0HOT),
FEA_MAP(FW_CTF),
FEA_MAP(FAN_CONTROL),
FEA_MAP(GFX_DCS),
FEA_MAP(GFX_READ_MARGIN),
FEA_MAP(LED_DISPLAY),
FEA_MAP(GFXCLK_SPREAD_SPECTRUM),
FEA_MAP(OUT_OF_BAND_MONITOR),
FEA_MAP(OPTIMIZED_VMIN),
FEA_MAP(GFX_IMU),
FEA_MAP(BOOT_TIME_CAL),
FEA_MAP(GFX_PCC_DFLL),
FEA_MAP(SOC_CG),
FEA_MAP(DF_CSTATE),
FEA_MAP(GFX_EDC),
FEA_MAP(BOOT_POWER_OPT),
FEA_MAP(CLOCK_POWER_DOWN_BYPASS),
FEA_MAP(DS_VCN),
FEA_MAP(BACO_CG),
FEA_MAP(MEM_TEMP_READ),
FEA_MAP(ATHUB_MMHUB_PG),
FEA_MAP(SOC_PCC),
};
static struct cmn2asic_mapping smu_v13_0_7_table_map[SMU_TABLE_COUNT] = {