bpf: Fix jit blinding with new sdiv/smov insns
Handle new insns properly in bpf_jit_blind_insn() function. Acked-by: Eduard Zingerman <eddyz87@gmail.com> Signed-off-by: Yonghong Song <yonghong.song@linux.dev> Link: https://lore.kernel.org/r/20230728011225.3715812-1-yonghong.song@linux.dev Signed-off-by: Alexei Starovoitov <ast@kernel.org>
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@ -93,22 +93,28 @@ struct ctl_table_header;
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/* ALU ops on registers, bpf_add|sub|...: dst_reg += src_reg */
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#define BPF_ALU64_REG(OP, DST, SRC) \
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#define BPF_ALU64_REG_OFF(OP, DST, SRC, OFF) \
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((struct bpf_insn) { \
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.code = BPF_ALU64 | BPF_OP(OP) | BPF_X, \
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.dst_reg = DST, \
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.src_reg = SRC, \
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.off = 0, \
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.off = OFF, \
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.imm = 0 })
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#define BPF_ALU32_REG(OP, DST, SRC) \
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#define BPF_ALU64_REG(OP, DST, SRC) \
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BPF_ALU64_REG_OFF(OP, DST, SRC, 0)
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#define BPF_ALU32_REG_OFF(OP, DST, SRC, OFF) \
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((struct bpf_insn) { \
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.code = BPF_ALU | BPF_OP(OP) | BPF_X, \
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.dst_reg = DST, \
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.src_reg = SRC, \
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.off = 0, \
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.off = OFF, \
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.imm = 0 })
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#define BPF_ALU32_REG(OP, DST, SRC) \
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BPF_ALU32_REG_OFF(OP, DST, SRC, 0)
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/* ALU ops on immediates, bpf_add|sub|...: dst_reg += imm32 */
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#define BPF_ALU64_IMM(OP, DST, IMM) \
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@ -1272,7 +1272,7 @@ static int bpf_jit_blind_insn(const struct bpf_insn *from,
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case BPF_ALU | BPF_MOD | BPF_K:
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*to++ = BPF_ALU32_IMM(BPF_MOV, BPF_REG_AX, imm_rnd ^ from->imm);
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*to++ = BPF_ALU32_IMM(BPF_XOR, BPF_REG_AX, imm_rnd);
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*to++ = BPF_ALU32_REG(from->code, from->dst_reg, BPF_REG_AX);
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*to++ = BPF_ALU32_REG_OFF(from->code, from->dst_reg, BPF_REG_AX, from->off);
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break;
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case BPF_ALU64 | BPF_ADD | BPF_K:
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@ -1286,7 +1286,7 @@ static int bpf_jit_blind_insn(const struct bpf_insn *from,
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case BPF_ALU64 | BPF_MOD | BPF_K:
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*to++ = BPF_ALU64_IMM(BPF_MOV, BPF_REG_AX, imm_rnd ^ from->imm);
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*to++ = BPF_ALU64_IMM(BPF_XOR, BPF_REG_AX, imm_rnd);
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*to++ = BPF_ALU64_REG(from->code, from->dst_reg, BPF_REG_AX);
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*to++ = BPF_ALU64_REG_OFF(from->code, from->dst_reg, BPF_REG_AX, from->off);
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break;
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case BPF_JMP | BPF_JEQ | BPF_K:
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