perf/x86/intel/pt: Remove software double buffering PMU capability
Now that all AUX allocations are high-order by default, the software double buffering PMU capability doesn't make sense any more, get rid of it. In case some PMUs choose to opt out, we can re-introduce it. Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Stephane Eranian <eranian@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Cc: adrian.hunter@intel.com Link: http://lkml.kernel.org/r/20190503085536.24119-3-alexander.shishkin@linux.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -1525,8 +1525,7 @@ static __init int pt_init(void)
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}
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if (!intel_pt_validate_hw_cap(PT_CAP_topa_multiple_entries))
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pt_pmu.pmu.capabilities =
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PERF_PMU_CAP_AUX_NO_SG | PERF_PMU_CAP_AUX_SW_DOUBLEBUF;
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pt_pmu.pmu.capabilities = PERF_PMU_CAP_AUX_NO_SG;
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pt_pmu.pmu.capabilities |= PERF_PMU_CAP_EXCLUSIVE | PERF_PMU_CAP_ITRACE;
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pt_pmu.pmu.attr_groups = pt_attr_groups;
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@ -240,7 +240,6 @@ struct perf_event;
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#define PERF_PMU_CAP_NO_INTERRUPT 0x01
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#define PERF_PMU_CAP_NO_NMI 0x02
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#define PERF_PMU_CAP_AUX_NO_SG 0x04
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#define PERF_PMU_CAP_AUX_SW_DOUBLEBUF 0x08
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#define PERF_PMU_CAP_EXCLUSIVE 0x10
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#define PERF_PMU_CAP_ITRACE 0x20
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#define PERF_PMU_CAP_HETEROGENEOUS_CPUS 0x40
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