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arm64: dts: fsl-ls1043a-rdb: add delay between CS and CLK signal for flash device

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Based on commit d59c90a2400f("spi: spi-fsl-dspi: Convert
TCFQ users to XSPI FIFO mode ") and 6c1c26ecd9a3("spi:
spi-fsl-dspi: Accelerate transfers using larger word size if possible"),
on ls1043a-rdb platform, the spi work mode is changed from TCFQ
mode to XSPI mode. In order to keep the transmission sequence matches
with flash device, it is need to add delay between CS and CLK signal.
The strategy of generating delay value refers to QorIQ LS1043A
Reference Manual.

Signed-off-by: Meng Li <Meng.Li@windriver.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Meng Li 2021-11-03 11:38:38 +08:00 committed by Shawn Guo
parent 38c0b94961
commit 745fa3e40f
1 changed files with 2 additions and 0 deletions
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arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
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@ -94,6 +94,8 @@
compatible = "n25q128a13", "jedec,spi-nor"; /* 16MB */
reg = <0>;
spi-max-frequency = <1000000>; /* input clock */
fsl,spi-cs-sck-delay = <100>;
fsl,spi-sck-cs-delay = <100>;
};
slic@2 {