can: rcar_canfd: Add support for RZ/G2L family
CANFD block on RZ/G2L SoC is almost identical to one found on R-Car Gen3 SoC's. On RZ/G2L SoC interrupt sources for each channel are split into different sources and the IP doesn't divide (1/2) CANFD clock within the IP. This patch adds compatible string for RZ/G2L family and splits the irq handlers to accommodate both RZ/G2L and R-Car Gen3 SoC's. Link: https://lore.kernel.org/r/20210727133022.634-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> [mkl: fixed typo: recieve -> receive, thanks Geert] Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
This commit is contained in:
parent
1aa5a06c0a
commit
76e9353a80
@ -37,9 +37,15 @@
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#include <linux/bitmap.h>
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#include <linux/bitops.h>
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#include <linux/iopoll.h>
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#include <linux/reset.h>
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#define RCANFD_DRV_NAME "rcar_canfd"
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enum rcanfd_chip_id {
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RENESAS_RCAR_GEN3 = 0,
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RENESAS_RZG2L,
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};
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/* Global register bits */
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/* RSCFDnCFDGRMCFG */
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@ -513,6 +519,9 @@ struct rcar_canfd_global {
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enum rcar_canfd_fcanclk fcan; /* CANFD or Ext clock */
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unsigned long channels_mask; /* Enabled channels mask */
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bool fdmode; /* CAN FD or Classical CAN only mode */
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struct reset_control *rstc1;
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struct reset_control *rstc2;
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enum rcanfd_chip_id chip_id;
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};
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/* CAN FD mode nominal rate constants */
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@ -1070,38 +1079,70 @@ static void rcar_canfd_tx_done(struct net_device *ndev)
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can_led_event(ndev, CAN_LED_EVENT_TX);
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}
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static void rcar_canfd_handle_global_err(struct rcar_canfd_global *gpriv, u32 ch)
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{
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struct rcar_canfd_channel *priv = gpriv->ch[ch];
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struct net_device *ndev = priv->ndev;
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u32 gerfl;
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/* Handle global error interrupts */
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gerfl = rcar_canfd_read(priv->base, RCANFD_GERFL);
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if (unlikely(RCANFD_GERFL_ERR(gpriv, gerfl)))
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rcar_canfd_global_error(ndev);
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}
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static irqreturn_t rcar_canfd_global_err_interrupt(int irq, void *dev_id)
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{
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struct rcar_canfd_global *gpriv = dev_id;
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u32 ch;
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for_each_set_bit(ch, &gpriv->channels_mask, RCANFD_NUM_CHANNELS)
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rcar_canfd_handle_global_err(gpriv, ch);
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return IRQ_HANDLED;
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}
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static void rcar_canfd_handle_global_receive(struct rcar_canfd_global *gpriv, u32 ch)
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{
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struct rcar_canfd_channel *priv = gpriv->ch[ch];
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u32 ridx = ch + RCANFD_RFFIFO_IDX;
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u32 sts;
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/* Handle Rx interrupts */
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sts = rcar_canfd_read(priv->base, RCANFD_RFSTS(ridx));
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if (likely(sts & RCANFD_RFSTS_RFIF)) {
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if (napi_schedule_prep(&priv->napi)) {
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/* Disable Rx FIFO interrupts */
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rcar_canfd_clear_bit(priv->base,
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RCANFD_RFCC(ridx),
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RCANFD_RFCC_RFIE);
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__napi_schedule(&priv->napi);
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}
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}
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}
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static irqreturn_t rcar_canfd_global_receive_fifo_interrupt(int irq, void *dev_id)
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{
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struct rcar_canfd_global *gpriv = dev_id;
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u32 ch;
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for_each_set_bit(ch, &gpriv->channels_mask, RCANFD_NUM_CHANNELS)
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rcar_canfd_handle_global_receive(gpriv, ch);
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return IRQ_HANDLED;
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}
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static irqreturn_t rcar_canfd_global_interrupt(int irq, void *dev_id)
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{
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struct rcar_canfd_global *gpriv = dev_id;
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struct net_device *ndev;
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struct rcar_canfd_channel *priv;
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u32 sts, gerfl;
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u32 ch, ridx;
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u32 ch;
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/* Global error interrupts still indicate a condition specific
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* to a channel. RxFIFO interrupt is a global interrupt.
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*/
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for_each_set_bit(ch, &gpriv->channels_mask, RCANFD_NUM_CHANNELS) {
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priv = gpriv->ch[ch];
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ndev = priv->ndev;
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ridx = ch + RCANFD_RFFIFO_IDX;
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/* Global error interrupts */
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gerfl = rcar_canfd_read(priv->base, RCANFD_GERFL);
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if (unlikely(RCANFD_GERFL_ERR(gpriv, gerfl)))
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rcar_canfd_global_error(ndev);
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/* Handle Rx interrupts */
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sts = rcar_canfd_read(priv->base, RCANFD_RFSTS(ridx));
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if (likely(sts & RCANFD_RFSTS_RFIF)) {
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if (napi_schedule_prep(&priv->napi)) {
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/* Disable Rx FIFO interrupts */
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rcar_canfd_clear_bit(priv->base,
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RCANFD_RFCC(ridx),
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RCANFD_RFCC_RFIE);
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__napi_schedule(&priv->napi);
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}
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}
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rcar_canfd_handle_global_err(gpriv, ch);
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rcar_canfd_handle_global_receive(gpriv, ch);
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}
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return IRQ_HANDLED;
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}
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@ -1139,38 +1180,73 @@ static void rcar_canfd_state_change(struct net_device *ndev,
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}
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}
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static void rcar_canfd_handle_channel_tx(struct rcar_canfd_global *gpriv, u32 ch)
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{
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struct rcar_canfd_channel *priv = priv = gpriv->ch[ch];
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struct net_device *ndev = priv->ndev;
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u32 sts;
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/* Handle Tx interrupts */
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sts = rcar_canfd_read(priv->base,
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RCANFD_CFSTS(ch, RCANFD_CFFIFO_IDX));
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if (likely(sts & RCANFD_CFSTS_CFTXIF))
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rcar_canfd_tx_done(ndev);
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}
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static irqreturn_t rcar_canfd_channel_tx_interrupt(int irq, void *dev_id)
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{
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struct rcar_canfd_global *gpriv = dev_id;
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u32 ch;
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for_each_set_bit(ch, &gpriv->channels_mask, RCANFD_NUM_CHANNELS)
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rcar_canfd_handle_channel_tx(gpriv, ch);
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return IRQ_HANDLED;
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}
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static void rcar_canfd_handle_channel_err(struct rcar_canfd_global *gpriv, u32 ch)
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{
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struct rcar_canfd_channel *priv = gpriv->ch[ch];
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struct net_device *ndev = priv->ndev;
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u16 txerr, rxerr;
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u32 sts, cerfl;
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/* Handle channel error interrupts */
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cerfl = rcar_canfd_read(priv->base, RCANFD_CERFL(ch));
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sts = rcar_canfd_read(priv->base, RCANFD_CSTS(ch));
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txerr = RCANFD_CSTS_TECCNT(sts);
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rxerr = RCANFD_CSTS_RECCNT(sts);
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if (unlikely(RCANFD_CERFL_ERR(cerfl)))
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rcar_canfd_error(ndev, cerfl, txerr, rxerr);
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/* Handle state change to lower states */
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if (unlikely(priv->can.state != CAN_STATE_ERROR_ACTIVE &&
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priv->can.state != CAN_STATE_BUS_OFF))
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rcar_canfd_state_change(ndev, txerr, rxerr);
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}
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static irqreturn_t rcar_canfd_channel_err_interrupt(int irq, void *dev_id)
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{
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struct rcar_canfd_global *gpriv = dev_id;
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u32 ch;
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for_each_set_bit(ch, &gpriv->channels_mask, RCANFD_NUM_CHANNELS)
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rcar_canfd_handle_channel_err(gpriv, ch);
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return IRQ_HANDLED;
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}
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static irqreturn_t rcar_canfd_channel_interrupt(int irq, void *dev_id)
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{
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struct rcar_canfd_global *gpriv = dev_id;
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struct net_device *ndev;
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struct rcar_canfd_channel *priv;
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u32 sts, ch, cerfl;
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u16 txerr, rxerr;
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u32 ch;
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/* Common FIFO is a per channel resource */
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for_each_set_bit(ch, &gpriv->channels_mask, RCANFD_NUM_CHANNELS) {
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priv = gpriv->ch[ch];
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ndev = priv->ndev;
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/* Channel error interrupts */
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cerfl = rcar_canfd_read(priv->base, RCANFD_CERFL(ch));
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sts = rcar_canfd_read(priv->base, RCANFD_CSTS(ch));
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txerr = RCANFD_CSTS_TECCNT(sts);
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rxerr = RCANFD_CSTS_RECCNT(sts);
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if (unlikely(RCANFD_CERFL_ERR(cerfl)))
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rcar_canfd_error(ndev, cerfl, txerr, rxerr);
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/* Handle state change to lower states */
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if (unlikely((priv->can.state != CAN_STATE_ERROR_ACTIVE) &&
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(priv->can.state != CAN_STATE_BUS_OFF)))
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rcar_canfd_state_change(ndev, txerr, rxerr);
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/* Handle Tx interrupts */
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sts = rcar_canfd_read(priv->base,
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RCANFD_CFSTS(ch, RCANFD_CFFIFO_IDX));
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if (likely(sts & RCANFD_CFSTS_CFTXIF))
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rcar_canfd_tx_done(ndev);
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rcar_canfd_handle_channel_err(gpriv, ch);
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rcar_canfd_handle_channel_tx(gpriv, ch);
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}
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return IRQ_HANDLED;
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}
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@ -1577,6 +1653,53 @@ static int rcar_canfd_channel_probe(struct rcar_canfd_global *gpriv, u32 ch,
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priv->can.clock.freq = fcan_freq;
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dev_info(&pdev->dev, "can_clk rate is %u\n", priv->can.clock.freq);
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if (gpriv->chip_id == RENESAS_RZG2L) {
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char *irq_name;
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int err_irq;
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int tx_irq;
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err_irq = platform_get_irq_byname(pdev, ch == 0 ? "ch0_err" : "ch1_err");
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if (err_irq < 0) {
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err = err_irq;
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goto fail;
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}
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tx_irq = platform_get_irq_byname(pdev, ch == 0 ? "ch0_trx" : "ch1_trx");
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if (tx_irq < 0) {
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err = tx_irq;
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goto fail;
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}
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irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL,
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"canfd.ch%d_err", ch);
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if (!irq_name) {
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err = -ENOMEM;
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goto fail;
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}
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err = devm_request_irq(&pdev->dev, err_irq,
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rcar_canfd_channel_err_interrupt, 0,
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irq_name, gpriv);
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if (err) {
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dev_err(&pdev->dev, "devm_request_irq CH Err(%d) failed, error %d\n",
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err_irq, err);
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goto fail;
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}
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irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL,
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"canfd.ch%d_trx", ch);
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if (!irq_name) {
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err = -ENOMEM;
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goto fail;
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}
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err = devm_request_irq(&pdev->dev, tx_irq,
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rcar_canfd_channel_tx_interrupt, 0,
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irq_name, gpriv);
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if (err) {
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dev_err(&pdev->dev, "devm_request_irq Tx (%d) failed, error %d\n",
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tx_irq, err);
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goto fail;
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}
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}
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if (gpriv->fdmode) {
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priv->can.bittiming_const = &rcar_canfd_nom_bittiming_const;
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priv->can.data_bittiming_const =
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@ -1636,7 +1759,11 @@ static int rcar_canfd_probe(struct platform_device *pdev)
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struct device_node *of_child;
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unsigned long channels_mask = 0;
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int err, ch_irq, g_irq;
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int g_err_irq, g_recc_irq;
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bool fdmode = true; /* CAN FD only mode - default */
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enum rcanfd_chip_id chip_id;
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chip_id = (uintptr_t)of_device_get_match_data(&pdev->dev);
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if (of_property_read_bool(pdev->dev.of_node, "renesas,no-can-fd"))
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fdmode = false; /* Classical CAN only mode */
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@ -1649,16 +1776,30 @@ static int rcar_canfd_probe(struct platform_device *pdev)
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if (of_child && of_device_is_available(of_child))
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channels_mask |= BIT(1); /* Channel 1 */
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ch_irq = platform_get_irq(pdev, 0);
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if (ch_irq < 0) {
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err = ch_irq;
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goto fail_dev;
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}
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if (chip_id == RENESAS_RCAR_GEN3) {
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ch_irq = platform_get_irq_byname_optional(pdev, "ch_int");
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if (ch_irq < 0) {
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/* For backward compatibility get irq by index */
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ch_irq = platform_get_irq(pdev, 0);
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if (ch_irq < 0)
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return ch_irq;
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}
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g_irq = platform_get_irq(pdev, 1);
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if (g_irq < 0) {
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err = g_irq;
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goto fail_dev;
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g_irq = platform_get_irq_byname_optional(pdev, "g_int");
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if (g_irq < 0) {
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/* For backward compatibility get irq by index */
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g_irq = platform_get_irq(pdev, 1);
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if (g_irq < 0)
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return g_irq;
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}
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} else {
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g_err_irq = platform_get_irq_byname(pdev, "g_err");
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if (g_err_irq < 0)
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return g_err_irq;
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g_recc_irq = platform_get_irq_byname(pdev, "g_recc");
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if (g_recc_irq < 0)
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return g_recc_irq;
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}
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/* Global controller context */
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@ -1670,6 +1811,19 @@ static int rcar_canfd_probe(struct platform_device *pdev)
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gpriv->pdev = pdev;
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gpriv->channels_mask = channels_mask;
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gpriv->fdmode = fdmode;
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gpriv->chip_id = chip_id;
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if (gpriv->chip_id == RENESAS_RZG2L) {
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gpriv->rstc1 = devm_reset_control_get_exclusive(&pdev->dev, "rstp_n");
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if (IS_ERR(gpriv->rstc1))
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return dev_err_probe(&pdev->dev, PTR_ERR(gpriv->rstc1),
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"failed to get rstp_n\n");
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gpriv->rstc2 = devm_reset_control_get_exclusive(&pdev->dev, "rstc_n");
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if (IS_ERR(gpriv->rstc2))
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return dev_err_probe(&pdev->dev, PTR_ERR(gpriv->rstc2),
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"failed to get rstc_n\n");
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}
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/* Peripheral clock */
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gpriv->clkp = devm_clk_get(&pdev->dev, "fck");
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@ -1699,7 +1853,7 @@ static int rcar_canfd_probe(struct platform_device *pdev)
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}
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fcan_freq = clk_get_rate(gpriv->can_clk);
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if (gpriv->fcan == RCANFD_CANFDCLK)
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if (gpriv->fcan == RCANFD_CANFDCLK && gpriv->chip_id == RENESAS_RCAR_GEN3)
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/* CANFD clock is further divided by (1/2) within the IP */
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fcan_freq /= 2;
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@ -1711,20 +1865,51 @@ static int rcar_canfd_probe(struct platform_device *pdev)
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gpriv->base = addr;
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/* Request IRQ that's common for both channels */
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err = devm_request_irq(&pdev->dev, ch_irq,
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rcar_canfd_channel_interrupt, 0,
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"canfd.chn", gpriv);
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if (err) {
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dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n",
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ch_irq, err);
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goto fail_dev;
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if (gpriv->chip_id == RENESAS_RCAR_GEN3) {
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err = devm_request_irq(&pdev->dev, ch_irq,
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rcar_canfd_channel_interrupt, 0,
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"canfd.ch_int", gpriv);
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if (err) {
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dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n",
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ch_irq, err);
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goto fail_dev;
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}
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err = devm_request_irq(&pdev->dev, g_irq,
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rcar_canfd_global_interrupt, 0,
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"canfd.g_int", gpriv);
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if (err) {
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dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n",
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g_irq, err);
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goto fail_dev;
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}
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} else {
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err = devm_request_irq(&pdev->dev, g_recc_irq,
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rcar_canfd_global_receive_fifo_interrupt, 0,
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"canfd.g_recc", gpriv);
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if (err) {
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dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n",
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g_recc_irq, err);
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goto fail_dev;
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}
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err = devm_request_irq(&pdev->dev, g_err_irq,
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rcar_canfd_global_err_interrupt, 0,
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"canfd.g_err", gpriv);
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if (err) {
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dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n",
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g_err_irq, err);
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goto fail_dev;
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}
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}
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err = devm_request_irq(&pdev->dev, g_irq,
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rcar_canfd_global_interrupt, 0,
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"canfd.gbl", gpriv);
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err = reset_control_reset(gpriv->rstc1);
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if (err)
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goto fail_dev;
|
||||
err = reset_control_reset(gpriv->rstc2);
|
||||
if (err) {
|
||||
dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n",
|
||||
g_irq, err);
|
||||
reset_control_assert(gpriv->rstc1);
|
||||
goto fail_dev;
|
||||
}
|
||||
|
||||
@ -1733,7 +1918,7 @@ static int rcar_canfd_probe(struct platform_device *pdev)
|
||||
if (err) {
|
||||
dev_err(&pdev->dev,
|
||||
"failed to enable peripheral clock, error %d\n", err);
|
||||
goto fail_dev;
|
||||
goto fail_reset;
|
||||
}
|
||||
|
||||
err = rcar_canfd_reset_controller(gpriv);
|
||||
@ -1790,6 +1975,9 @@ fail_mode:
|
||||
rcar_canfd_disable_global_interrupts(gpriv);
|
||||
fail_clk:
|
||||
clk_disable_unprepare(gpriv->clkp);
|
||||
fail_reset:
|
||||
reset_control_assert(gpriv->rstc1);
|
||||
reset_control_assert(gpriv->rstc2);
|
||||
fail_dev:
|
||||
return err;
|
||||
}
|
||||
@ -1810,6 +1998,9 @@ static int rcar_canfd_remove(struct platform_device *pdev)
|
||||
/* Enter global sleep mode */
|
||||
rcar_canfd_set_bit(gpriv->base, RCANFD_GCTR, RCANFD_GCTR_GSLPR);
|
||||
clk_disable_unprepare(gpriv->clkp);
|
||||
reset_control_assert(gpriv->rstc1);
|
||||
reset_control_assert(gpriv->rstc2);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1827,7 +2018,8 @@ static SIMPLE_DEV_PM_OPS(rcar_canfd_pm_ops, rcar_canfd_suspend,
|
||||
rcar_canfd_resume);
|
||||
|
||||
static const struct of_device_id rcar_canfd_of_table[] = {
|
||||
{ .compatible = "renesas,rcar-gen3-canfd" },
|
||||
{ .compatible = "renesas,rcar-gen3-canfd", .data = (void *)RENESAS_RCAR_GEN3 },
|
||||
{ .compatible = "renesas,rzg2l-canfd", .data = (void *)RENESAS_RZG2L },
|
||||
{ }
|
||||
};
|
||||
|
||||
|
Loading…
x
Reference in New Issue
Block a user