ARM: dts: BCM5301X: Move CRU devices to the CRU node
Clocks and thermal blocks are part of the CRU ("Clock and Reset Unit" or "Central Resource Unit"). Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Florian Fainelli
parent
c862059875
commit
776461b179
@ -428,6 +428,26 @@
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#address-cells = <1>;
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#size-cells = <1>;
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lcpll0: lcpll0@100 {
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#clock-cells = <1>;
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compatible = "brcm,nsp-lcpll0";
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reg = <0x100 0x14>;
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clocks = <&osc>;
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clock-output-names = "lcpll0", "pcie_phy",
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"sdio", "ddr_phy";
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};
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genpll: genpll@140 {
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#clock-cells = <1>;
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compatible = "brcm,nsp-genpll";
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reg = <0x140 0x24>;
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clocks = <&osc>;
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clock-output-names = "genpll", "phy",
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"ethernetclk",
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"usbclk", "iprocfast",
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"sata1", "sata2";
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};
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pinctrl: pin-controller@1c0 {
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compatible = "brcm,bcm4708-pinmux";
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reg = <0x1c0 0x24>;
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@ -454,34 +474,15 @@
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function = "uart1";
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};
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};
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thermal: thermal@2c0 {
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compatible = "brcm,ns-thermal";
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reg = <0x2c0 0x10>;
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#thermal-sensor-cells = <0>;
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};
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};
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};
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lcpll0: lcpll0@1800c100 {
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#clock-cells = <1>;
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compatible = "brcm,nsp-lcpll0";
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reg = <0x1800c100 0x14>;
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clocks = <&osc>;
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clock-output-names = "lcpll0", "pcie_phy", "sdio",
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"ddr_phy";
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};
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genpll: genpll@1800c140 {
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#clock-cells = <1>;
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compatible = "brcm,nsp-genpll";
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reg = <0x1800c140 0x24>;
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clocks = <&osc>;
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clock-output-names = "genpll", "phy", "ethernetclk",
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"usbclk", "iprocfast", "sata1",
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"sata2";
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};
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thermal: thermal@1800c2c0 {
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compatible = "brcm,ns-thermal";
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reg = <0x1800c2c0 0x10>;
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#thermal-sensor-cells = <0>;
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};
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srab: srab@18007000 {
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compatible = "brcm,bcm5301x-srab";
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reg = <0x18007000 0x1000>;
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