drm/bridge: tc358768: fix THS_ZEROCNT computation
[ Upstream commit77a089328d
] Correct computation of THS_ZEROCNT register. This register must be set to a value that ensure that THS_PREPARE + THS_ZERO > 145ns + 10*UI with the actual value of (THS_PREPARE + THS_ZERO) being ((1 to 2) + 1 + (TCLK_ZEROCNT + 1) + (3 to 4)) x ByteClk cycle + + HSByteClk x (2 + (1 to 2)) + (PHY delay) with PHY delay being about (8 + (5 to 6)) x MIPIBitClk cycle in the BitClk conversion. Fixes:ff1ca6397b
("drm/bridge: Add tc358768 driver") Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by: Robert Foss <rfoss@kernel.org> Signed-off-by: Robert Foss <rfoss@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230427142934.55435-7-francesco@dolcini.it Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
6b9450723b
commit
8e47328fe0
@ -744,9 +744,10 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge)
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/* 40ns + 4*UI < THS_PREPARE < 85ns + 6*UI */
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val = 50 + tc358768_to_ns(4 * ui_nsk);
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val = tc358768_ns_to_cnt(val, dsibclk_nsk) - 1;
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/* THS_ZERO > 145ns + 10*UI */
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val2 = tc358768_ns_to_cnt(145 - tc358768_to_ns(ui_nsk), dsibclk_nsk);
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val |= (val2 - tc358768_to_ns(phy_delay_nsk)) << 8;
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/* THS_PREPARE + THS_ZERO > 145ns + 10*UI */
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raw_val = tc358768_ns_to_cnt(145 - tc358768_to_ns(3 * ui_nsk), dsibclk_nsk) - 10;
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val2 = clamp(raw_val, 0, 127);
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val |= val2 << 8;
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dev_dbg(priv->dev, "THS_HEADERCNT: 0x%x\n", val);
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tc358768_write(priv, TC358768_THS_HEADERCNT, val);
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