Merge tag 'iommu-fixes-v6.6-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull iommu fixes from Joerg Roedel: - Arm SMMU fixes from Will Deacon: - Fix TLB range command encoding when TTL, Num and Scale are all zero - Fix soft lockup by limiting TLB invalidation ops issued by SVA - Fix clocks description for SDM630 platform in arm-smmu DT binding - Intel VT-d fix from Lu Baolu: - Fix a suspend/hibernation problem in iommu_suspend() - Mediatek driver: Fix page table sharing for addresses over 4GiB - Apple/Dart: DMA_FQ handling fix in attach_dev() * tag 'iommu-fixes-v6.6-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: iommu/vt-d: Avoid memory allocation in iommu_suspend() iommu/apple-dart: Handle DMA_FQ domains in attach_dev() iommu/mediatek: Fix share pgtable for iova over 4GB iommu/arm-smmu-v3: Fix soft lockup triggered by arm_smmu_mm_invalidate_range dt-bindings: arm-smmu: Fix SDM630 clocks description iommu/arm-smmu-v3: Avoid constructing invalid range commands
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@ -270,6 +270,7 @@ allOf:
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contains:
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enum:
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- qcom,msm8998-smmu-v2
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- qcom,sdm630-smmu-v2
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then:
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anyOf:
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- properties:
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@ -311,7 +312,6 @@ allOf:
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compatible:
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contains:
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enum:
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- qcom,sdm630-smmu-v2
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- qcom,sm6375-smmu-v2
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then:
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anyOf:
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@ -671,8 +671,7 @@ static int apple_dart_attach_dev(struct iommu_domain *domain,
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return ret;
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switch (domain->type) {
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case IOMMU_DOMAIN_DMA:
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case IOMMU_DOMAIN_UNMANAGED:
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default:
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ret = apple_dart_domain_add_streams(dart_domain, cfg);
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if (ret)
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return ret;
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@ -186,6 +186,15 @@ static void arm_smmu_free_shared_cd(struct arm_smmu_ctx_desc *cd)
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}
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}
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/*
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* Cloned from the MAX_TLBI_OPS in arch/arm64/include/asm/tlbflush.h, this
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* is used as a threshold to replace per-page TLBI commands to issue in the
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* command queue with an address-space TLBI command, when SMMU w/o a range
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* invalidation feature handles too many per-page TLBI commands, which will
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* otherwise result in a soft lockup.
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*/
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#define CMDQ_MAX_TLBI_OPS (1 << (PAGE_SHIFT - 3))
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static void arm_smmu_mm_arch_invalidate_secondary_tlbs(struct mmu_notifier *mn,
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struct mm_struct *mm,
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unsigned long start,
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@ -201,8 +210,13 @@ static void arm_smmu_mm_arch_invalidate_secondary_tlbs(struct mmu_notifier *mn,
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* range. So do a simple translation here by calculating size correctly.
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*/
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size = end - start;
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if (size == ULONG_MAX)
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size = 0;
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if (!(smmu_domain->smmu->features & ARM_SMMU_FEAT_RANGE_INV)) {
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if (size >= CMDQ_MAX_TLBI_OPS * PAGE_SIZE)
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size = 0;
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} else {
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if (size == ULONG_MAX)
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size = 0;
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}
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if (!(smmu_domain->smmu->features & ARM_SMMU_FEAT_BTM)) {
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if (!size)
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@ -1895,18 +1895,23 @@ static void __arm_smmu_tlb_inv_range(struct arm_smmu_cmdq_ent *cmd,
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/* Get the leaf page size */
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tg = __ffs(smmu_domain->domain.pgsize_bitmap);
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num_pages = size >> tg;
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/* Convert page size of 12,14,16 (log2) to 1,2,3 */
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cmd->tlbi.tg = (tg - 10) / 2;
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/*
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* Determine what level the granule is at. For non-leaf, io-pgtable
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* assumes .tlb_flush_walk can invalidate multiple levels at once,
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* so ignore the nominal last-level granule and leave TTL=0.
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* Determine what level the granule is at. For non-leaf, both
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* io-pgtable and SVA pass a nominal last-level granule because
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* they don't know what level(s) actually apply, so ignore that
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* and leave TTL=0. However for various errata reasons we still
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* want to use a range command, so avoid the SVA corner case
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* where both scale and num could be 0 as well.
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*/
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if (cmd->tlbi.leaf)
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cmd->tlbi.ttl = 4 - ((ilog2(granule) - 3) / (tg - 3));
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num_pages = size >> tg;
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else if ((num_pages & CMDQ_TLBI_RANGE_NUM_MAX) == 1)
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num_pages++;
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}
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cmds.num = 0;
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@ -2998,13 +2998,6 @@ static int iommu_suspend(void)
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struct intel_iommu *iommu = NULL;
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unsigned long flag;
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for_each_active_iommu(iommu, drhd) {
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iommu->iommu_state = kcalloc(MAX_SR_DMAR_REGS, sizeof(u32),
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GFP_KERNEL);
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if (!iommu->iommu_state)
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goto nomem;
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}
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iommu_flush_all();
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for_each_active_iommu(iommu, drhd) {
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@ -3024,12 +3017,6 @@ static int iommu_suspend(void)
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raw_spin_unlock_irqrestore(&iommu->register_lock, flag);
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}
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return 0;
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nomem:
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for_each_active_iommu(iommu, drhd)
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kfree(iommu->iommu_state);
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return -ENOMEM;
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}
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static void iommu_resume(void)
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@ -3061,9 +3048,6 @@ static void iommu_resume(void)
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raw_spin_unlock_irqrestore(&iommu->register_lock, flag);
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}
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for_each_active_iommu(iommu, drhd)
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kfree(iommu->iommu_state);
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}
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static struct syscore_ops iommu_syscore_ops = {
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@ -681,7 +681,7 @@ struct intel_iommu {
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struct iopf_queue *iopf_queue;
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unsigned char iopfq_name[16];
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struct q_inval *qi; /* Queued invalidation info */
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u32 *iommu_state; /* Store iommu states between suspend and resume.*/
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u32 iommu_state[MAX_SR_DMAR_REGS]; /* Store iommu states between suspend and resume.*/
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#ifdef CONFIG_IRQ_REMAP
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struct ir_table *ir_table; /* Interrupt remapping info */
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@ -262,7 +262,7 @@ struct mtk_iommu_data {
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struct device *smicomm_dev;
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struct mtk_iommu_bank_data *bank;
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struct mtk_iommu_domain *share_dom; /* For 2 HWs share pgtable */
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struct mtk_iommu_domain *share_dom;
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struct regmap *pericfg;
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struct mutex mutex; /* Protect m4u_group/m4u_dom above */
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@ -643,8 +643,8 @@ static int mtk_iommu_domain_finalise(struct mtk_iommu_domain *dom,
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struct mtk_iommu_domain *share_dom = data->share_dom;
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const struct mtk_iommu_iova_region *region;
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/* Always use share domain in sharing pgtable case */
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if (MTK_IOMMU_HAS_FLAG(data->plat_data, SHARE_PGTABLE) && share_dom) {
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/* Share pgtable when 2 MM IOMMU share the pgtable or one IOMMU use multiple iova ranges */
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if (share_dom) {
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dom->iop = share_dom->iop;
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dom->cfg = share_dom->cfg;
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dom->domain.pgsize_bitmap = share_dom->cfg.pgsize_bitmap;
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@ -677,8 +677,7 @@ static int mtk_iommu_domain_finalise(struct mtk_iommu_domain *dom,
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/* Update our support page sizes bitmap */
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dom->domain.pgsize_bitmap = dom->cfg.pgsize_bitmap;
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if (MTK_IOMMU_HAS_FLAG(data->plat_data, SHARE_PGTABLE))
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data->share_dom = dom;
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data->share_dom = dom;
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update_iova_region:
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/* Update the iova region for this domain */
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