New boards are the Geniatech XPI-3128 (RK3128), Sonoff iHost (rv1109)
One "new" soc is the rv1109 which is a two-core variant of the rv1126 and everything else is identical. Lots of love for the old rk3128 (power-domains, gpu, gmac, usb) and rv1126 (uart pins, i2c2 special case) and rework of aliases to have core busses that are hard-numbered in boards and documentation centrally in the dtsi, but the per board aliases in the boards (ethernet). Plus the rk3036 got a yaml hdmi binding which required some small fixes. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmV4xDMQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgSnyCACsbQ2cf1EQC1ubaM0YvLpRxd+XU/HP4M8N lwVy3FZxGqDfT/pHgoOo4QpIYLNO1C2xTj+HA97aepxplTXJw6hv8Sm3mqZKsLb9 vaDNAykwFtwlo7CK1/YQP8eX40u4RJWjv5QvB+dDD7CSXZrZAbja0PkzK8dOwXEy 3mMOU5vpR13At4r6+mxu2damfihXaTFaJKVY/2ugMSx9lY3yYJ3rYIhI21JyRhTF J6B/W/wJ1Q/FN8BZBv2FIxbwFifWI8P+EOz0riL1UOQCXSdnPJ+iPnNZ9wWUaLct CNV1l6qpJjPGu5XPmKB6nSSl1HUJuu4jnkATMKasdJkSIYZmc2vv =Ggu5 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWEYBQACgkQYKtH/8kJ UicGCw/+MJdg3/4IryF/VmUj4bmEyU84yoMC9ZY5RRkRcH7eHyv1IZa/P+b2L6WD 3iXQ3yWR54iKA0MdJJE3nRwlJbO3jntgjGOaWiqa40P8ntsRK0ijv6edtfvNkc2U 1alTDJh+S2LE+GvljkuhfnE49sfuGWJMYnxe8TgYF24UG0Zzj4aDyqQMGpKXvBRY Gey+xPV45xbL3PouS/eaMcfm/kL3g1XStEurbGTFvKkEjBcSEHF6L0sY/3PXdZ/h DtojGO0dd7os/Rfd4WIBVxZMqU/XZMiMPJC8MHrtfCri+F/KX3uYfisqUPPsmGlI xwbAnskadniGaeCtxRBqA0W1Aq1S6DuWdPQqzzdjPPj1CehFO8LBWRMjih7I70nK mZQfqArKbo+q0boomG7WGmbbA0ZB8MlROD6lCLbmNcjZ5zIcmbvdnbS9ClY5N+Qz rEva7C7Ugbkishuk1c22EhTgLdbLTUopBq0UBU7vr3hk/OdH8OdftY3NvJxN0dnV l5N0IArb5CqOYiP+1Zx7TuWHQBGYB8ANaih7ThqIFcVzBLjWH1QJygbJ1jPm5cUy K8uj06wnljWKtoT60H+9vlVKftyWvYWMQL5vRE+AUrxO86Dpg9PCSx7XX7t9hn02 xTBmiQ6sOl4ARGNN5iSN2+A68q1PqR/o/wMrPsrAXPyHWnJeSQw= =oQ0i -----END PGP SIGNATURE----- Merge tag 'v6.8-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt New boards are the Geniatech XPI-3128 (RK3128), Sonoff iHost (rv1109) One "new" soc is the rv1109 which is a two-core variant of the rv1126 and everything else is identical. Lots of love for the old rk3128 (power-domains, gpu, gmac, usb) and rv1126 (uart pins, i2c2 special case) and rework of aliases to have core busses that are hard-numbered in boards and documentation centrally in the dtsi, but the per board aliases in the boards (ethernet). Plus the rk3036 got a yaml hdmi binding which required some small fixes. * tag 'v6.8-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (24 commits) ARM: dts: rockchip: add hdmi-connector node to rk3036-kylin ARM: dts: rockchip: fix rk3036 hdmi ports node ARM: dts: rockchip: add gpio alias for gpio dt nodes ARM: dts: rockchip: Move uart aliases to SoC dtsi for RK3128 ARM: dts: rockchip: Move i2c aliases to SoC dtsi for RK3128 ARM: dts: rockchip: Move gpio aliases to SoC dtsi for RK3128 ARM: dts: rockchip: Add Sonoff iHost Smart Home Hub dt-bindings: arm: rockchip: Add Sonoff iHost ARM: dts: rockchip: Add rv1109 SoC ARM: dts: rockchip: Split up rgmii1 pinctrl on rv1126 ARM: dts: rockchip: Add i2c2 node to rv1126 ARM: dts: rockchip: Serial aliases for rv1126 ARM: dts: rockchip: Add alternate UART pins to rv1126 ARM: dts: rockchip: Enable GPU for XPI-3128 ARM: dts: rockchip: Add GPU node for RK3128 ARM: dts: rockchip: Add power-controller for RK3128 ARM: dts: rockchip: Enable gmac for XPI-3128 ARM: dts: rockchip: Add gmac node for RK3128 ARM: dts: rockchip: Make usbphy the parent of SCLK_USB480M for RK3128 ARM: dts: rockchip: Add dwc2 otg fifo siztes for RK3128 ... Link: https://lore.kernel.org/r/3197878.5fSG56mABF@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
965c83326e
@ -235,6 +235,11 @@ properties:
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- const: geekbuying,geekbox
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- const: rockchip,rk3368
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- description: Geniatech XPI-3128
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items:
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- const: geniatech,xpi-3128
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- const: rockchip,rk3128
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- description: Google Bob (Asus Chromebook Flip C101PA)
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items:
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- const: google,bob-rev13
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@ -928,6 +933,13 @@ properties:
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- const: rockchip,rk3568-bpi-r2pro
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- const: rockchip,rk3568
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- description: Sonoff iHost Smart Home Hub
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items:
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- const: itead,sonoff-ihost
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- enum:
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- rockchip,rv1126
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- rockchip,rv1109
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additionalProperties: true
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...
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@ -2,7 +2,9 @@
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dtb-$(CONFIG_ARCH_ROCKCHIP) += \
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rv1108-elgin-r1.dtb \
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rv1108-evb.dtb \
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rv1109-sonoff-ihost.dtb \
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rv1126-edgeble-neu2-io.dtb \
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rv1126-sonoff-ihost.dtb \
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rk3036-evb.dtb \
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rk3036-kylin.dtb \
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rk3066a-bqcurie2.dtb \
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@ -10,6 +12,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
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rk3066a-mk808.dtb \
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rk3066a-rayeager.dtb \
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rk3128-evb.dtb \
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rk3128-xpi-3128.dtb \
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rk3188-bqedison2qc.dtb \
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rk3188-px3-evb.dtb \
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rk3188-radxarock.dtb \
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@ -13,6 +13,17 @@
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reg = <0x60000000 0x20000000>;
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};
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hdmi_con: hdmi-con {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi_con_in: endpoint {
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remote-endpoint = <&hdmi_out_con>;
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};
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};
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};
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leds: gpio-leds {
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compatible = "gpio-leds";
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@ -110,6 +121,12 @@
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status = "okay";
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};
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&hdmi_out {
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hdmi_out_con: endpoint {
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remote-endpoint = <&hdmi_con_in>;
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};
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};
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&i2c1 {
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clock-frequency = <400000>;
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@ -17,6 +17,9 @@
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interrupt-parent = <&gic>;
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aliases {
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gpio0 = &gpio0;
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gpio1 = &gpio1;
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gpio2 = &gpio2;
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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@ -402,12 +405,20 @@
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pinctrl-0 = <&hdmi_ctl>;
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status = "disabled";
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hdmi_in: port {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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hdmi_in_vop: endpoint@0 {
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hdmi_in: port@0 {
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reg = <0>;
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remote-endpoint = <&vop_out_hdmi>;
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hdmi_in_vop: endpoint {
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remote-endpoint = <&vop_out_hdmi>;
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};
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};
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hdmi_out: port@1 {
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reg = <1>;
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};
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};
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};
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@ -13,6 +13,11 @@
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/ {
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compatible = "rockchip,rk3066a";
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aliases {
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gpio4 = &gpio4;
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gpio6 = &gpio6;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -12,11 +12,6 @@
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compatible = "rockchip,rk3128-evb", "rockchip,rk3128";
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aliases {
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gpio0 = &gpio0;
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gpio1 = &gpio1;
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gpio2 = &gpio2;
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gpio3 = &gpio3;
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i2c1 = &i2c1;
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mmc0 = &emmc;
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};
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425
arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts
Normal file
425
arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts
Normal file
@ -0,0 +1,425 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include "rk3128.dtsi"
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/ {
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model = "Geniatech XPI-3128";
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compatible = "geniatech,xpi-3128", "rockchip,rk3128";
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aliases {
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ethernet0 = &gmac;
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mmc0 = &emmc;
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mmc1 = &sdmmc;
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};
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memory@60000000 {
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device_type = "memory";
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reg = <0x60000000 0x40000000>;
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};
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chosen {
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stdout-path = &uart1;
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};
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adc-keys {
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compatible = "adc-keys";
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io-channels = <&saradc 1>;
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io-channel-names = "buttons";
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keyup-threshold-microvolt = <3300000>;
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button-recovery {
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label = "Recovery";
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linux,code = <KEY_VENDOR>;
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press-threshold-microvolt = <0>;
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};
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};
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dc_5v: dc-5v-regulator {
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compatible = "regulator-fixed";
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regulator-name = "DC_5V";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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};
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/*
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* This is a vbus-supply, which also supplies the GL852G usb hub,
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* thus has to be always-on
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*/
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host_pwr_5v: host-pwr-5v-regulator {
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compatible = "regulator-fixed";
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gpio = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <1500>;
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regulator-name = "HOST_PWR_5V";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&dc_5v>;
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pinctrl-names = "default";
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pinctrl-0 = <&host_drv>;
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enable-active-high;
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regulator-always-on;
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};
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ir-receiver {
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compatible = "gpio-ir-receiver";
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gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&ir_int>;
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};
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leds {
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compatible = "gpio-leds";
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led-power {
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gpios = <&gpio0 RK_PD2 GPIO_ACTIVE_HIGH>;
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_BLUE>;
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default-state = "on";
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pinctrl-names = "default";
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pinctrl-0 = <&power_led>;
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};
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led-spd {
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gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>;
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function = LED_FUNCTION_LAN;
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color = <LED_COLOR_ID_GREEN>;
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/*
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* currently not allowed to be set as per
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* https://www.kernel.org/doc/Documentation/devicetree/bindings/leds/common.yaml
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* and needs to set in userspace:
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*
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* linux,default-trigger = "netdev";
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*/
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pinctrl-names = "default";
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pinctrl-0 = <&spd_led>;
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};
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};
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mcu3v3: mcu3v3-regulator {
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compatible = "regulator-fixed";
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regulator-name = "MCU3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc_io>;
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regulator-always-on;
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regulator-boot-on;
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};
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vcc_ddr: vcc-ddr-regulator {
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compatible = "regulator-fixed";
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regulator-name = "VCC_DDR";
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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vin-supply = <&vcc_sys>;
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regulator-always-on;
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regulator-boot-on;
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};
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vcc_io: vcc-io-regulator {
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compatible = "regulator-fixed";
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regulator-name = "VCC_IO";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc_sys>;
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regulator-always-on;
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regulator-boot-on;
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};
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vcc_lan: vcc-lan-regulator {
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compatible = "regulator-fixed";
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regulator-name = "VCC_LAN";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc_io>;
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regulator-always-on;
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regulator-boot-on;
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};
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vcc_sd: vcc-sd-regulator {
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compatible = "regulator-fixed";
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gpio = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>;
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startup-delay-us = <500>;
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regulator-name = "VCC_SD";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc_io>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_pwren>;
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};
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vcc_sys: vcc-sys-regulator {
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compatible = "regulator-fixed";
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regulator-name = "VCC_SYS";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&dc_5v>;
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regulator-always-on;
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regulator-boot-on;
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};
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vcc33_hdmi: vcc33-hdmi-regulator {
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compatible = "regulator-fixed";
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regulator-name = "VCC33_HDMI";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcca_33>;
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regulator-always-on;
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regulator-boot-on;
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};
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vcca_33: vcca-33-regulator {
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compatible = "regulator-fixed";
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regulator-name = "VCCA_33";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc_sys>;
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regulator-always-on;
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regulator-boot-on;
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};
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vdd_11: vdd-11-regulator {
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compatible = "regulator-fixed";
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regulator-name = "VDD_11";
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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vin-supply = <&vcc_sys>;
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regulator-always-on;
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regulator-boot-on;
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};
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vdd11_hdmi: vdd11-hdmi-regulator {
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compatible = "regulator-fixed";
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regulator-name = "VDD11_HDMI";
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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vin-supply = <&vdd_11>;
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regulator-always-on;
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||||
regulator-boot-on;
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||||
};
|
||||
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vdd_arm: vdd-arm-regulator {
|
||||
compatible = "pwm-regulator";
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regulator-name = "VDD_ARM";
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||||
pwms = <&pwm1 0 25000 1>;
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||||
pwm-supply = <&vcc_sys>;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <1400000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
/*
|
||||
* As per schematics vdd_log is minimum 900 mV, maximum 1400 mV.
|
||||
* Since there are HW blocks in PD_LOGIC (which are all driven by
|
||||
* this supply), that either do not have a driver at all or the
|
||||
* driver does not implement regulator support we have to make
|
||||
* sure here that the voltage never drops below 1050 mV.
|
||||
*/
|
||||
vdd_log: vdd-log-regulator {
|
||||
compatible = "pwm-regulator";
|
||||
regulator-name = "VDD_LOG";
|
||||
pwms = <&pwm2 0 25000 1>;
|
||||
pwm-dutycycle-range = <30 100>;
|
||||
pwm-supply = <&vcc_sys>;
|
||||
regulator-min-microvolt = <1050000>;
|
||||
regulator-max-microvolt = <1400000>;
|
||||
regulator-ramp-delay = <4000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu-supply = <&vdd_arm>;
|
||||
};
|
||||
|
||||
&emmc {
|
||||
bus-width = <8>;
|
||||
vmmc-supply = <&vcc_io>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
|
||||
cap-mmc-highspeed;
|
||||
mmc-ddr-3_3v;
|
||||
no-sd;
|
||||
no-sdio;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gmac {
|
||||
clock_in_out = "output";
|
||||
phy-supply = <&vcc_lan>;
|
||||
phy-mode = "rmii";
|
||||
phy-handle = <&phy0>;
|
||||
assigned-clocks = <&cru SCLK_MAC_SRC>;
|
||||
assigned-clock-rates= <50000000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rmii_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio0 {
|
||||
gpio-line-names = /* GPIO0 A0-A7 */
|
||||
"", "", "HEADER_5", "HEADER_3",
|
||||
"", "", "", "",
|
||||
/* GPIO0 B0-B7 */
|
||||
"HEADER_22", "HEADER_23", "", "HEADER_19",
|
||||
"HEADER_26", "HEADER_21", "HEADER_24", "",
|
||||
/* GPIO0 C0-C7 */
|
||||
"", "HEADER_18", "", "",
|
||||
"", "", "", "",
|
||||
/* GPIO0 D0-D7 */
|
||||
"HEADER_36", "", "", "",
|
||||
"", "", "HEADER_13", "";
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
gpio-line-names = /* GPIO1 A0-A7 */
|
||||
"HEADER_7", "HEADER_35", "HEADER_33", "HEADER_37",
|
||||
"HEADER_40", "HEADER_38", "", "",
|
||||
/* GPIO1 B0-B7 */
|
||||
"HEADER_11", "", "", "HEADER_29",
|
||||
"HEADER_31", "", "", "",
|
||||
/* GPIO1 C0-C7 */
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
/* GPIO1 D0-D7 */
|
||||
"", "", "", "",
|
||||
"", "", "", "";
|
||||
};
|
||||
|
||||
&gpio2 {
|
||||
gpio-line-names = /* GPIO2 A0-A7 */
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
/* GPIO2 B0-B7 */
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
/* GPIO2 C0-C7 */
|
||||
"", "", "", "",
|
||||
"HEADER_27", "", "", "",
|
||||
/* GPIO2 D0-D7 */
|
||||
"", "", "HEADER_8", "HEADER_10",
|
||||
"", "", "", "";
|
||||
};
|
||||
|
||||
&gpio3 {
|
||||
gpio-line-names = /* GPIO3 A0-A7 */
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
/* GPIO3 B0-B7 */
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
/* GPIO3 C0-C7 */
|
||||
"", "HEADER_32", "", "",
|
||||
"", "", "", "HEADER_12",
|
||||
/* GPIO3 D0-D7 */
|
||||
"", "", "", "HEADER_15",
|
||||
"", "", "", "";
|
||||
};
|
||||
|
||||
&gpu {
|
||||
mali-supply = <&vdd_log>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mdio {
|
||||
phy0: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <1>;
|
||||
max-speed = <100>;
|
||||
/* T2.2.4 min. 1 us */
|
||||
reset-assert-us = <10>;
|
||||
/* T2.2.1 + T2.2.2 + T2.2.3 min. 6.05 us */
|
||||
reset-deassert-us = <20>;
|
||||
reset-gpios = <&gpio2 RK_PD0 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&dp83848c_rst>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
dp83848c {
|
||||
dp83848c_rst: dp83848c-rst {
|
||||
rockchip,pins = <2 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
ir-receiver {
|
||||
ir_int: ir-int {
|
||||
rockchip,pins = <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
power_led: power-led {
|
||||
rockchip,pins = <0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
spd_led: spd-led {
|
||||
rockchip,pins = <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
usb2 {
|
||||
host_drv: host-drv {
|
||||
rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pwm1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
vref-supply = <&vcc_io>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc {
|
||||
bus-width = <4>;
|
||||
vmmc-supply = <&vcc_sd>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>;
|
||||
disable-wp;
|
||||
cap-sd-highspeed;
|
||||
no-mmc;
|
||||
no-sdio;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host_ehci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_otg {
|
||||
vusb_a-supply = <&vcc_io>;
|
||||
vusb_d-supply = <&vdd_11>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy_host {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy_otg {
|
||||
status = "okay";
|
||||
};
|
||||
@ -8,6 +8,7 @@
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/pinctrl/rockchip.h>
|
||||
#include <dt-bindings/power/rk3128-power.h>
|
||||
|
||||
/ {
|
||||
compatible = "rockchip,rk3128";
|
||||
@ -15,6 +16,20 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
aliases {
|
||||
gpio0 = &gpio0;
|
||||
gpio1 = &gpio1;
|
||||
gpio2 = &gpio2;
|
||||
gpio3 = &gpio3;
|
||||
i2c0 = &i2c0;
|
||||
i2c1 = &i2c1;
|
||||
i2c2 = &i2c2;
|
||||
i2c3 = &i2c3;
|
||||
serial0 = &uart0;
|
||||
serial1 = &uart1;
|
||||
serial2 = &uart2;
|
||||
};
|
||||
|
||||
arm-pmu {
|
||||
compatible = "arm,cortex-a7-pmu";
|
||||
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
|
||||
@ -100,6 +115,27 @@
|
||||
};
|
||||
};
|
||||
|
||||
gpu_opp_table: opp-table-1 {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-200000000 {
|
||||
opp-hz = /bits/ 64 <200000000>;
|
||||
opp-microvolt = <975000 975000 1250000>;
|
||||
};
|
||||
opp-300000000 {
|
||||
opp-hz = /bits/ 64 <300000000>;
|
||||
opp-microvolt = <1050000 1050000 1250000>;
|
||||
};
|
||||
opp-400000000 {
|
||||
opp-hz = /bits/ 64 <400000000>;
|
||||
opp-microvolt = <1150000 1150000 1250000>;
|
||||
};
|
||||
opp-480000000 {
|
||||
opp-hz = /bits/ 64 <480000000>;
|
||||
opp-microvolt = <1250000 1250000 1250000>;
|
||||
};
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "arm,armv7-timer";
|
||||
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
|
||||
@ -130,9 +166,119 @@
|
||||
};
|
||||
};
|
||||
|
||||
gpu: gpu@10090000 {
|
||||
compatible = "rockchip,rk3128-mali", "arm,mali-400";
|
||||
reg = <0x10090000 0x10000>;
|
||||
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "gp",
|
||||
"gpmmu",
|
||||
"pp0",
|
||||
"ppmmu0",
|
||||
"pp1",
|
||||
"ppmmu1";
|
||||
clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>;
|
||||
clock-names = "bus", "core";
|
||||
operating-points-v2 = <&gpu_opp_table>;
|
||||
resets = <&cru SRST_GPU>;
|
||||
power-domains = <&power RK3128_PD_GPU>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pmu: syscon@100a0000 {
|
||||
compatible = "rockchip,rk3128-pmu", "syscon", "simple-mfd";
|
||||
reg = <0x100a0000 0x1000>;
|
||||
|
||||
power: power-controller {
|
||||
compatible = "rockchip,rk3128-power-controller";
|
||||
#power-domain-cells = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
power-domain@RK3128_PD_VIO {
|
||||
reg = <RK3128_PD_VIO>;
|
||||
clocks = <&cru ACLK_CIF>,
|
||||
<&cru HCLK_CIF>,
|
||||
<&cru DCLK_EBC>,
|
||||
<&cru HCLK_EBC>,
|
||||
<&cru ACLK_IEP>,
|
||||
<&cru HCLK_IEP>,
|
||||
<&cru ACLK_LCDC0>,
|
||||
<&cru HCLK_LCDC0>,
|
||||
<&cru PCLK_MIPI>,
|
||||
<&cru ACLK_RGA>,
|
||||
<&cru HCLK_RGA>,
|
||||
<&cru ACLK_VIO0>,
|
||||
<&cru ACLK_VIO1>,
|
||||
<&cru HCLK_VIO>,
|
||||
<&cru HCLK_VIO_H2P>,
|
||||
<&cru DCLK_VOP>,
|
||||
<&cru SCLK_VOP>;
|
||||
pm_qos = <&qos_ebc>,
|
||||
<&qos_iep>,
|
||||
<&qos_lcdc>,
|
||||
<&qos_rga>,
|
||||
<&qos_vip>;
|
||||
#power-domain-cells = <0>;
|
||||
};
|
||||
|
||||
power-domain@RK3128_PD_VIDEO {
|
||||
reg = <RK3128_PD_VIDEO>;
|
||||
clocks = <&cru ACLK_VDPU>,
|
||||
<&cru HCLK_VDPU>,
|
||||
<&cru ACLK_VEPU>,
|
||||
<&cru HCLK_VEPU>,
|
||||
<&cru SCLK_HEVC_CORE>;
|
||||
pm_qos = <&qos_vpu>;
|
||||
#power-domain-cells = <0>;
|
||||
};
|
||||
|
||||
power-domain@RK3128_PD_GPU {
|
||||
reg = <RK3128_PD_GPU>;
|
||||
clocks = <&cru ACLK_GPU>;
|
||||
pm_qos = <&qos_gpu>;
|
||||
#power-domain-cells = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
qos_gpu: qos@1012d000 {
|
||||
compatible = "rockchip,rk3128-qos", "syscon";
|
||||
reg = <0x1012d000 0x20>;
|
||||
};
|
||||
|
||||
qos_vpu: qos@1012e000 {
|
||||
compatible = "rockchip,rk3128-qos", "syscon";
|
||||
reg = <0x1012e000 0x20>;
|
||||
};
|
||||
|
||||
qos_rga: qos@1012f000 {
|
||||
compatible = "rockchip,rk3128-qos", "syscon";
|
||||
reg = <0x1012f000 0x20>;
|
||||
};
|
||||
|
||||
qos_ebc: qos@1012f080 {
|
||||
compatible = "rockchip,rk3128-qos", "syscon";
|
||||
reg = <0x1012f080 0x20>;
|
||||
};
|
||||
|
||||
qos_iep: qos@1012f100 {
|
||||
compatible = "rockchip,rk3128-qos", "syscon";
|
||||
reg = <0x1012f100 0x20>;
|
||||
};
|
||||
|
||||
qos_lcdc: qos@1012f180 {
|
||||
compatible = "rockchip,rk3128-qos", "syscon";
|
||||
reg = <0x1012f180 0x20>;
|
||||
};
|
||||
|
||||
qos_vip: qos@1012f200 {
|
||||
compatible = "rockchip,rk3128-qos", "syscon";
|
||||
reg = <0x1012f200 0x20>;
|
||||
};
|
||||
|
||||
gic: interrupt-controller@10139000 {
|
||||
@ -154,6 +300,9 @@
|
||||
clocks = <&cru HCLK_OTG>;
|
||||
clock-names = "otg";
|
||||
dr_mode = "otg";
|
||||
g-np-tx-fifo-size = <16>;
|
||||
g-rx-fifo-size = <280>;
|
||||
g-tx-fifo-size = <256 128 128 64 32 16>;
|
||||
phys = <&usb2phy_otg>;
|
||||
phy-names = "usb2-phy";
|
||||
status = "disabled";
|
||||
@ -163,6 +312,7 @@
|
||||
compatible = "generic-ehci";
|
||||
reg = <0x101c0000 0x20000>;
|
||||
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_HOST2>;
|
||||
phys = <&usb2phy_host>;
|
||||
phy-names = "usb";
|
||||
status = "disabled";
|
||||
@ -172,6 +322,7 @@
|
||||
compatible = "generic-ohci";
|
||||
reg = <0x101e0000 0x20000>;
|
||||
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_HOST2>;
|
||||
phys = <&usb2phy_host>;
|
||||
phy-names = "usb";
|
||||
status = "disabled";
|
||||
@ -261,6 +412,8 @@
|
||||
clocks = <&cru SCLK_OTGPHY0>;
|
||||
clock-names = "phyclk";
|
||||
clock-output-names = "usb480m_phy";
|
||||
assigned-clocks = <&cru SCLK_USB480M>;
|
||||
assigned-clock-parents = <&usb2phy>;
|
||||
#clock-cells = <0>;
|
||||
status = "disabled";
|
||||
|
||||
@ -518,6 +671,34 @@
|
||||
#dma-cells = <1>;
|
||||
};
|
||||
|
||||
gmac: ethernet@2008c000 {
|
||||
compatible = "rockchip,rk3128-gmac";
|
||||
reg = <0x2008c000 0x4000>;
|
||||
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "macirq", "eth_wake_irq";
|
||||
clocks = <&cru SCLK_MAC>,
|
||||
<&cru SCLK_MAC_RX>, <&cru SCLK_MAC_TX>,
|
||||
<&cru SCLK_MAC_REF>, <&cru SCLK_MAC_REFOUT>,
|
||||
<&cru ACLK_GMAC>, <&cru PCLK_GMAC>;
|
||||
clock-names = "stmmaceth",
|
||||
"mac_clk_rx", "mac_clk_tx",
|
||||
"clk_mac_ref", "clk_mac_refout",
|
||||
"aclk_mac", "pclk_mac";
|
||||
resets = <&cru SRST_GMAC>;
|
||||
reset-names = "stmmaceth";
|
||||
rockchip,grf = <&grf>;
|
||||
rx-fifo-depth = <4096>;
|
||||
tx-fifo-depth = <2048>;
|
||||
status = "disabled";
|
||||
|
||||
mdio: mdio {
|
||||
compatible = "snps,dwmac-mdio";
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl: pinctrl {
|
||||
compatible = "rockchip,rk3128-pinctrl";
|
||||
rockchip,grf = <&grf>;
|
||||
@ -843,6 +1024,10 @@
|
||||
rockchip,pins = <1 RK_PB7 1 &pcfg_pull_default>;
|
||||
};
|
||||
|
||||
sdmmc_det: sdmmc-det {
|
||||
rockchip,pins = <1 RK_PC1 1 &pcfg_pull_default>;
|
||||
};
|
||||
|
||||
sdmmc_wp: sdmmc-wp {
|
||||
rockchip,pins = <1 RK_PA7 1 &pcfg_pull_default>;
|
||||
};
|
||||
|
||||
@ -15,6 +15,10 @@
|
||||
interrupt-parent = <&gic>;
|
||||
|
||||
aliases {
|
||||
gpio0 = &gpio0;
|
||||
gpio1 = &gpio1;
|
||||
gpio2 = &gpio2;
|
||||
gpio3 = &gpio3;
|
||||
serial0 = &uart0;
|
||||
serial1 = &uart1;
|
||||
serial2 = &uart2;
|
||||
|
||||
@ -19,6 +19,15 @@
|
||||
|
||||
aliases {
|
||||
ethernet0 = &gmac;
|
||||
gpio0 = &gpio0;
|
||||
gpio1 = &gpio1;
|
||||
gpio2 = &gpio2;
|
||||
gpio3 = &gpio3;
|
||||
gpio4 = &gpio4;
|
||||
gpio5 = &gpio5;
|
||||
gpio6 = &gpio6;
|
||||
gpio7 = &gpio7;
|
||||
gpio8 = &gpio8;
|
||||
i2c0 = &i2c0;
|
||||
i2c1 = &i2c1;
|
||||
i2c2 = &i2c2;
|
||||
|
||||
@ -16,6 +16,10 @@
|
||||
|
||||
aliases {
|
||||
ethernet0 = &emac;
|
||||
gpio0 = &gpio0;
|
||||
gpio1 = &gpio1;
|
||||
gpio2 = &gpio2;
|
||||
gpio3 = &gpio3;
|
||||
i2c0 = &i2c0;
|
||||
i2c1 = &i2c1;
|
||||
i2c2 = &i2c2;
|
||||
|
||||
21
arch/arm/boot/dts/rockchip/rv1109-sonoff-ihost.dts
Normal file
21
arch/arm/boot/dts/rockchip/rv1109-sonoff-ihost.dts
Normal file
@ -0,0 +1,21 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "rv1109.dtsi"
|
||||
#include "rv1126-sonoff-ihost.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Sonoff iHost 2G";
|
||||
compatible = "itead,sonoff-ihost", "rockchip,rv1109";
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu-supply = <&vdd_arm>;
|
||||
};
|
||||
|
||||
&cpu1 {
|
||||
cpu-supply = <&vdd_arm>;
|
||||
};
|
||||
23
arch/arm/boot/dts/rockchip/rv1109.dtsi
Normal file
23
arch/arm/boot/dts/rockchip/rv1109.dtsi
Normal file
@ -0,0 +1,23 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rv1126.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "rockchip,rv1109";
|
||||
|
||||
cpus {
|
||||
/delete-node/ cpu@f02;
|
||||
/delete-node/ cpu@f03;
|
||||
};
|
||||
|
||||
arm-pmu {
|
||||
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-affinity = <&cpu0>, <&cpu1>;
|
||||
};
|
||||
};
|
||||
@ -61,7 +61,7 @@
|
||||
phy-mode = "rgmii";
|
||||
phy-supply = <&vcc_3v3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rgmiim1_pins &clk_out_ethernetm1_pins>;
|
||||
pinctrl-0 = <&rgmiim1_miim &rgmiim1_bus2 &rgmiim1_bus4 &clk_out_ethernetm1_pins>;
|
||||
tx_delay = <0x2a>;
|
||||
rx_delay = <0x1a>;
|
||||
status = "okay";
|
||||
|
||||
@ -87,6 +87,16 @@
|
||||
<0 RK_PB5 1 &pcfg_pull_none_drv_level_0_smt>;
|
||||
};
|
||||
};
|
||||
i2c2 {
|
||||
/omit-if-no-ref/
|
||||
i2c2_xfer: i2c2-xfer {
|
||||
rockchip,pins =
|
||||
/* i2c2_scl */
|
||||
<0 RK_PC2 1 &pcfg_pull_none_drv_level_0_smt>,
|
||||
/* i2c2_sda */
|
||||
<0 RK_PC3 1 &pcfg_pull_none_drv_level_0_smt>;
|
||||
};
|
||||
};
|
||||
pwm2 {
|
||||
/omit-if-no-ref/
|
||||
pwm2m0_pins: pwm2m0-pins {
|
||||
@ -105,36 +115,56 @@
|
||||
};
|
||||
rgmii {
|
||||
/omit-if-no-ref/
|
||||
rgmiim1_pins: rgmiim1-pins {
|
||||
rgmiim1_miim: rgmiim1-miim {
|
||||
rockchip,pins =
|
||||
/* rgmii_mdc_m1 */
|
||||
<2 RK_PC2 2 &pcfg_pull_none>,
|
||||
/* rgmii_mdio_m1 */
|
||||
<2 RK_PC1 2 &pcfg_pull_none>,
|
||||
/* rgmii_rxclk_m1 */
|
||||
<2 RK_PD3 2 &pcfg_pull_none>,
|
||||
<2 RK_PC1 2 &pcfg_pull_none>;
|
||||
};
|
||||
/omit-if-no-ref/
|
||||
rgmiim1_rxer: rgmiim1-rxer {
|
||||
rockchip,pins =
|
||||
/* rgmii_rxer_m1 */
|
||||
<2 RK_PC0 2 &pcfg_pull_none>;
|
||||
};
|
||||
/omit-if-no-ref/
|
||||
rgmiim1_bus2: rgmiim1-bus2 {
|
||||
rockchip,pins =
|
||||
/* rgmii_rxd0_m1 */
|
||||
<2 RK_PB5 2 &pcfg_pull_none>,
|
||||
/* rgmii_rxd1_m1 */
|
||||
<2 RK_PB6 2 &pcfg_pull_none>,
|
||||
/* rgmii_rxd2_m1 */
|
||||
<2 RK_PC7 2 &pcfg_pull_none>,
|
||||
/* rgmii_rxd3_m1 */
|
||||
<2 RK_PD0 2 &pcfg_pull_none>,
|
||||
/* rgmii_rxdv_m1 */
|
||||
<2 RK_PB4 2 &pcfg_pull_none>,
|
||||
/* rgmii_txclk_m1 */
|
||||
<2 RK_PD2 2 &pcfg_pull_none_drv_level_3>,
|
||||
/* rgmii_txd0_m1 */
|
||||
<2 RK_PC3 2 &pcfg_pull_none_drv_level_3>,
|
||||
/* rgmii_txd1_m1 */
|
||||
<2 RK_PC4 2 &pcfg_pull_none_drv_level_3>,
|
||||
/* rgmii_txen_m1 */
|
||||
<2 RK_PC6 2 &pcfg_pull_none_drv_level_3>;
|
||||
};
|
||||
/omit-if-no-ref/
|
||||
rgmiim1_bus4: rgmiim1-bus4 {
|
||||
rockchip,pins =
|
||||
/* rgmii_rxclk_m1 */
|
||||
<2 RK_PD3 2 &pcfg_pull_none>,
|
||||
/* rgmii_rxd2_m1 */
|
||||
<2 RK_PC7 2 &pcfg_pull_none>,
|
||||
/* rgmii_rxd3_m1 */
|
||||
<2 RK_PD0 2 &pcfg_pull_none>,
|
||||
/* rgmii_txclk_m1 */
|
||||
<2 RK_PD2 2 &pcfg_pull_none_drv_level_3>,
|
||||
/* rgmii_txd2_m1 */
|
||||
<2 RK_PD1 2 &pcfg_pull_none_drv_level_3>,
|
||||
/* rgmii_txd3_m1 */
|
||||
<2 RK_PA4 2 &pcfg_pull_none_drv_level_3>,
|
||||
/* rgmii_txen_m1 */
|
||||
<2 RK_PC6 2 &pcfg_pull_none_drv_level_3>;
|
||||
<2 RK_PA4 2 &pcfg_pull_none_drv_level_3>;
|
||||
};
|
||||
/omit-if-no-ref/
|
||||
rgmiim1_mclkinout: rgmiim1-mclkinout {
|
||||
rockchip,pins =
|
||||
/* rgmii_clk_m1 */
|
||||
<2 RK_PB7 2 &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
sdmmc0 {
|
||||
@ -263,6 +293,14 @@
|
||||
/* uart3_tx_m0 */
|
||||
<3 RK_PC6 4 &pcfg_pull_up>;
|
||||
};
|
||||
/omit-if-no-ref/
|
||||
uart3m2_xfer: uart3m2-xfer {
|
||||
rockchip,pins =
|
||||
/* uart3_rx_m2 */
|
||||
<3 RK_PA1 4 &pcfg_pull_up>,
|
||||
/* uart3_tx_m2 */
|
||||
<3 RK_PA0 4 &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
uart4 {
|
||||
/omit-if-no-ref/
|
||||
@ -273,6 +311,14 @@
|
||||
/* uart4_tx_m0 */
|
||||
<3 RK_PA4 4 &pcfg_pull_up>;
|
||||
};
|
||||
/omit-if-no-ref/
|
||||
uart4m2_xfer: uart4m2-xfer {
|
||||
rockchip,pins =
|
||||
/* uart4_rx_m2 */
|
||||
<1 RK_PD4 3 &pcfg_pull_up>,
|
||||
/* uart4_tx_m2 */
|
||||
<1 RK_PD5 3 &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
uart5 {
|
||||
/omit-if-no-ref/
|
||||
|
||||
29
arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dts
Normal file
29
arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dts
Normal file
@ -0,0 +1,29 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "rv1126.dtsi"
|
||||
#include "rv1126-sonoff-ihost.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Sonoff iHost 4G";
|
||||
compatible = "itead,sonoff-ihost", "rockchip,rv1126";
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu-supply = <&vdd_arm>;
|
||||
};
|
||||
|
||||
&cpu1 {
|
||||
cpu-supply = <&vdd_arm>;
|
||||
};
|
||||
|
||||
&cpu2 {
|
||||
cpu-supply = <&vdd_arm>;
|
||||
};
|
||||
|
||||
&cpu3 {
|
||||
cpu-supply = <&vdd_arm>;
|
||||
};
|
||||
404
arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dtsi
Normal file
404
arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dtsi
Normal file
@ -0,0 +1,404 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
|
||||
* Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
|
||||
*/
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
ethernet0 = &gmac;
|
||||
mmc0 = &emmc;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial2:1500000n8";
|
||||
};
|
||||
|
||||
vcc5v0_sys: regulator-vcc5v0-sys {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc5v0_sys";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
sdio_pwrseq: pwrseq-sdio {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
clocks = <&rk809 1>;
|
||||
clock-names = "ext_clock";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wifi_enable_h>;
|
||||
reset-gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&emmc {
|
||||
bus-width = <8>;
|
||||
cap-mmc-highspeed;
|
||||
mmc-hs200-1_8v;
|
||||
non-removable;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_rstnout>;
|
||||
rockchip,default-sample-phase = <90>;
|
||||
vmmc-supply = <&vcc_3v3>;
|
||||
vqmmc-supply = <&vcc_1v8>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
clock-frequency = <400000>;
|
||||
status = "okay";
|
||||
|
||||
rk809: pmic@20 {
|
||||
compatible = "rockchip,rk809";
|
||||
reg = <0x20>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <RK_PB1 IRQ_TYPE_LEVEL_LOW>;
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "rk808-clkout1", "rk808-clkout2";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmic_int_l>;
|
||||
rockchip,system-power-controller;
|
||||
wakeup-source;
|
||||
|
||||
vcc1-supply = <&vcc5v0_sys>;
|
||||
vcc2-supply = <&vcc5v0_sys>;
|
||||
vcc3-supply = <&vcc5v0_sys>;
|
||||
vcc4-supply = <&vcc5v0_sys>;
|
||||
vcc5-supply = <&vcc_buck5>;
|
||||
vcc6-supply = <&vcc_buck5>;
|
||||
vcc7-supply = <&vcc5v0_sys>;
|
||||
vcc8-supply = <&vcc3v3_sys>;
|
||||
vcc9-supply = <&vcc5v0_sys>;
|
||||
|
||||
regulators {
|
||||
vdd_npu_vepu: DCDC_REG1 {
|
||||
regulator-name = "vdd_npu_vepu";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-min-microvolt = <650000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-ramp-delay = <6001>;
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_arm: DCDC_REG2 {
|
||||
regulator-name = "vdd_arm";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-min-microvolt = <725000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-ramp-delay = <6001>;
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_ddr: DCDC_REG3 {
|
||||
regulator-name = "vcc_ddr";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc3v3_sys: DCDC_REG4 {
|
||||
regulator-name = "vcc3v3_sys";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_buck5: DCDC_REG5 {
|
||||
regulator-name = "vcc_buck5";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <2200000>;
|
||||
regulator-max-microvolt = <2200000>;
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <2200000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_0v8: LDO_REG1 {
|
||||
regulator-name = "vcc_0v8";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <800000>;
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc1v8_pmu: LDO_REG2 {
|
||||
regulator-name = "vcc1v8_pmu";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
vdd0v8_pmu: LDO_REG3 {
|
||||
regulator-name = "vcc0v8_pmu";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <800000>;
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <800000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_1v8: LDO_REG4 {
|
||||
regulator-name = "vcc_1v8";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_dovdd: LDO_REG5 {
|
||||
regulator-name = "vcc_dovdd";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_dvdd: LDO_REG6 {
|
||||
regulator-name = "vcc_dvdd";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_avdd: LDO_REG7 {
|
||||
regulator-name = "vcc_avdd";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vccio_sd: LDO_REG8 {
|
||||
regulator-name = "vccio_sd";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc3v3_sd: LDO_REG9 {
|
||||
regulator-name = "vcc3v3_sd";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_5v0: SWITCH_REG1 {
|
||||
regulator-name = "vcc_5v0";
|
||||
};
|
||||
|
||||
vcc_3v3: SWITCH_REG2 {
|
||||
regulator-name = "vcc_3v3";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
|
||||
pcf8563: rtc@51 {
|
||||
compatible = "nxp,pcf8563";
|
||||
reg = <0x51>;
|
||||
#clock-cells = <0>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
|
||||
clock-output-names = "xin32k";
|
||||
};
|
||||
};
|
||||
|
||||
&gmac {
|
||||
assigned-clocks = <&cru CLK_GMAC_SRC_M1>, <&cru CLK_GMAC_SRC>,
|
||||
<&cru CLK_GMAC_TX_RX>;
|
||||
assigned-clock-parents = <&cru CLK_GMAC_RGMII_M1>, <&cru CLK_GMAC_SRC_M1>,
|
||||
<&cru RMII_MODE_CLK>;
|
||||
assigned-clock-rates = <0>, <50000000>;
|
||||
clock_in_out = "output";
|
||||
phy-handle = <&phy>;
|
||||
phy-mode = "rmii";
|
||||
phy-supply = <&vcc_3v3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rgmiim1_miim &rgmiim1_rxer &rgmiim1_bus2 &rgmiim1_mclkinout>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mdio {
|
||||
phy: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <ð_phy_rst>;
|
||||
reset-active-low;
|
||||
reset-assert-us = <50000>;
|
||||
reset-deassert-us = <10000>;
|
||||
reset-gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
ethernet {
|
||||
eth_phy_rst: eth-phy-rst {
|
||||
rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
};
|
||||
};
|
||||
bt {
|
||||
bt_enable: bt-enable {
|
||||
rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
bt_wake_dev: bt-wake-dev {
|
||||
rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
bt_wake_host: bt-wake-host {
|
||||
rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
pmic {
|
||||
pmic_int_l: pmic-int-l {
|
||||
rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
wifi {
|
||||
wifi_enable_h: wifi-enable-h {
|
||||
rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pmu_io_domains {
|
||||
pmuio0-supply = <&vcc1v8_pmu>;
|
||||
pmuio1-supply = <&vcc3v3_sys>;
|
||||
vccio1-supply = <&vcc_1v8>;
|
||||
vccio2-supply = <&vccio_sd>;
|
||||
vccio3-supply = <&vcc_1v8>;
|
||||
vccio4-supply = <&vcc_dovdd>;
|
||||
vccio5-supply = <&vcc_1v8>;
|
||||
vccio6-supply = <&vcc_1v8>;
|
||||
vccio7-supply = <&vcc_dovdd>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
vref-supply = <&vcc_1v8>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdio {
|
||||
bus-width = <4>;
|
||||
cap-sd-highspeed;
|
||||
cap-sdio-irq;
|
||||
keep-power-in-suspend;
|
||||
max-frequency = <100000000>;
|
||||
mmc-pwrseq = <&sdio_pwrseq>;
|
||||
non-removable;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc1_clk &sdmmc1_cmd &sdmmc1_bus4>;
|
||||
rockchip,default-sample-phase = <90>;
|
||||
sd-uhs-sdr104;
|
||||
vmmc-supply = <&vcc3v3_sys>;
|
||||
vqmmc-supply = <&vcc_1v8>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc {
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
card-detect-delay = <200>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_bus4 &sdmmc0_det>;
|
||||
rockchip,default-sample-phase = <90>;
|
||||
sd-uhs-sdr12;
|
||||
sd-uhs-sdr25;
|
||||
sd-uhs-sdr104;
|
||||
vqmmc-supply = <&vccio_sd>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_xfer &uart0_ctsn &uart0_rtsn>;
|
||||
uart-has-rtscts;
|
||||
status = "okay";
|
||||
|
||||
bluetooth {
|
||||
compatible = "realtek,rtl8723ds-bt";
|
||||
device-wake-gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>; /* BT_WAKE */
|
||||
enable-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; /* BT_RST */
|
||||
host-wake-gpios = <&gpio1 RK_PC5 GPIO_ACTIVE_HIGH>; /* BT_WAKE_HOST */
|
||||
max-speed = <2000000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&bt_enable>, <&bt_wake_dev>, <&bt_wake_host>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3m2_xfer>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart4m2_xfer>;
|
||||
status = "okay";
|
||||
};
|
||||
@ -21,6 +21,13 @@
|
||||
|
||||
aliases {
|
||||
i2c0 = &i2c0;
|
||||
i2c2 = &i2c2;
|
||||
serial0 = &uart0;
|
||||
serial1 = &uart1;
|
||||
serial2 = &uart2;
|
||||
serial3 = &uart3;
|
||||
serial4 = &uart4;
|
||||
serial5 = &uart5;
|
||||
};
|
||||
|
||||
cpus {
|
||||
@ -231,6 +238,20 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c2: i2c@ff400000 {
|
||||
compatible = "rockchip,rv1126-i2c", "rockchip,rk3399-i2c";
|
||||
reg = <0xff400000 0x1000>;
|
||||
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
|
||||
rockchip,grf = <&pmugrf>;
|
||||
clocks = <&pmucru CLK_I2C2>, <&pmucru PCLK_I2C2>;
|
||||
clock-names = "i2c", "pclk";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_xfer>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: serial@ff410000 {
|
||||
compatible = "rockchip,rv1126-uart", "snps,dw-apb-uart";
|
||||
reg = <0xff410000 0x100>;
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user