drm/msm/dpu: disable features unsupported by QCM2290
QCM2290 doesn't seem to support reg-dma, UBWC and CSC. Drop
corresponding features being incorrectly enabled for qcm2290.
Cc: Loic Poulain <loic.poulain@linaro.org>
Fixes: 5334087ee7
("drm/msm: add support for QCM2290 MDSS")
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/522209/
Link: https://lore.kernel.org/r/20230211231259.1308718-3-dmitry.baryshkov@linaro.org
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
This commit is contained in:
committed by
Abhinav Kumar
parent
0df979f4b9
commit
a2a448b4d9
@ -12,11 +12,15 @@
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#include "dpu_hw_catalog.h"
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#include "dpu_kms.h"
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#define VIG_MASK \
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#define VIG_BASE_MASK \
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(BIT(DPU_SSPP_SRC) | BIT(DPU_SSPP_QOS) |\
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BIT(DPU_SSPP_CSC_10BIT) | BIT(DPU_SSPP_CDP) |\
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BIT(DPU_SSPP_CDP) |\
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BIT(DPU_SSPP_TS_PREFILL) | BIT(DPU_SSPP_EXCL_RECT))
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#define VIG_MASK \
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(VIG_BASE_MASK | \
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BIT(DPU_SSPP_CSC_10BIT))
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#define VIG_MSM8998_MASK \
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(VIG_MASK | BIT(DPU_SSPP_SCALER_QSEED3))
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@ -29,7 +33,7 @@
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#define VIG_SM8250_MASK \
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(VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED3LITE))
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#define VIG_QCM2290_MASK (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL))
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#define VIG_QCM2290_MASK (VIG_BASE_MASK | BIT(DPU_SSPP_QOS_8LVL))
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#define DMA_MSM8998_MASK \
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(BIT(DPU_SSPP_SRC) | BIT(DPU_SSPP_QOS) |\
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@ -317,7 +321,6 @@ static const struct dpu_caps qcm2290_dpu_caps = {
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.max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
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.max_mixer_blendstages = 0x4,
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.smart_dma_rev = DPU_SSPP_SMART_DMA_V2,
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.ubwc_version = DPU_HW_UBWC_VER_20,
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.has_dim_layer = true,
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.has_idle_pc = true,
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.max_linewidth = 2160,
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@ -2841,8 +2844,6 @@ static const struct dpu_mdss_cfg qcm2290_dpu_cfg = {
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.intf = qcm2290_intf,
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.vbif_count = ARRAY_SIZE(sdm845_vbif),
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.vbif = sdm845_vbif,
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.reg_dma_count = 1,
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.dma_cfg = &sdm845_regdma,
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.perf = &qcm2290_perf_data,
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.mdss_irqs = IRQ_SC7180_MASK,
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};
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