drm/i915/xelpmp: Add multicast steering for media GT
MTL's media IP (Xe_LPM+) only has a single type of steering ("OAADDRM") which selects between media slice 0 and media slice 1. We'll always steer to media slice 0 unless it is fused off (which is the case when VD0, VE0, and SFC0 are all reported as unavailable). Bspec: 67789 Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221014230239.1023689-15-matthew.d.roper@intel.com
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@ -42,6 +42,7 @@ static const char * const intel_steering_types[] = {
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"LNCF",
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"GAM",
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"DSS",
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"OADDRM",
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"INSTANCE 0",
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};
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@ -129,6 +130,11 @@ static const struct intel_mmio_range xelpg_dss_steering_table[] = {
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{ 0x00DE80, 0x00E8FF }, /* DSS (0xE000-0xE0FF reserved) */
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};
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static const struct intel_mmio_range xelpmp_oaddrm_steering_table[] = {
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{ 0x393200, 0x39323F },
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{ 0x393400, 0x3934FF },
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};
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void intel_gt_mcr_init(struct intel_gt *gt)
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{
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struct drm_i915_private *i915 = gt->i915;
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@ -151,8 +157,9 @@ void intel_gt_mcr_init(struct intel_gt *gt)
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drm_warn(&i915->drm, "mslice mask all zero!\n");
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}
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if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70) &&
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gt->type == GT_PRIMARY) {
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if (MEDIA_VER(i915) >= 13 && gt->type == GT_MEDIA) {
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gt->steering_table[OADDRM] = xelpmp_oaddrm_steering_table;
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} else if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70)) {
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fuse = REG_FIELD_GET(GT_L3_EXC_MASK,
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intel_uncore_read(gt->uncore, XEHP_FUSE4));
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@ -514,6 +521,13 @@ static void get_nonterminated_steering(struct intel_gt *gt,
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*group = 0;
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*instance = 0;
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break;
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case OADDRM:
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if ((VDBOX_MASK(gt) | VEBOX_MASK(gt) | gt->info.sfc_mask) & BIT(0))
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*group = 0;
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else
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*group = 1;
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*instance = 0;
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break;
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default:
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MISSING_CASE(type);
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*group = 0;
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@ -61,6 +61,7 @@ enum intel_steering_type {
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LNCF,
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GAM,
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DSS,
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OADDRM,
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/*
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* On some platforms there are multiple types of MCR registers that
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@ -1598,14 +1598,27 @@ xelpg_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
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debug_dump_steering(gt);
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}
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static void
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xelpmp_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
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{
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/* FIXME: Actual workarounds will be added in future patch(es) */
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debug_dump_steering(gt);
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}
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static void
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gt_init_workarounds(struct intel_gt *gt, struct i915_wa_list *wal)
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{
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struct drm_i915_private *i915 = gt->i915;
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/* FIXME: Media GT handling will be added in an upcoming patch */
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if (gt->type == GT_MEDIA)
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if (gt->type == GT_MEDIA) {
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if (MEDIA_VER(i915) >= 13)
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xelpmp_gt_workarounds_init(gt, wal);
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else
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MISSING_CASE(MEDIA_VER(i915));
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return;
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}
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if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70))
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xelpg_gt_workarounds_init(gt, wal);
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