riscv: cpu: Add 64bit hartid support on RV64
The hartid can be a 64bit value on RV64 platforms. Add support for 64bit hartid in riscv_of_processor_hartid() and update its callers. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Link: https://lore.kernel.org/r/20220527051743.2829940-5-sunilvl@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
parent
62750eae41
commit
ad635e723e
@ -79,8 +79,8 @@ static inline void wait_for_interrupt(void)
|
|||||||
}
|
}
|
||||||
|
|
||||||
struct device_node;
|
struct device_node;
|
||||||
int riscv_of_processor_hartid(struct device_node *node);
|
int riscv_of_processor_hartid(struct device_node *node, unsigned long *hartid);
|
||||||
int riscv_of_parent_hartid(struct device_node *node);
|
int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid);
|
||||||
|
|
||||||
extern void riscv_fill_hwcap(void);
|
extern void riscv_fill_hwcap(void);
|
||||||
extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);
|
extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);
|
||||||
|
@ -14,37 +14,36 @@
|
|||||||
* Returns the hart ID of the given device tree node, or -ENODEV if the node
|
* Returns the hart ID of the given device tree node, or -ENODEV if the node
|
||||||
* isn't an enabled and valid RISC-V hart node.
|
* isn't an enabled and valid RISC-V hart node.
|
||||||
*/
|
*/
|
||||||
int riscv_of_processor_hartid(struct device_node *node)
|
int riscv_of_processor_hartid(struct device_node *node, unsigned long *hart)
|
||||||
{
|
{
|
||||||
const char *isa;
|
const char *isa;
|
||||||
u32 hart;
|
|
||||||
|
|
||||||
if (!of_device_is_compatible(node, "riscv")) {
|
if (!of_device_is_compatible(node, "riscv")) {
|
||||||
pr_warn("Found incompatible CPU\n");
|
pr_warn("Found incompatible CPU\n");
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
}
|
}
|
||||||
|
|
||||||
hart = of_get_cpu_hwid(node, 0);
|
*hart = (unsigned long) of_get_cpu_hwid(node, 0);
|
||||||
if (hart == ~0U) {
|
if (*hart == ~0UL) {
|
||||||
pr_warn("Found CPU without hart ID\n");
|
pr_warn("Found CPU without hart ID\n");
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!of_device_is_available(node)) {
|
if (!of_device_is_available(node)) {
|
||||||
pr_info("CPU with hartid=%d is not available\n", hart);
|
pr_info("CPU with hartid=%lu is not available\n", *hart);
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (of_property_read_string(node, "riscv,isa", &isa)) {
|
if (of_property_read_string(node, "riscv,isa", &isa)) {
|
||||||
pr_warn("CPU with hartid=%d has no \"riscv,isa\" property\n", hart);
|
pr_warn("CPU with hartid=%lu has no \"riscv,isa\" property\n", *hart);
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
}
|
}
|
||||||
if (isa[0] != 'r' || isa[1] != 'v') {
|
if (isa[0] != 'r' || isa[1] != 'v') {
|
||||||
pr_warn("CPU with hartid=%d has an invalid ISA of \"%s\"\n", hart, isa);
|
pr_warn("CPU with hartid=%lu has an invalid ISA of \"%s\"\n", *hart, isa);
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
}
|
}
|
||||||
|
|
||||||
return hart;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
@ -53,11 +52,16 @@ int riscv_of_processor_hartid(struct device_node *node)
|
|||||||
* To achieve this, we walk up the DT tree until we find an active
|
* To achieve this, we walk up the DT tree until we find an active
|
||||||
* RISC-V core (HART) node and extract the cpuid from it.
|
* RISC-V core (HART) node and extract the cpuid from it.
|
||||||
*/
|
*/
|
||||||
int riscv_of_parent_hartid(struct device_node *node)
|
int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid)
|
||||||
{
|
{
|
||||||
|
int rc;
|
||||||
|
|
||||||
for (; node; node = node->parent) {
|
for (; node; node = node->parent) {
|
||||||
if (of_device_is_compatible(node, "riscv"))
|
if (of_device_is_compatible(node, "riscv")) {
|
||||||
return riscv_of_processor_hartid(node);
|
rc = riscv_of_processor_hartid(node, hartid);
|
||||||
|
if (!rc)
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
return -1;
|
return -1;
|
||||||
|
@ -73,8 +73,9 @@ void __init riscv_fill_hwcap(void)
|
|||||||
struct device_node *node;
|
struct device_node *node;
|
||||||
const char *isa;
|
const char *isa;
|
||||||
char print_str[NUM_ALPHA_EXTS + 1];
|
char print_str[NUM_ALPHA_EXTS + 1];
|
||||||
int i, j;
|
int i, j, rc;
|
||||||
static unsigned long isa2hwcap[256] = {0};
|
static unsigned long isa2hwcap[256] = {0};
|
||||||
|
unsigned long hartid;
|
||||||
|
|
||||||
isa2hwcap['i'] = isa2hwcap['I'] = COMPAT_HWCAP_ISA_I;
|
isa2hwcap['i'] = isa2hwcap['I'] = COMPAT_HWCAP_ISA_I;
|
||||||
isa2hwcap['m'] = isa2hwcap['M'] = COMPAT_HWCAP_ISA_M;
|
isa2hwcap['m'] = isa2hwcap['M'] = COMPAT_HWCAP_ISA_M;
|
||||||
@ -92,7 +93,8 @@ void __init riscv_fill_hwcap(void)
|
|||||||
DECLARE_BITMAP(this_isa, RISCV_ISA_EXT_MAX);
|
DECLARE_BITMAP(this_isa, RISCV_ISA_EXT_MAX);
|
||||||
const char *temp;
|
const char *temp;
|
||||||
|
|
||||||
if (riscv_of_processor_hartid(node) < 0)
|
rc = riscv_of_processor_hartid(node, &hartid);
|
||||||
|
if (rc < 0)
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
if (of_property_read_string(node, "riscv,isa", &isa)) {
|
if (of_property_read_string(node, "riscv,isa", &isa)) {
|
||||||
|
@ -72,15 +72,16 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
|
|||||||
void __init setup_smp(void)
|
void __init setup_smp(void)
|
||||||
{
|
{
|
||||||
struct device_node *dn;
|
struct device_node *dn;
|
||||||
int hart;
|
unsigned long hart;
|
||||||
bool found_boot_cpu = false;
|
bool found_boot_cpu = false;
|
||||||
int cpuid = 1;
|
int cpuid = 1;
|
||||||
|
int rc;
|
||||||
|
|
||||||
cpu_set_ops(0);
|
cpu_set_ops(0);
|
||||||
|
|
||||||
for_each_of_cpu_node(dn) {
|
for_each_of_cpu_node(dn) {
|
||||||
hart = riscv_of_processor_hartid(dn);
|
rc = riscv_of_processor_hartid(dn, &hart);
|
||||||
if (hart < 0)
|
if (rc < 0)
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
if (hart == cpuid_to_hartid_map(0)) {
|
if (hart == cpuid_to_hartid_map(0)) {
|
||||||
@ -90,7 +91,7 @@ void __init setup_smp(void)
|
|||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
if (cpuid >= NR_CPUS) {
|
if (cpuid >= NR_CPUS) {
|
||||||
pr_warn("Invalid cpuid [%d] for hartid [%d]\n",
|
pr_warn("Invalid cpuid [%d] for hartid [%lu]\n",
|
||||||
cpuid, hart);
|
cpuid, hart);
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
@ -101,20 +101,21 @@ static irqreturn_t riscv_timer_interrupt(int irq, void *dev_id)
|
|||||||
|
|
||||||
static int __init riscv_timer_init_dt(struct device_node *n)
|
static int __init riscv_timer_init_dt(struct device_node *n)
|
||||||
{
|
{
|
||||||
int cpuid, hartid, error;
|
int cpuid, error;
|
||||||
|
unsigned long hartid;
|
||||||
struct device_node *child;
|
struct device_node *child;
|
||||||
struct irq_domain *domain;
|
struct irq_domain *domain;
|
||||||
|
|
||||||
hartid = riscv_of_processor_hartid(n);
|
error = riscv_of_processor_hartid(n, &hartid);
|
||||||
if (hartid < 0) {
|
if (error < 0) {
|
||||||
pr_warn("Not valid hartid for node [%pOF] error = [%d]\n",
|
pr_warn("Not valid hartid for node [%pOF] error = [%lu]\n",
|
||||||
n, hartid);
|
n, hartid);
|
||||||
return hartid;
|
return error;
|
||||||
}
|
}
|
||||||
|
|
||||||
cpuid = riscv_hartid_to_cpuid(hartid);
|
cpuid = riscv_hartid_to_cpuid(hartid);
|
||||||
if (cpuid < 0) {
|
if (cpuid < 0) {
|
||||||
pr_warn("Invalid cpuid for hartid [%d]\n", hartid);
|
pr_warn("Invalid cpuid for hartid [%lu]\n", hartid);
|
||||||
return cpuid;
|
return cpuid;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -140,7 +141,7 @@ static int __init riscv_timer_init_dt(struct device_node *n)
|
|||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
}
|
}
|
||||||
|
|
||||||
pr_info("%s: Registering clocksource cpuid [%d] hartid [%d]\n",
|
pr_info("%s: Registering clocksource cpuid [%d] hartid [%lu]\n",
|
||||||
__func__, cpuid, hartid);
|
__func__, cpuid, hartid);
|
||||||
error = clocksource_register_hz(&riscv_clocksource, riscv_timebase);
|
error = clocksource_register_hz(&riscv_clocksource, riscv_timebase);
|
||||||
if (error) {
|
if (error) {
|
||||||
|
@ -95,10 +95,11 @@ static const struct irq_domain_ops riscv_intc_domain_ops = {
|
|||||||
static int __init riscv_intc_init(struct device_node *node,
|
static int __init riscv_intc_init(struct device_node *node,
|
||||||
struct device_node *parent)
|
struct device_node *parent)
|
||||||
{
|
{
|
||||||
int rc, hartid;
|
int rc;
|
||||||
|
unsigned long hartid;
|
||||||
|
|
||||||
hartid = riscv_of_parent_hartid(node);
|
rc = riscv_of_parent_hartid(node, &hartid);
|
||||||
if (hartid < 0) {
|
if (rc < 0) {
|
||||||
pr_warn("unable to find hart id for %pOF\n", node);
|
pr_warn("unable to find hart id for %pOF\n", node);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
@ -317,7 +317,8 @@ static int __init plic_init(struct device_node *node,
|
|||||||
for (i = 0; i < nr_contexts; i++) {
|
for (i = 0; i < nr_contexts; i++) {
|
||||||
struct of_phandle_args parent;
|
struct of_phandle_args parent;
|
||||||
irq_hw_number_t hwirq;
|
irq_hw_number_t hwirq;
|
||||||
int cpu, hartid;
|
int cpu;
|
||||||
|
unsigned long hartid;
|
||||||
|
|
||||||
if (of_irq_parse_one(node, i, &parent)) {
|
if (of_irq_parse_one(node, i, &parent)) {
|
||||||
pr_err("failed to parse parent for context %d.\n", i);
|
pr_err("failed to parse parent for context %d.\n", i);
|
||||||
@ -341,8 +342,8 @@ static int __init plic_init(struct device_node *node,
|
|||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
|
||||||
hartid = riscv_of_parent_hartid(parent.np);
|
error = riscv_of_parent_hartid(parent.np, &hartid);
|
||||||
if (hartid < 0) {
|
if (error < 0) {
|
||||||
pr_warn("failed to parse hart ID for context %d.\n", i);
|
pr_warn("failed to parse hart ID for context %d.\n", i);
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user