MIPS: BPF: Use 32 or 64-bit load instruction to load an address to register
When loading a pointer to register we need to use the appropriate 32 or 64bit instruction to preserve the pointers' top 32bits. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: David S. Miller <davem@davemloft.net> Cc: Daniel Borkmann <dborkman@redhat.com> Cc: Alexei Starovoitov <ast@plumgrid.com> Cc: netdev@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/7180/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -453,6 +453,17 @@ static inline void emit_wsbh(unsigned int dst, unsigned int src,
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emit_instr(ctx, wsbh, dst, src);
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}
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/* load pointer to register */
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static inline void emit_load_ptr(unsigned int dst, unsigned int src,
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int imm, struct jit_ctx *ctx)
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{
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/* src contains the base addr of the 32/64-pointer */
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if (config_enabled(CONFIG_64BIT))
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emit_instr(ctx, ld, dst, imm, src);
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else
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emit_instr(ctx, lw, dst, imm, src);
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}
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/* load a function pointer to register */
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static inline void emit_load_func(unsigned int reg, ptr imm,
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struct jit_ctx *ctx)
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@ -1277,7 +1288,8 @@ jmp_cmp:
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/* A = skb->dev->ifindex */
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ctx->flags |= SEEN_SKB | SEEN_A | SEEN_S0;
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off = offsetof(struct sk_buff, dev);
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emit_load(r_s0, r_skb, off, ctx);
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/* Load *dev pointer */
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emit_load_ptr(r_s0, r_skb, off, ctx);
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/* error (0) in the delay slot */
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emit_bcond(MIPS_COND_EQ, r_s0, r_zero,
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b_imm(prog->len, ctx), ctx);
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