staging: sm750fb: change definition of PANEL_DISPLAY_CTRL multi-bit fields
Use more straight-forward definitions for multi-bit fields of PANEL_DISPLAY_CTRL register and use open-coded implementation for register manipulation Signed-off-by: Mike Rapoport <mike.rapoport@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -144,7 +144,9 @@ void ddk750_setLogicalDispOut(disp_output_t output)
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if (output & PNL_2_USAGE) {
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/* set panel path controller select */
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reg = PEEK32(PANEL_DISPLAY_CTRL);
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reg = FIELD_VALUE(reg, PANEL_DISPLAY_CTRL, SELECT, (output & PNL_2_MASK)>>PNL_2_OFFSET);
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reg &= ~PANEL_DISPLAY_CTRL_SELECT_MASK;
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reg |= (((output & PNL_2_MASK) >> PNL_2_OFFSET) <<
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PANEL_DISPLAY_CTRL_SELECT_SHIFT);
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POKE32(PANEL_DISPLAY_CTRL, reg);
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}
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@ -783,21 +783,22 @@
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#define PANEL_DISPLAY_CTRL 0x080000
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#define PANEL_DISPLAY_CTRL_RESERVED_MASK 0xc0f08000
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#define PANEL_DISPLAY_CTRL_SELECT 29:28
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#define PANEL_DISPLAY_CTRL_SELECT_PANEL 0
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#define PANEL_DISPLAY_CTRL_SELECT_VGA 1
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#define PANEL_DISPLAY_CTRL_SELECT_CRT 2
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#define PANEL_DISPLAY_CTRL_SELECT_SHIFT 28
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#define PANEL_DISPLAY_CTRL_SELECT_MASK (0x3 << 28)
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#define PANEL_DISPLAY_CTRL_SELECT_PANEL (0x0 << 28)
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#define PANEL_DISPLAY_CTRL_SELECT_VGA (0x1 << 28)
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#define PANEL_DISPLAY_CTRL_SELECT_CRT (0x2 << 28)
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#define PANEL_DISPLAY_CTRL_FPEN BIT(27)
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#define PANEL_DISPLAY_CTRL_VBIASEN BIT(26)
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#define PANEL_DISPLAY_CTRL_DATA BIT(25)
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#define PANEL_DISPLAY_CTRL_FPVDDEN BIT(24)
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#define PANEL_DISPLAY_CTRL_DUAL_DISPLAY BIT(19)
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#define PANEL_DISPLAY_CTRL_DOUBLE_PIXEL BIT(18)
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#define PANEL_DISPLAY_CTRL_FIFO 17:16
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#define PANEL_DISPLAY_CTRL_FIFO_1 0
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#define PANEL_DISPLAY_CTRL_FIFO_3 1
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#define PANEL_DISPLAY_CTRL_FIFO_7 2
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#define PANEL_DISPLAY_CTRL_FIFO_11 3
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#define PANEL_DISPLAY_CTRL_FIFO (0x3 << 16)
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#define PANEL_DISPLAY_CTRL_FIFO_1 (0x0 << 16)
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#define PANEL_DISPLAY_CTRL_FIFO_3 (0x1 << 16)
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#define PANEL_DISPLAY_CTRL_FIFO_7 (0x2 << 16)
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#define PANEL_DISPLAY_CTRL_FIFO_11 (0x3 << 16)
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#define DISPLAY_CTRL_CLOCK_PHASE BIT(14)
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#define DISPLAY_CTRL_VSYNC_PHASE BIT(13)
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#define DISPLAY_CTRL_HSYNC_PHASE BIT(12)
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@ -811,10 +812,10 @@
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#define PANEL_DISPLAY_CTRL_HORIZONTAL_PAN BIT(4)
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#define DISPLAY_CTRL_GAMMA BIT(3)
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#define DISPLAY_CTRL_PLANE BIT(2)
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#define PANEL_DISPLAY_CTRL_FORMAT 1:0
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#define PANEL_DISPLAY_CTRL_FORMAT_8 0
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#define PANEL_DISPLAY_CTRL_FORMAT_16 1
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#define PANEL_DISPLAY_CTRL_FORMAT_32 2
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#define PANEL_DISPLAY_CTRL_FORMAT (0x3 << 0)
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#define PANEL_DISPLAY_CTRL_FORMAT_8 (0x0 << 0)
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#define PANEL_DISPLAY_CTRL_FORMAT_16 (0x1 << 0)
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#define PANEL_DISPLAY_CTRL_FORMAT_32 (0x2 << 0)
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#define PANEL_PAN_CTRL 0x080004
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#define PANEL_PAN_CTRL_VERTICAL_PAN 31:24
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@ -336,11 +336,7 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc *crtc,
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/* set pixel format */
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reg = PEEK32(PANEL_DISPLAY_CTRL);
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POKE32(PANEL_DISPLAY_CTRL,
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FIELD_VALUE(reg,
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PANEL_DISPLAY_CTRL, FORMAT,
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(var->bits_per_pixel >> 4)
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));
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POKE32(PANEL_DISPLAY_CTRL, reg | (var->bits_per_pixel >> 4));
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} else {
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/* not implemented now */
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POKE32(CRT_FB_ADDRESS, crtc->oScreen);
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