phy: qcom-qusb2: Fix HSTX_TRIM tuning with fused value for SDM845
Tune1 register on sdm845 is used to update HSTX_TRIM with fused
setting. Enable same by specifying update_tune1_with_efuse flag
for sdm845, otherwise driver ends up programming tune2 register.
Fixes: ef17f6e212
("phy: qcom-qusb2: Add QUSB2 PHYs support for sdm845")
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Acked-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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@ -231,6 +231,7 @@ static const struct qusb2_phy_cfg sdm845_phy_cfg = {
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.mask_core_ready = CORE_READY_STATUS,
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.has_pll_override = true,
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.autoresume_en = BIT(0),
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.update_tune1_with_efuse = true,
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};
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static const char * const qusb2_phy_vreg_names[] = {
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