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clk: qcom: gcc-sm8150: Add gcc video resets for sm8150

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Add gcc video axic, axi0 and axi1 resets for the global clock
controller on sm8150.

Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240111-sm8150-dfs-support-v2-3-6edb44c83d3b@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Satya Priya Kakitapalli 2024-01-11 12:02:30 +05:30 committed by Bjorn Andersson
parent 4b3dbd706a
commit c8bf3e08c6
1 changed files with 3 additions and 0 deletions
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3
drivers/clk/qcom/gcc-sm8150.c
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@ -3778,6 +3778,9 @@ static const struct qcom_reset_map gcc_sm8150_resets[] = {
[GCC_USB30_PRIM_BCR] = { 0xf000 },
[GCC_USB30_SEC_BCR] = { 0x10000 },
[GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x6a000 },
[GCC_VIDEO_AXIC_CLK_BCR] = { 0xb02c, 2 },
[GCC_VIDEO_AXI0_CLK_BCR] = { 0xb024, 2 },
[GCC_VIDEO_AXI1_CLK_BCR] = { 0xb028, 2 },
};
static struct gdsc *gcc_sm8150_gdscs[] = {