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drm/i915/selftests: Run MI_BB perf selftests on SNB

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SNB does have the RING_TIMESTAMP register on the RCS engine.
Run the MI_BB perf tests on it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221031135703.14670-5-ville.syrjala@linux.intel.com
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
This commit is contained in:
Ville Syrjälä 2022-10-31 15:57:01 +02:00
parent dbea79a502
commit cf8a82de21
1 changed files with 8 additions and 2 deletions
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10
drivers/gpu/drm/i915/gt/selftest_engine_cs.c
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@ -125,7 +125,7 @@ static int perf_mi_bb_start(void *arg)
enum intel_engine_id id;
int err = 0;
if (GRAPHICS_VER(gt->i915) < 7) /* for per-engine CS_TIMESTAMP */
if (GRAPHICS_VER(gt->i915) < 6) /* for per-engine CS_TIMESTAMP */
return 0;
perf_begin(gt);
@ -135,6 +135,9 @@ static int perf_mi_bb_start(void *arg)
u32 cycles[COUNT];
int i;
if (GRAPHICS_VER(engine->i915) < 7 && engine->id != RCS0)
continue;
intel_engine_pm_get(engine);
batch = create_empty_batch(ce);
@ -249,7 +252,7 @@ static int perf_mi_noop(void *arg)
enum intel_engine_id id;
int err = 0;
if (GRAPHICS_VER(gt->i915) < 7) /* for per-engine CS_TIMESTAMP */
if (GRAPHICS_VER(gt->i915) < 6) /* for per-engine CS_TIMESTAMP */
return 0;
perf_begin(gt);
@ -259,6 +262,9 @@ static int perf_mi_noop(void *arg)
u32 cycles[COUNT];
int i;
if (GRAPHICS_VER(engine->i915) < 7 && engine->id != RCS0)
continue;
intel_engine_pm_get(engine);
base = create_empty_batch(ce);