ARM: 8182/1: l2c: Make l2x0_cache_size_of_parse() return 'int'
Since commit f3354ab674
("ARM: 8169/1: l2c: parse cache properties from
ePAPR definitions") the following error is seen on imx6q:
[ 0.000000] PL310 OF: cache setting yield illegal associativity
[ 0.000000] PL310 OF: -2147097556 calculated, only 8 and 16 legal
As imx6q does not pass the "cache-size" and "cache-sets" properties in DT, the function l2x0_cache_size_of_parse() returns early and keep the 'associativity' pointer uninitialized.
To fix this problem, return error codes inside l2x0_cache_size_of_parse() and only use the 'associativity' pointer result if l2x0_cache_size_of_parse() succeeds.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
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2d605a3029
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@ -956,7 +956,7 @@ static u32 cache_id_part_number_from_dt;
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* @associativity: variable to return the calculated associativity in
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* @max_way_size: the maximum size in bytes for the cache ways
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*/
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static void __init l2x0_cache_size_of_parse(const struct device_node *np,
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static int __init l2x0_cache_size_of_parse(const struct device_node *np,
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u32 *aux_val, u32 *aux_mask,
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u32 *associativity,
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u32 max_way_size)
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@ -974,7 +974,7 @@ static void __init l2x0_cache_size_of_parse(const struct device_node *np,
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of_property_read_u32(np, "cache-line-size", &line_size);
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if (!cache_size || !sets)
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return;
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return -ENODEV;
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/* All these l2 caches have the same line = block size actually */
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if (!line_size) {
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@ -1009,7 +1009,7 @@ static void __init l2x0_cache_size_of_parse(const struct device_node *np,
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if (way_size > max_way_size) {
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pr_err("L2C OF: set size %dKB is too large\n", way_size);
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return;
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return -EINVAL;
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}
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pr_info("L2C OF: override cache size: %d bytes (%dKB)\n",
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@ -1027,7 +1027,7 @@ static void __init l2x0_cache_size_of_parse(const struct device_node *np,
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if (way_size_bits < 1 || way_size_bits > 6) {
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pr_err("L2C OF: cache way size illegal: %dKB is not mapped\n",
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way_size);
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return;
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return -EINVAL;
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}
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mask |= L2C_AUX_CTRL_WAY_SIZE_MASK;
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@ -1036,6 +1036,8 @@ static void __init l2x0_cache_size_of_parse(const struct device_node *np,
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*aux_val &= ~mask;
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*aux_val |= val;
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*aux_mask &= ~mask;
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return 0;
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}
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static void __init l2x0_of_parse(const struct device_node *np,
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@ -1046,6 +1048,7 @@ static void __init l2x0_of_parse(const struct device_node *np,
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u32 dirty = 0;
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u32 val = 0, mask = 0;
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u32 assoc;
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int ret;
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of_property_read_u32(np, "arm,tag-latency", &tag);
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if (tag) {
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@ -1068,7 +1071,10 @@ static void __init l2x0_of_parse(const struct device_node *np,
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val |= (dirty - 1) << L2X0_AUX_CTRL_DIRTY_LATENCY_SHIFT;
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}
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l2x0_cache_size_of_parse(np, aux_val, aux_mask, &assoc, SZ_256K);
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ret = l2x0_cache_size_of_parse(np, aux_val, aux_mask, &assoc, SZ_256K);
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if (ret)
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return;
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if (assoc > 8) {
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pr_err("l2x0 of: cache setting yield too high associativity\n");
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pr_err("l2x0 of: %d calculated, max 8\n", assoc);
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@ -1125,6 +1131,7 @@ static void __init l2c310_of_parse(const struct device_node *np,
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u32 tag[3] = { 0, 0, 0 };
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u32 filter[2] = { 0, 0 };
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u32 assoc;
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int ret;
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of_property_read_u32_array(np, "arm,tag-latency", tag, ARRAY_SIZE(tag));
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if (tag[0] && tag[1] && tag[2])
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@ -1152,7 +1159,10 @@ static void __init l2c310_of_parse(const struct device_node *np,
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l2x0_base + L310_ADDR_FILTER_START);
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}
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l2x0_cache_size_of_parse(np, aux_val, aux_mask, &assoc, SZ_512K);
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ret = l2x0_cache_size_of_parse(np, aux_val, aux_mask, &assoc, SZ_512K);
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if (ret)
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return;
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switch (assoc) {
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case 16:
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*aux_val &= ~L2X0_AUX_CTRL_ASSOC_MASK;
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