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ASPEED device tree updates for 5.17

Browse Source 
- New machines:
 
   * TYAN S8036 AST2500 BMC
   * Facebook Bletchley AST2600 BMC
   * Yadro VEGMAN series of AST2500 BMC for x86 servers
 
  - LPC clock additions, to fix long standing missed irq on boot issue
 
  - Secure boot controller description for AST2600
 
  - Alternate chip flash layout, used by Bytedance's G220A
 
  - Various additions to Rainier, Everest, S7106
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Merge tag 'aspeed-5.17-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/dt

ASPEED device tree updates for 5.17

 - New machines:

  * TYAN S8036 AST2500 BMC
  * Facebook Bletchley AST2600 BMC
  * Yadro VEGMAN series of AST2500 BMC for x86 servers

 - LPC clock additions, to fix long standing missed irq on boot issue

 - Secure boot controller description for AST2600

 - Alternate chip flash layout, used by Bytedance's G220A

 - Various additions to Rainier, Everest, S7106

* tag 'aspeed-5.17-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc:
  ARM: dts: aspeed: add LCLK setting into LPC KCS nodes
  dt-bindings: ipmi: bt-bmc: add 'clocks' as a required property
  ARM: dts: aspeed: add LCLK setting into LPC IBT node
  ARM: dts: aspeed: p10: Add TPM device
  ARM: dts: aspeed: p10: Enable USB host ports
  ARM: dts: aspeed: Add TYAN S8036 BMC machine
  ARM: dts: aspeed: tyan-s7106: Add uart_routing and fix vuart config
  ARM: dts: aspeed: Adding Facebook Bletchley BMC
  ARM: dts: aspeed: g220a: Enable secondary flash
  ARM: dts: Add openbmc-flash-layout-64-alt.dtsi
  ARM: dts: aspeed: Add secure boot controller node
  dt-bindings: aspeed: Add Secure Boot Controller bindings
  ARM: dts: aspeed: add device tree for YADRO VEGMAN BMC
  dt-bindings: vendor-prefixes: add YADRO
  ARM: dts: aspeed: mtjade: Add uefi partition
  ARM: dts: aspeed: mtjade: Add I2C buses for NVMe devices
  ARM: dts: aspeed: tyan-s7106: Update nct7802 config

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2021-12-22 17:29:44 +01:00
commit d8db5d8a01
19 changed files with 2539 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

37
Documentation/devicetree/bindings/arm/aspeed/aspeed,sbc.yaml Normal file
View File

@ -0,0 +1,37 @@
# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
# Copyright 2021 Joel Stanley, IBM Corp.
%YAML 1.2
---
$id: "http://devicetree.org/schemas/arm/aspeed/aspeed,sbc.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: ASPEED Secure Boot Controller
maintainers:
- Joel Stanley <joel@jms.id.au>
- Andrew Jeffery <andrew@aj.id.au>
description: |
The ASPEED SoCs have a register bank for interacting with the secure boot
controller.
properties:
compatible:
items:
- const: aspeed,ast2600-sbc
reg:
maxItems: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
sbc: secure-boot-controller@1e6f2000 {
compatible = "aspeed,ast2600-sbc";
reg = <0x1e6f2000 0x1000>;
};

2
Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt
View File

@ -11,6 +11,7 @@ Required properties:
"aspeed,ast2500-ibt-bmc"
"aspeed,ast2600-ibt-bmc"
- reg: physical address and size of the registers
- clocks: clock for the device
Optional properties:
@ -23,4 +24,5 @@ Example:
compatible = "aspeed,ast2400-ibt-bmc";
reg = <0x1e789140 0x18>;
interrupts = <8>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
};

2
Documentation/devicetree/bindings/vendor-prefixes.yaml
View File

@ -1356,6 +1356,8 @@ patternProperties:
description: Shenzhen Xunlong Software CO.,Limited
"^xylon,.*":
description: Xylon
"^yadro,.*":
description: YADRO
"^yamaha,.*":
description: Yamaha Corporation
"^yes-optoelectronics,.*":

7
arch/arm/boot/dts/Makefile
View File

@ -1506,6 +1506,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-arm-stardragon4800-rep2.dtb \
aspeed-bmc-asrock-e3c246d4i.dtb \
aspeed-bmc-bytedance-g220a.dtb \
aspeed-bmc-facebook-bletchley.dtb \
aspeed-bmc-facebook-cloudripper.dtb \
aspeed-bmc-facebook-cmm.dtb \
aspeed-bmc-facebook-elbert.dtb \
@ -1543,4 +1544,8 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-quanta-q71l.dtb \
aspeed-bmc-supermicro-x11spi.dtb \
aspeed-bmc-inventec-transformers.dtb \
aspeed-bmc-tyan-s7106.dtb
aspeed-bmc-tyan-s7106.dtb \
aspeed-bmc-tyan-s8036.dtb \
aspeed-bmc-vegman-n110.dtb \
aspeed-bmc-vegman-rx20.dtb \
aspeed-bmc-vegman-sx20.dtb

267
arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts
View File

@ -7,6 +7,50 @@
model = "Ampere Mt. Jade BMC";
compatible = "ampere,mtjade-bmc", "aspeed,ast2500";
aliases {
/*
* i2c bus 50-57 assigned to NVMe slot 0-7
*/
i2c50 = &nvmeslot_0;
i2c51 = &nvmeslot_1;
i2c52 = &nvmeslot_2;
i2c53 = &nvmeslot_3;
i2c54 = &nvmeslot_4;
i2c55 = &nvmeslot_5;
i2c56 = &nvmeslot_6;
i2c57 = &nvmeslot_7;
/*
* i2c bus 60-67 assigned to NVMe slot 8-15
*/
i2c60 = &nvmeslot_8;
i2c61 = &nvmeslot_9;
i2c62 = &nvmeslot_10;
i2c63 = &nvmeslot_11;
i2c64 = &nvmeslot_12;
i2c65 = &nvmeslot_13;
i2c66 = &nvmeslot_14;
i2c67 = &nvmeslot_15;
/*
* i2c bus 70-77 assigned to NVMe slot 16-23
*/
i2c70 = &nvmeslot_16;
i2c71 = &nvmeslot_17;
i2c72 = &nvmeslot_18;
i2c73 = &nvmeslot_19;
i2c74 = &nvmeslot_20;
i2c75 = &nvmeslot_21;
i2c76 = &nvmeslot_22;
i2c77 = &nvmeslot_23;
/*
* i2c bus 80-81 assigned to NVMe M2 slot 0-1
*/
i2c80 = &nvme_m2_0;
i2c81 = &nvme_m2_1;
};
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlycon";
@ -330,6 +374,15 @@
m25p,fast-read;
label = "pnor";
/* spi-max-frequency = <100000000>; */
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uefi@400000 {
reg = <0x400000 0x1C00000>;
label = "pnor-uefi";
};
};
};
};
@ -445,6 +498,220 @@
&i2c5 {
status = "okay";
i2c-mux@70 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
i2c-mux-idle-disconnect;
nvmeslot_0_7: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x3>;
};
};
i2c-mux@71 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x71>;
i2c-mux-idle-disconnect;
nvmeslot_8_15: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x4>;
};
nvmeslot_16_23: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x3>;
};
};
i2c-mux@72 {
compatible = "nxp,pca9545";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x72>;
i2c-mux-idle-disconnect;
nvme_m2_0: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0>;
};
nvme_m2_1: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x1>;
};
};
};
&nvmeslot_0_7 {
status = "okay";
i2c-mux@75 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x75>;
i2c-mux-idle-disconnect;
nvmeslot_0: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0>;
};
nvmeslot_1: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x1>;
};
nvmeslot_2: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x2>;
};
nvmeslot_3: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x3>;
};
nvmeslot_4: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x4>;
};
nvmeslot_5: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x5>;
};
nvmeslot_6: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x6>;
};
nvmeslot_7: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x7>;
};
};
};
&nvmeslot_8_15 {
status = "okay";
i2c-mux@75 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x75>;
i2c-mux-idle-disconnect;
nvmeslot_8: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0>;
};
nvmeslot_9: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x1>;
};
nvmeslot_10: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x2>;
};
nvmeslot_11: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x3>;
};
nvmeslot_12: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x4>;
};
nvmeslot_13: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x5>;
};
nvmeslot_14: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x6>;
};
nvmeslot_15: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x7>;
};
};
};
&nvmeslot_16_23 {
status = "okay";
i2c-mux@75 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x75>;
i2c-mux-idle-disconnect;
nvmeslot_16: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0>;
};
nvmeslot_17: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x1>;
};
nvmeslot_18: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x2>;
};
nvmeslot_19: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x3>;
};
nvmeslot_20: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x4>;
};
nvmeslot_21: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x5>;
};
nvmeslot_22: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x6>;
};
nvmeslot_23: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x7>;
};
};
};
&i2c6 {

12
arch/arm/boot/dts/aspeed-bmc-bytedance-g220a.dts
View File

@ -260,6 +260,13 @@
spi-max-frequency = <50000000>;
#include "openbmc-flash-layout-64.dtsi"
};
flash@1 {
status = "okay";
label = "alt-bmc";
m25p,fast-read;
spi-max-frequency = <50000000>;
#include "openbmc-flash-layout-64-alt.dtsi"
};
};
&spi1 {
@ -278,6 +285,11 @@
status = "okay";
};
&wdt2 {
status = "okay";
aspeed,alt-boot;
};
&gpio {
status = "okay";
gpio-line-names =

756
arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts Normal file
View File

@ -0,0 +1,756 @@
// SPDX-License-Identifier: GPL-2.0+
// Copyright (c) 2021 Facebook Inc.
/dts-v1/;
#include "aspeed-g6.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/usb/pd.h>
/ {
model = "Facebook Bletchley BMC";
compatible = "facebook,bletchley-bmc", "aspeed,ast2600";
aliases {
serial4 = &uart5;
};
chosen {
bootargs = "console=ttyS4,57600n8";
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x80000000>;
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
<&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,
<&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>,
<&adc1 4>, <&adc1 5>, <&adc1 6>, <&adc1 7>;
};
spi_gpio: spi-gpio {
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
gpio-sck = <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
gpio-mosi = <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
gpio-miso = <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>;
num-chipselects = <1>;
cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
tpmdev@0 {
compatible = "tcg,tpm_tis-spi";
spi-max-frequency = <33000000>;
reg = <0>;
};
};
switchphy: ethernet-phy@0 {
// Fixed link
};
leds {
compatible = "gpio-leds";
sys_log_id {
retain-state-shutdown;
default-state = "keep";
gpios = <&front_leds 0 GPIO_ACTIVE_HIGH>;
};
fan0_blue {
retain-state-shutdown;
default-state = "on";
gpios = <&fan_ioexp 8 GPIO_ACTIVE_HIGH>;
};
fan1_blue {
retain-state-shutdown;
default-state = "on";
gpios = <&fan_ioexp 9 GPIO_ACTIVE_HIGH>;
};
fan2_blue {
retain-state-shutdown;
default-state = "on";
gpios = <&fan_ioexp 10 GPIO_ACTIVE_HIGH>;
};
fan3_blue {
retain-state-shutdown;
default-state = "on";
gpios = <&fan_ioexp 11 GPIO_ACTIVE_HIGH>;
};
fan0_amber {
retain-state-shutdown;
default-state = "off";
gpios = <&fan_ioexp 12 GPIO_ACTIVE_HIGH>;
};
fan1_amber {
retain-state-shutdown;
default-state = "off";
gpios = <&fan_ioexp 13 GPIO_ACTIVE_HIGH>;
};
fan2_amber {
retain-state-shutdown;
default-state = "off";
gpios = <&fan_ioexp 14 GPIO_ACTIVE_HIGH>;
};
fan3_amber {
retain-state-shutdown;
default-state = "off";
gpios = <&fan_ioexp 15 GPIO_ACTIVE_HIGH>;
};
sled0_amber {
retain-state-shutdown;
default-state = "off";
gpios = <&sled0_leds 0 GPIO_ACTIVE_LOW>;
};
sled0_blue {
retain-state-shutdown;
default-state = "off";
gpios = <&sled0_leds 1 GPIO_ACTIVE_LOW>;
};
sled1_amber {
retain-state-shutdown;
default-state = "off";
gpios = <&sled1_leds 0 GPIO_ACTIVE_LOW>;
};
sled1_blue {
retain-state-shutdown;
default-state = "off";
gpios = <&sled1_leds 1 GPIO_ACTIVE_LOW>;
};
sled2_amber {
retain-state-shutdown;
default-state = "off";
gpios = <&sled2_leds 0 GPIO_ACTIVE_LOW>;
};
sled2_blue {
retain-state-shutdown;
default-state = "off";
gpios = <&sled2_leds 1 GPIO_ACTIVE_LOW>;
};
sled3_amber {
retain-state-shutdown;
default-state = "off";
gpios = <&sled3_leds 0 GPIO_ACTIVE_LOW>;
};
sled3_blue {
retain-state-shutdown;
default-state = "off";
gpios = <&sled3_leds 1 GPIO_ACTIVE_LOW>;
};
sled4_amber {
retain-state-shutdown;
default-state = "off";
gpios = <&sled4_leds 0 GPIO_ACTIVE_LOW>;
};
sled4_blue {
retain-state-shutdown;
default-state = "off";
gpios = <&sled4_leds 1 GPIO_ACTIVE_LOW>;
};
sled5_amber {
retain-state-shutdown;
default-state = "off";
gpios = <&sled5_leds 0 GPIO_ACTIVE_LOW>;
};
sled5_blue {
retain-state-shutdown;
default-state = "off";
gpios = <&sled5_leds 1 GPIO_ACTIVE_LOW>;
};
};
};
&mac2 {
status = "okay";
phy-mode = "rgmii";
phy-handle = <&switchphy>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii3_default>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
&rtc {
status = "okay";
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
spi-max-frequency = <50000000>;
#include "openbmc-flash-layout-128.dtsi"
};
};
&spi2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2_default>;
flash@0 {
status = "okay";
m25p,fast-read;
label = "pnor";
spi-max-frequency = <100000000>;
};
};
&i2c0 {
status = "okay";
/* TODO: Add ADC INA230 */
mp5023@40 {
compatible = "mps,mp5023";
reg = <0x40>;
};
tmp421@4f {
compatible = "ti,tmp421";
reg = <0x4f>;
};
sled0_ioexp: pca9539@76 {
compatible = "nxp,pca9539";
reg = <0x76>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"SLED0_MS_DETECT1","SLED0_VBUS_BMC_EN","SLED0_INA230_ALERT","SLED0_P12V_STBY_ALERT",
"SLED0_SSD_ALERT","SLED0_MS_DETECT0","SLED0_RST_CCG5","SLED0_FUSB302_INT",
"SLED0_MD_STBY_RESET","SLED0_MD_IOEXP_EN_FAULT","SLED0_MD_DIR","SLED0_MD_DECAY",
"SLED0_MD_MODE1","SLED0_MD_MODE2","SLED0_MD_MODE3","power-host0";
};
sled0_leds: pca9552@67 {
compatible = "nxp,pca9552";
reg = <0x67>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"led-sled0-amber","led-sled0-blue","SLED0_RST_IOEXP","",
"","","","",
"","","","",
"","","","";
};
sled0_fusb302: typec-portc@22 {
compatible = "fcs,fusb302";
reg = <0x22>;
connector {
compatible = "usb-c-connector";
label = "USB-C";
power-role = "dual";
try-power-role = "sink";
data-role = "dual";
source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
PDO_VAR(3000, 12000, 3000)
PDO_PPS_APDO(3000, 11000, 3000)>;
op-sink-microwatt = <10000000>;
};
};
};
&i2c1 {
status = "okay";
/* TODO: Add ADC INA230 */
mp5023@40 {
compatible = "mps,mp5023";
reg = <0x40>;
};
tmp421@4f {
compatible = "ti,tmp421";
reg = <0x4f>;
};
sled1_ioexp: pca9539@76 {
compatible = "nxp,pca9539";
reg = <0x76>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"SLED1_MS_DETECT1","SLED1_VBUS_BMC_EN","SLED1_INA230_ALERT","SLED1_P12V_STBY_ALERT",
"SLED1_SSD_ALERT","SLED1_MS_DETECT0","SLED1_RST_CCG5","SLED1_FUSB302_INT",
"SLED1_MD_STBY_RESET","SLED1_MD_IOEXP_EN_FAULT","SLED1_MD_DIR","SLED1_MD_DECAY",
"SLED1_MD_MODE1","SLED1_MD_MODE2","SLED1_MD_MODE3","power-host1";
};
sled1_leds: pca9552@67 {
compatible = "nxp,pca9552";
reg = <0x67>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"led-sled1-amber","led-sled1-blue","SLED1_RST_IOEXP","",
"","","","",
"","","","",
"","","","";
};
sled1_fusb302: typec-portc@22 {
compatible = "fcs,fusb302";
reg = <0x22>;
connector {
compatible = "usb-c-connector";
label = "USB-C";
power-role = "dual";
try-power-role = "sink";
data-role = "dual";
source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
PDO_VAR(3000, 12000, 3000)
PDO_PPS_APDO(3000, 11000, 3000)>;
op-sink-microwatt = <10000000>;
};
};
};
&i2c1 {
status = "okay";
};
&i2c2 {
status = "okay";
/* TODO: Add ADC INA230 */
mp5023@40 {
compatible = "mps,mp5023";
reg = <0x40>;
};
tmp421@4f {
compatible = "ti,tmp421";
reg = <0x4f>;
};
sled2_ioexp: pca9539@76 {
compatible = "nxp,pca9539";
reg = <0x76>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"SLED2_MS_DETECT1","SLED2_VBUS_BMC_EN","SLED2_INA230_ALERT","SLED2_P12V_STBY_ALERT",
"SLED2_SSD_ALERT","SLED2_MS_DETECT0","SLED2_RST_CCG5","SLED2_FUSB302_INT",
"SLED2_MD_STBY_RESET","SLED2_MD_IOEXP_EN_FAULT","SLED2_MD_DIR","SLED2_MD_DECAY",
"SLED2_MD_MODE1","SLED2_MD_MODE2","SLED2_MD_MODE3","power-host2";
};
sled2_leds: pca9552@67 {
compatible = "nxp,pca9552";
reg = <0x67>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"led-sled2-amber","led-sled2-blue","SLED2_RST_IOEXP","",
"","","","",
"","","","",
"","","","";
};
sled2_fusb302: typec-portc@22 {
compatible = "fcs,fusb302";
reg = <0x22>;
connector {
compatible = "usb-c-connector";
label = "USB-C";
power-role = "dual";
try-power-role = "sink";
data-role = "dual";
source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
PDO_VAR(3000, 12000, 3000)
PDO_PPS_APDO(3000, 11000, 3000)>;
op-sink-microwatt = <10000000>;
};
};
};
&i2c3 {
status = "okay";
/* TODO: Add ADC INA230 */
mp5023@40 {
compatible = "mps,mp5023";
reg = <0x40>;
};
tmp421@4f {
compatible = "ti,tmp421";
reg = <0x4f>;
};
sled3_ioexp: pca9539@76 {
compatible = "nxp,pca9539";
reg = <0x76>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"SLED3_MS_DETECT1","SLED3_VBUS_BMC_EN","SLED3_INA230_ALERT","SLED3_P12V_STBY_ALERT",
"SLED3_SSD_ALERT","SLED3_MS_DETECT0","SLED3_RST_CCG5","SLED3_FUSB302_INT",
"SLED3_MD_STBY_RESET","SLED3_MD_IOEXP_EN_FAULT","SLED3_MD_DIR","SLED3_MD_DECAY",
"SLED3_MD_MODE1","SLED3_MD_MODE2","SLED3_MD_MODE3","power-host3";
};
sled3_leds: pca9552@67 {
compatible = "nxp,pca9552";
reg = <0x67>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"led-sled3-amber","led-sled3-blue","SLED3_RST_IOEXP","",
"","","","",
"","","","",
"","","","";
};
sled3_fusb302: typec-portc@22 {
compatible = "fcs,fusb302";
reg = <0x22>;
connector {
compatible = "usb-c-connector";
label = "USB-C";
power-role = "dual";
try-power-role = "sink";
data-role = "dual";
source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
PDO_VAR(3000, 12000, 3000)
PDO_PPS_APDO(3000, 11000, 3000)>;
op-sink-microwatt = <10000000>;
};
};
};
&i2c4 {
status = "okay";
/* TODO: Add ADC INA230 */
mp5023@40 {
compatible = "mps,mp5023";
reg = <0x40>;
};
tmp421@4f {
compatible = "ti,tmp421";
reg = <0x4f>;
};
sled4_ioexp: pca9539@76 {
compatible = "nxp,pca9539";
reg = <0x76>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"SLED4_MS_DETECT1","SLED4_VBUS_BMC_EN","SLED4_INA230_ALERT","SLED4_P12V_STBY_ALERT",
"SLED4_SSD_ALERT","SLED4_MS_DETECT0","SLED4_RST_CCG5","SLED4_FUSB302_INT",
"SLED4_MD_STBY_RESET","SLED4_MD_IOEXP_EN_FAULT","SLED4_MD_DIR","SLED4_MD_DECAY",
"SLED4_MD_MODE1","SLED4_MD_MODE2","SLED4_MD_MODE3","power-host4";
};
sled4_leds: pca9552@67 {
compatible = "nxp,pca9552";
reg = <0x67>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"led-sled4-amber","led-sled4-blue","SLED4_RST_IOEXP","",
"","","","",
"","","","",
"","","","";
};
sled4_fusb302: typec-portc@22 {
compatible = "fcs,fusb302";
reg = <0x22>;
connector {
compatible = "usb-c-connector";
label = "USB-C";
power-role = "dual";
try-power-role = "sink";
data-role = "dual";
source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
PDO_VAR(3000, 12000, 3000)
PDO_PPS_APDO(3000, 11000, 3000)>;
op-sink-microwatt = <10000000>;
};
};
};
&i2c5 {
status = "okay";
/* TODO: Add ADC INA230 */
mp5023@40 {
compatible = "mps,mp5023";
reg = <0x40>;
};
tmp421@4f {
compatible = "ti,tmp421";
reg = <0x4f>;
};
sled5_ioexp: pca9539@76 {
compatible = "nxp,pca9539";
reg = <0x76>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"SLED5_MS_DETECT1","SLED5_VBUS_BMC_EN","SLED5_INA230_ALERT","SLED5_P12V_STBY_ALERT",
"SLED5_SSD_ALERT","SLED5_MS_DETECT0","SLED5_RST_CCG5","SLED5_FUSB302_INT",
"SLED5_MD_STBY_RESET","SLED5_MD_IOEXP_EN_FAULT","SLED5_MD_DIR","SLED5_MD_DECAY",
"SLED5_MD_MODE1","SLED5_MD_MODE2","SLED5_MD_MODE3","power-host5";
};
sled5_leds: pca9552@67 {
compatible = "nxp,pca9552";
reg = <0x67>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"led-sled5-amber","led-sled5-blue","SLED5_RST_IOEXP","",
"","","","",
"","","","",
"","","","";
};
sled5_fusb302: typec-portc@22 {
compatible = "fcs,fusb302";
reg = <0x22>;
connector {
compatible = "usb-c-connector";
label = "USB-C";
power-role = "dual";
try-power-role = "sink";
data-role = "dual";
source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
PDO_VAR(3000, 12000, 3000)
PDO_PPS_APDO(3000, 11000, 3000)>;
op-sink-microwatt = <10000000>;
};
};
};
&i2c6 {
status = "okay";
eeprom@56 {
compatible = "atmel,24c64";
reg = <0x56>;
};
rtc@51 {
compatible = "nxp,pcf85263";
reg = <0x51>;
};
};
&i2c7 {
status = "okay";
eeprom@54 {
compatible = "atmel,24c64";
reg = <0x54>;
};
};
&i2c9 {
status = "okay";
tmp421@4f {
compatible = "ti,tmp421";
reg = <0x4f>;
};
};
&i2c10 {
status = "okay";
tmp421@4f {
compatible = "ti,tmp421";
reg = <0x4f>;
};
hdc1080@40 {
compatible = "ti,hdc1080";
reg = <0x40>;
};
front_leds: pca9552@67 {
compatible = "nxp,pca9552";
reg = <0x67>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"led-fault-identify","power-p5v-stby-good",
"power-p1v0-dvdd-good","power-p1v0-avdd-good",
"","","","",
"","","","",
"","","","";
};
};
&i2c12 {
status = "okay";
adm1278@11 {
compatible = "adi,adm1278";
reg = <0x11>;
};
tmp421@4c {
compatible = "ti,tmp421";
reg = <0x4c>;
};
tmp421@4d {
compatible = "ti,tmp421";
reg = <0x4d>;
};
fan_ioexp: pca9552@67 {
compatible = "nxp,pca9552";
reg = <0x67>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"presence-fan0","presence-fan1",
"presence-fan2","presence-fan3",
"power-fan0-good","power-fan1-good",
"power-fan2-good","power-fan3-good",
"","","","",
"","","","";
};
};
&i2c13 {
multi-master;
aspeed,hw-timeout-ms = <1000>;
status = "okay";
};
&gpio0 {
gpio-line-names =
/*A0-A7*/ "","","","","","","","",
/*B0-B7*/ "","","SEL_SPI2_MUX","SPI2_MUX1",
"SPI2_MUX2","SPI2_MUX3","","",
/*C0-C7*/ "","","","","","","","",
/*D0-D7*/ "","","","","","","","",
/*E0-E7*/ "","","","","","","","",
/*F0-F7*/ "","","","","","","","",
/*G0-G7*/ "","SWITCH_FRU_MUX","","","","","","",
/*H0-H7*/ "presence-riser1","presence-riser2",
"presence-sled0","presence-sled1",
"presence-sled2","presence-sled3",
"presence-sled4","presence-sled5",
/*I0-I7*/ "REV_ID0","","REV_ID1","REV_ID2",
"","","","",
/*J0-J7*/ "","","","","","","","",
/*K0-K7*/ "","","","","","","","",
/*L0-L7*/ "","","","","","","","",
/*M0-M7*/ "ALERT_SLED0","ALERT_SLED1",
"ALERT_SLED2","ALERT_SLED3",
"ALERT_SLED4","ALERT_SLED5",
"P12V_AUX_ALERT1","",
/*N0-N7*/ "","","","","","","","",
/*O0-O7*/ "","","","",
"","BOARD_ID0","BOARD_ID1","BOARD_ID2",
/*P0-P7*/ "","","","","","","","",
/*Q0-Q7*/ "","","","","","","","",
/*R0-R7*/ "","","","","","","","",
/*S0-S7*/ "","","","BAT_DETECT",
"BMC_BT_WP0","BMC_BT_WP1","","",
/*T0-T7*/ "","","","","","","","",
/*U0-U7*/ "","","","","","","","",
/*V0-V7*/ "","RST_BMC_MVL","","",
"USB2_SEL0_A","USB2_SEL1_A",
"USB2_SEL0_B","USB2_SEL1_B",
/*W0-W7*/ "RST_FRONT_IOEXP","","","","","","","",
/*X0-X7*/ "","","","","","","","",
/*Y0-Y7*/ "","","BSM_FLASH_LATCH","","","","","",
/*Z0-Z7*/ "","","","","","","","";
};
&adc0 {
vref = <1800>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
&pinctrl_adc2_default &pinctrl_adc3_default
&pinctrl_adc4_default &pinctrl_adc5_default
&pinctrl_adc6_default &pinctrl_adc7_default>;
};
&adc1 {
vref = <2500>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default
&pinctrl_adc10_default &pinctrl_adc11_default
&pinctrl_adc12_default &pinctrl_adc13_default
&pinctrl_adc14_default &pinctrl_adc15_default>;
};

17
arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
View File

@ -280,7 +280,7 @@
/*L0-L7*/ "","","","","","","","",
/*M0-M7*/ "","","","","","","","",
/*N0-N7*/ "","","","","","","","",
/*O0-O7*/ "","","","","","","","",
/*O0-O7*/ "","","","usb-power","","","","",
/*P0-P7*/ "","","","","led-pcieslot-power","","","",
/*Q0-Q7*/ "","","regulator-standby-faulted","","","","","",
/*R0-R7*/ "bmc-tpm-reset","power-chassis-control","power-chassis-good","","","I2C_FLASH_MICRO_N","","",
@ -292,6 +292,12 @@
/*X0-X7*/ "","","","","","","","",
/*Y0-Y7*/ "","","","","","","","",
/*Z0-Z7*/ "","","","","","","","";
usb_power {
gpio-hog;
gpios = <ASPEED_GPIO(O, 3) GPIO_ACTIVE_LOW>;
output-high;
};
};
&i2c0 {
@ -1881,6 +1887,11 @@
&i2c12 {
status = "okay";
tpm@2e {
compatible = "nuvoton,npct75x", "tcg,tpm-tis-i2c";
reg = <0x2e>;
};
};
&i2c13 {
@ -2375,6 +2386,10 @@
};
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};

11
arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
View File

@ -275,6 +275,12 @@
output-high;
line-name = "I2C3_MUX_OE_N";
};
usb_power {
gpio-hog;
gpios = <ASPEED_GPIO(O, 3) GPIO_ACTIVE_LOW>;
output-high;
};
};
&emmc_controller {
@ -2061,6 +2067,11 @@
&i2c12 {
status = "okay";
tpm@2e {
compatible = "nuvoton,npct75x";
reg = <0x2e>;
};
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;

40
arch/arm/boot/dts/aspeed-bmc-tyan-s7106.dts
View File

@ -3,6 +3,7 @@
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "Tyan S7106 BMC";
@ -127,8 +128,23 @@
status = "okay";
};
&uart_routing {
status = "okay";
};
&vuart {
status = "okay";
/* We enable the VUART here, but leave it in a state that does
* not interfere with the SuperIO. The goal is to have both the
* VUART and the SuperIO available and decide at runtime whether
* the VUART should actually be used. For that reason, configure
* an "invalid" IO address and an IRQ that is not used by the
* BMC.
*/
aspeed,lpc-io-reg = <0xffff>;
aspeed,lpc-interrupts = <15 IRQ_TYPE_LEVEL_HIGH>;
};
&lpc_ctrl {
@ -213,6 +229,30 @@
nct7802@28 {
compatible = "nuvoton,nct7802";
reg = <0x28>;
#address-cells = <1>;
#size-cells = <0>;
channel@0 { /* LTD */
reg = <0>;
};
channel@1 { /* RTD1 */
reg = <1>;
sensor-type = "temperature";
temperature-mode = "thermistor";
};
channel@2 { /* RTD2 */
reg = <2>;
sensor-type = "temperature";
temperature-mode = "thermistor";
};
channel@3 { /* RTD3 */
reg = <3>;
sensor-type = "temperature";
};
};
/* Also connected to:

470
arch/arm/boot/dts/aspeed-bmc-tyan-s8036.dts Normal file
View File

@ -0,0 +1,470 @@
// SPDX-License-Identifier: GPL-2.0+
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "Tyan S8036 BMC";
compatible = "tyan,s8036-bmc", "aspeed,ast2500";
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlycon";
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
p2a_memory: region@987f0000 {
no-map;
reg = <0x987f0000 0x00010000>; /* 64KB */
};
vga_memory: framebuffer@9f000000 {
no-map;
reg = <0x9f000000 0x01000000>; /* 16M */
};
gfx_memory: framebuffer {
size = <0x01000000>; /* 16M */
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
};
leds {
compatible = "gpio-leds";
identify {
gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>;
};
heartbeat {
gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_LOW>;
};
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
<&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
<&adc 12>, <&adc 13>, <&adc 14>;
};
iio-hwmon-battery {
compatible = "iio-hwmon";
io-channels = <&adc 15>;
};
};
&fmc {
status = "okay";
flash@0 {
label = "bmc";
status = "okay";
m25p,fast-read;
#include "openbmc-flash-layout.dtsi"
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
label = "pnor";
m25p,fast-read;
};
};
&uart1 {
/* Rear RS-232 connector */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default>;
};
&uart2 {
/* RS-232 connector on header */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd2_default
&pinctrl_rxd2_default>;
};
&uart3 {
/* Alternative to vuart to internally connect (route) to uart1
* when vuart cannot be used due to BIOS limitations.
*/
status = "okay";
};
&uart4 {
/* Alternative to vuart to internally connect (route) to the
* external port usually used by uart1 when vuart cannot be
* used due to BIOS limitations.
*/
status = "okay";
};
&uart5 {
/* BMC "debug" (console) UART; connected to RS-232 connector
* on header; selectable via jumpers as alternative to uart2
*/
status = "okay";
};
&uart_routing {
status = "okay";
};
&vuart {
status = "okay";
/* We enable the VUART here, but leave it in a state that does
* not interfere with the SuperIO. The goal is to have both the
* VUART and the SuperIO available and decide at runtime whether
* the VUART should actually be used. For that reason, configure
* an "invalid" IO address and an IRQ that is not used by the
* BMC.
*/
aspeed,lpc-io-reg = <0xffff>;
aspeed,lpc-interrupts = <15 IRQ_TYPE_LEVEL_HIGH>;
};
&lpc_ctrl {
status = "okay";
};
&p2a {
status = "okay";
memory-region = <&p2a_memory>;
};
&lpc_snoop {
status = "okay";
snoop-ports = <0x80>;
};
&adc {
status = "okay";
};
&vhub {
status = "okay";
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default
&pinctrl_pwm1_default
&pinctrl_pwm3_default
&pinctrl_pwm4_default>;
/* CPU fan */
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00>;
};
/* PWM group for chassis fans #1, #2, #3 and #4 */
fan@2 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x02>;
};
fan@3 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x03>;
};
fan@4 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x04>;
};
fan@5 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x05>;
};
/* PWM group for chassis fans #5 and #6 */
fan@6 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x06>;
};
fan@7 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x07>;
};
};
&i2c0 {
/* Directly connected to Sideband-Temperature Sensor Interface (APML) */
status = "okay";
};
&i2c1 {
/* Directly connected to IPMB HDR. */
status = "okay";
};
&i2c2 {
status = "okay";
/* BMC EEPROM, incl. mainboard FRU */
eeprom@50 {
compatible = "atmel,24c256";
reg = <0x50>;
};
/* Also connected to:
* - BCM5720
* - FPGA
* - FAN HDR
* - FPIO HDR
*/
};
&i2c3 {
status = "okay";
/* PSU1 FRU @ 0xA0 */
eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
};
/* PSU2 FRU @ 0xA2 */
eeprom@51 {
compatible = "atmel,24c02";
reg = <0x51>;
};
/* PSU1 @ 0xB0 */
power-supply@58 {
compatible = "pmbus";
reg = <0x58>;
};
/* PSU2 @ 0xB2 */
power-supply@59 {
compatible = "pmbus";
reg = <0x59>;
};
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
/* Hardware monitor with temperature sensors */
nct7802@28 {
compatible = "nuvoton,nct7802";
reg = <0x28>;
#address-cells = <1>;
#size-cells = <0>;
channel@0 { /* LTD */
reg = <0>;
status = "okay";
};
channel@1 { /* RTD1 */
reg = <1>;
status = "okay";
sensor-type = "temperature";
temperature-mode = "thermistor";
};
channel@2 { /* RTD2 */
reg = <2>;
status = "okay";
sensor-type = "temperature";
temperature-mode = "thermistor";
};
channel@3 { /* RTD3 */
reg = <3>;
status = "okay";
sensor-type = "temperature";
};
};
/* Also connected to:
* - PCA9544
* - CLK BUFF
* - OCP FRU
*/
};
&i2c6 {
status = "okay";
/* Connected to:
* - PCA9548 @0xE0
* - PCA9548 @0xE2
* - PCA9544 @0xE4
*/
};
&i2c7 {
status = "okay";
/* Connected to:
* - PCH SMBUS #4
*/
};
&i2c8 {
status = "okay";
/* Not connected */
};
&mac0 {
status = "okay";
use-ncsi;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
};
&mac1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};
&ibt {
status = "okay";
};
&kcs1 {
status = "okay";
aspeed,lpc-io-reg = <0xca8>;
};
&kcs3 {
status = "okay";
aspeed,lpc-io-reg = <0xca2>;
};
/* Enable BMC VGA output to show an early (pre-BIOS) boot screen */
&gfx {
status = "okay";
memory-region = <&gfx_memory>;
};
/* We're following the GPIO naming as defined at
* https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md.
*
* Notes on led-identify and id-button:
* - A physical button is connected to id-button which
* triggers the clock on a D flip-flop. The /Q output of the
* flip-flop drives its D input.
* - The flip-flop's Q output drives led-identify which is
* connected to LEDs.
* - With that, every button press toggles the LED between on and off.
*
* Notes on power-, reset- and nmi- button and control:
* - The -button signals can be used to monitor physical buttons.
* - The -control signals can be used to actuate the specific
* operation.
* - In hardware, the -button signals are connected to the -control
* signals through drivers with the -control signals being
* protected through diodes.
*/
&gpio {
status = "okay";
gpio-line-names =
/*A0*/ "",
/*A1*/ "",
/*A2*/ "led-identify", /* in/out: BMC_CHASSIS_ID_LED_L */
/*A3*/ "",
/*A4*/ "",
/*A5*/ "",
/*A6*/ "",
/*A7*/ "",
/*B0-B7*/ "","","","","","","","",
/*C0-C7*/ "","","","","","","","",
/*D0*/ "",
/*D1*/ "",
/*D2*/ "power-chassis-good", /* in: PWR_GOOD_LED -- Check if this is Z3?*/
/*D3*/ "platform-reset", /* in: RESET_LED_L */
/*D4*/ "",
/*D5*/ "",
/*D6*/ "",
/*D7*/ "",
/*E0*/ "power-button", /* in: BMC_SYS_MON_PWR_BTN_L */
/*E1*/ "power-chassis-control", /* out: BMC_ASSERT_PWR_BTN */
/*E2*/ "reset-button", /* in: BMC_SYS_MOS_RST_BTN_L*/
/*E3*/ "reset-control", /* out: BMC_ASSERT_RST_BTN */
/*E4*/ "nmi-button", /* in: BMC_SYS_MON_NMI_BTN_L */
/*E5*/ "nmi-control", /* out: BMC_ASSERT_NMI_BTN */
/*E6*/ "TSI_RESERT",
/*E7*/ "led-heartbeat", /* out: BMC_GPIOE7 */
/*F0*/ "",
/*F1*/ "clear-cmos-control", /* out: BMC_ASSERT_CLR_CMOS_L */
/*F2*/ "",
/*F3*/ "",
/*F4*/ "led-fault", /* out: BMC_HWM_FAULT_LED_L */
/*F5*/ "BMC_SYS_FAULT_LED_L",
/*F6*/ "BMC_ASSERT_BIOS_WP_L",
/*F7*/ "",
/*G0-G7*/ "","","","","","","","",
/*H0-H7*/ "","","","","","","","",
/*I0-I7*/ "","","","","","","","",
/*J0-J7*/ "","","","","","","","",
/*K0-K7*/ "","","","","","","","",
/*L0-L7*/ "","","","","","","","",
/*M0-M7*/ "","","","","","","","",
/*N0-N7*/ "","","","","","","","",
/*O0-O7*/ "","","","","","","","",
/*P0-P7*/ "","","","","","","","",
/*Q0*/ "",
/*Q1*/ "",
/*Q2*/ "",
/*Q3*/ "",
/*Q4*/ "",
/*Q5*/ "",
/*Q6*/ "id-button", /* in: BMC_CHASSIS_ID_BTN_L */
/*Q7*/ "",
/*R0-R7*/ "","","","","","","","",
/*S0-S7*/ "","","","","","","","",
/*T0-T7*/ "","","","","","","","",
/*U0-U7*/ "","","","","","","","",
/*V0-V7*/ "","","","","","","","",
/*W0-W7*/ "","","","","","","","",
/*X0-X7*/ "","","","","","","","",
/*Y0-Y7*/ "","","","","","","","",
/*Z0-Z2*/ "","","",
/*Z3*/ "post-complete", /* BMC_SYS_MON_PWROK */
/*Z4-Z7*/ "","","","",
/*AA0*/ "",
/*AA1*/ "",
/*AA2*/ "",
/*AA3*/ "",
/*AA4*/ "",
/*AA5*/ "",
/*AA6*/ "",
/*AA7*/ "BMC_ASSERT_BMC_READY",
/*AB0*/ "BMC_SPD_SEL",
/*AB1-AB7*/ "","","","","","","";
};

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// SPDX-License-Identifier: GPL-2.0+
// Copyright (C) 2021 YADRO
/dts-v1/;
#include "aspeed-bmc-vegman.dtsi"
/ {
model = "YADRO VEGMAN N110 BMC";
compatible = "yadro,vegman-n110-bmc", "aspeed,ast2500";
};
&gpio {
status = "okay";
gpio-line-names =
/*A0-A7*/ "CHASSIS_INTRUSION","CASE_OPEN_FAULT_RST","","","SPEAKER_BMC","FM_FORCE_BMC_UPDATE","","",
/*B0-B7*/ "","","","","","","","",
/*C0-C7*/ "","","","","","","","",
/*D0-D7*/ "","","","","","","","",
/*E0-E7*/ "RESET_BUTTON","RESET_OUT","POWER_BUTTON","POWER_OUT","","","","",
/*F0-F7*/ "NMI_OUT","PCIE_NIC_ALERT","","","SKT0_FAULT_LED","","RST_RGMII_PHYRST_DNP","",
/*G0-G7*/ "CPU_ERR2","CPU_CATERR","PCH_BMC_THERMTRIP","","IRQ_NMI_EVENT","","","",
/*H0-H7*/ "PWRGD_P3V3_RISER1","PWRGD_P3V3_RISER2","PWRGD_P3V3_RISER3","","MIO_BIOS_SEL","_SPI_FLASH_HOLD","_SPI_FLASH_WP","FM_240VA_STATUS",
/*I0-I7*/ "","","","","","","","",
/*J0-J7*/ "","","","","","","","",
/*K0-K7*/ "","","","","","","","",
/*L0-L7*/ "","","","","","","","",
/*M0-M7*/ "","","","","","","","",
/*N0-N7*/ "","","","","","","","",
/*O0-O7*/ "","","","","","","","_SPI2_BMC_CS_SEL",
/*P0-P7*/ "","","","","","","","",
/*Q0-Q7*/ "","","","","","","","",
/*R0-R7*/ "_SPI_RMM4_LITE_CS","","","","","","","",
/*S0-S7*/ "_SPI2_BMC_CS1","","","IRQ_SML0_ALERT_MUX","FP_LED_STATUS_GREEN","FP_LED_STATUS_AMBER","FP_ID_LED","",
/*T0-T7*/ "","","","","","","","",
/*U0-U7*/ "","","","","","","","",
/*V0-V7*/ "","","","","","","","",
/*W0-W7*/ "","","","","","","","",
/*X0-X7*/ "","","","","","","","",
/*Y0-Y7*/ "SIO_S3","SIO_S5","","SIO_ONCONTROL","","","","",
/*Z0-Z7*/ "FM_BMC_PWR_BTN","SIO_POWER_GOOD","FM_BMC_PWRBTN_OUT","FM_BMC_PCH_SCI_LPC","","","","",
/*AA0-AA7*/ "","IRQ_SML1_PMBUS_ALERT","FM_PVCCIN_CPU0_PWR_IN_ALERT","FM_PVCCIN_CPU1_PWR_IN_ALERT","BMC_SYS_PWR_FAULT","BMC_SYS_PWR_OK","SMI","POST_COMPLETE",
/*AB0-AB7*/ "FM_CPU_BMCINIT","NMI_BUTTON","ID_BUTTON","PS_PWROK","","","","",
/*AC0-AC7*/ "","","","","","","","";
};
&sgpio {
ngpios = <80>;
bus-frequency = <2000000>;
status = "okay";
/* SGPIO lines. even: input, odd: output */
gpio-line-names =
/*A0-A7*/ "CPU1_PRESENCE","","CPU1_THERMTRIP","","CPU1_VRHOT","","CPU1_FIVR_FAULT","","CPU1_MEM_ABCD_VRHOT","","CPU1_MEM_EFGH_VRHOT","","","","","",
/*B0-B7*/ "CPU1_MISMATCH","","CPU1_MEM_THERM_EVENT","","CPU2_PRESENCE","","CPU2_THERMTRIP","","CPU2_VRHOT","","CPU2_FIVR_FAULT","","CPU2_MEM_ABCD_VRHOT","","CPU2_MEM_EFGH_VRHOT","",
/*C0-C7*/ "","","","","CPU2_MISMATCH","","CPU2_MEM_THERM_EVENT","","","","","","","","","",
/*D0-D7*/ "","","","","","","","","","","","","","","","",
/*E0-E7*/ "","","","","","","","","","","","","","","","",
/*F0-F7*/ "SGPIO_PLD_MINOR_REV_BIT0","","SGPIO_PLD_MINOR_REV_BIT1","","SGPIO_PLD_MINOR_REV_BIT2","","SGPIO_PLD_MINOR_REV_BIT3","","SGPIO_PLD_MAJOR_REV_BIT0","","SGPIO_PLD_MAJOR_REV_BIT1","","SGPIO_PLD_MAJOR_REV_BIT2","","SGPIO_PLD_MAJOR_REV_BIT3","",
/*G0-G7*/ "MAIN_PLD_MINOR_REV_BIT0","","MAIN_PLD_MINOR_REV_BIT1","","MAIN_PLD_MINOR_REV_BIT2","","MAIN_PLD_MINOR_REV_BIT3","","MAIN_PLD_MAJOR_REV_BIT0","","MAIN_PLD_MAJOR_REV_BIT1","","MAIN_PLD_MAJOR_REV_BIT2","","MAIN_PLD_MAJOR_REV_BIT3","",
/*H0-H7*/ "","","","","","","","","","","","","","","","",
/*I0-I7*/ "","","","","","","","","","","","","","","","",
/*J0-J7*/ "","","","","","","","","","","","","","","","";
};
&i2c11 {
/* SMB_BMC_MGMT_LVC3 */
gpio@21 {
compatible = "nxp,pcal9535";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
/*IO0.0-0.7*/ "", "", "", "", "", "", "PE_PCH_SCR_CLKREQ", "",
/*IO1.0-1.7*/ "", "PE_PCH_MEZ_PRSNT", "PE_PCH_MEZ_PRSNT_", "NIC_4_PE_PRSNT", "NIC_3_PE_PRSNT", "NIC_2_PE_PRSNT", "NIC_1_PE_PRSNT", "";
};
gpio@27 {
compatible = "nxp,pca9698";
reg = <0x27>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
/*IO0.0-0.7*/ "PWRGD_PS_PWROK", "PWRGD_DSW_PWROK", "PWRGD_P5V_AUX", "PWRGD_P3V3_AUX", "PWRGD_P5V", "PWRGD_P3V3", "PWRGD_P1V8_PCH_AUX", "PWRGD_PCH_PVNN_AUX",
/*IO1.0-1.7*/ "PWRGD_P1V05_PCH_AUX", "PWRGD_PCH_AUX_VRS", "PWRGD_PVCCIN_CPU0", "PWRGD_PVCCSA_CPU0", "PWRGD_PVCCIO_CPU0", "PWRGD_PVMCP_CPU0", "PWRGD_P1V0_CPU0", "PWRGD_PVDDQ_ABC_CPU0",
/*IO2.0-2.7*/ "PWRGD_PVPP_ABC_CPU0", "PWRGD_PVTT_ABC_CPU0", "PWRGD_PVDDQ_DEF_CPU0", "PWRGD_PVPP_DEF_CPU0", "PWRGD_PVTT_DEF_CPU0", "", "", "",
/*IO3.0-3.7*/ "", "", "", "", "", "", "", "",
/*IO4.0-4.7*/ "", "", "", "", "", "", "", "";
};
};
&i2c13 {
/* SMB_PCIE2_STBY_LVC3 */
mux-expa@73 {
compatible = "nxp,pca9545";
reg = <0x73>;
#address-cells = <1>;
#size-cells = <0>;
i2c-mux-idle-disconnect;
};
mux-sata@71 {
compatible = "nxp,pca9543";
reg = <0x71>;
#address-cells = <1>;
#size-cells = <0>;
i2c-mux-idle-disconnect;
};
};
&i2c2 {
/* SMB_PCIE_STBY_LVC3 */
mux-expb@71 {
compatible = "nxp,pca9545";
reg = <0x71>;
#address-cells = <1>;
#size-cells = <0>;
i2c-mux-idle-disconnect;
};
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
&pinctrl_pwm2_default &pinctrl_pwm3_default
&pinctrl_pwm4_default &pinctrl_pwm5_default>;
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00 0x06>;
};
fan@1 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x01 0x08>;
};
fan@2 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x02 0x09>;
};
fan@3 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x03 0x0A>;
};
fan@4 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x04 0x0B>;
};
fan@5 {
reg = <0x05>;
aspeed,fan-tach-ch = /bits/ 8 <0x05>;
};
};

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// SPDX-License-Identifier: GPL-2.0+
// Copyright (C) 2021 YADRO
/dts-v1/;
#include "aspeed-bmc-vegman.dtsi"
/ {
model = "YADRO VEGMAN Rx20 BMC";
compatible = "yadro,vegman-rx20-bmc", "aspeed,ast2500";
leds {
compatible = "gpio-leds";
temp_alarm {
label = "temp:red:status";
default-state = "off";
gpios = <&gpio ASPEED_GPIO(E, 4) GPIO_ACTIVE_LOW>;
};
temp_ok {
label = "temp:green:status";
default-state = "off";
gpios = <&gpio ASPEED_GPIO(E, 5) GPIO_ACTIVE_LOW>;
};
psu_fault {
label = "psu:red:status";
default-state = "off";
gpios = <&gpio ASPEED_GPIO(E, 6) GPIO_ACTIVE_LOW>;
};
psu_ok {
label = "psu:green:status";
default-state = "off";
gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_LOW>;
};
};
};
&gpio {
status = "okay";
gpio-line-names =
/*A0-A7*/ "CASE_OPEN_DNP","CASE_OPEN_FAULT_RST_DNP","BEZEL_ON_PWR_P3V3","PWM_PWRGD_EXP_EN","SPEAKER_BMC","FM_FORCE_BMC_UPDATE","","",
/*B0-B7*/ "","","","","","","","",
/*C0-C7*/ "","","","","","","","",
/*D0-D7*/ "","","","","","","","",
/*E0-E7*/ "RESET_BUTTON","RESET_OUT","POWER_BUTTON","POWER_OUT","LED_TEMP_STATUS_R","LED_TEMP_STATUS_G","LED_PWR_STATUS_R","LED_PWR_STATUS_G",
/*F0-F7*/ "NMI_OUT","CPU1_DISABLE_COD","","","SKT0_FAULT_LED_DNP","SKT1_FAULT_LED_DNP","RST_RGMII_PHYRST_DNP","",
/*G0-G7*/ "CPU_ERR2","CPU_CATERR","PCH_BMC_THERMTRIP","SPI_BMC_BOOT_HD","IRQ_NMI_EVENT","SPI_BMC_BOOT_WP","SPI_BMC_BOOT_WP1","",
/*H0-H7*/ "PWRGD_P3V3_RISER1","PWRGD_P3V3_RISER2","PWRGD_P3V3_RISER3","","MIO_BIOS_SEL","_SPI_FLASH_HOLD","_SPI_FLASH_WP","FM_240VA_STATUS",
/*I0-I7*/ "","","","","","","","",
/*J0-J7*/ "","","","","","","","",
/*K0-K7*/ "","","","","","","","",
/*L0-L7*/ "","","","","","","","",
/*M0-M7*/ "SEL_FLASH_SOFT","STATUS_SEL_BMC","","","BMC_WDT_P","ID_BUTTON","PS_PWROK","",
/*N0-N7*/ "","","","","","","","",
/*O0-O7*/ "","","","","","","","",
/*P0-P7*/ "","","","","","","SPI_BIOS_ACTIVE_FLASH_SEL","STATUS_SEL_BIOS",
/*Q0-Q7*/ "","","","","","","","",
/*R0-R7*/ "_SPI_BMC_BOOT_CS1","","","","","","","",
/*S0-S7*/ "_SPI2_BMC_CS1","RSR_A_SMBEXP_RST_INT","RSR_B_SMBEXP_RST_INT","IRQ_SML0_ALERT_MUX","FP_LED_STATUS_GREEN","FP_LED_STATUS_AMBER","FP_ID_LED","",
/*T0-T7*/ "","","","","","","","",
/*U0-U7*/ "","","","","","","","",
/*V0-V7*/ "","","","","","","","",
/*W0-W7*/ "","","","","","","","",
/*X0-X7*/ "","","","","","","","",
/*Y0-Y7*/ "SIO_S3","SIO_S5","","SIO_ONCONTROL","","","","",
/*Z0-Z7*/ "FM_BMC_PWR_BTN","SIO_POWER_GOOD","FM_BMC_PWRBTN_OUT","FM_BMC_PCH_SCI_LPC","","","","",
/*AA0-AA7*/ "CPU_CLK_MUX_SEL","IRQ_SML1_PMBUS_ALERT","FM_PVCCIN_CPU0_PWR_IN_ALERT","FM_PVCCIN_CPU1_PWR_IN_ALERT","BMC_SYS_PWR_FAULT","BMC_SYS_PWR_OK","SMI","POST_COMPLETE",
/*AB0-AB7*/ "FM_CPU_BMCINIT","NMI_BUTTON","BMC_WDT_RST1","BMC_WDT_RST2","","","","",
/*AC0-AC7*/ "","","","","","","","";
};
&sgpio {
ngpios = <80>;
bus-frequency = <2000000>;
status = "okay";
/* SGPIO lines. even: input, odd: output */
gpio-line-names =
/*A0-A7*/ "CPU1_PRESENCE","","CPU1_THERMTRIP","","CPU1_VRHOT","","CPU1_FIVR_FAULT","","CPU1_MEM_ABCD_VRHOT","","CPU1_MEM_EFGH_VRHOT","","","","","",
/*B0-B7*/ "CPU1_MISMATCH","","CPU1_MEM_THERM_EVENT","","CPU2_PRESENCE","","CPU2_THERMTRIP","","CPU2_VRHOT","","CPU2_FIVR_FAULT","","CPU2_MEM_ABCD_VRHOT","","CPU2_MEM_EFGH_VRHOT","",
/*C0-C7*/ "","","","","CPU2_MISMATCH","","CPU2_MEM_THERM_EVENT","","","","","","","","","",
/*D0-D7*/ "","","","","","","","","","","","","","","","",
/*E0-E7*/ "","","","","","","","","","","","","","","","",
/*F0-F7*/ "SGPIO_PLD_MINOR_REV_BIT0","","SGPIO_PLD_MINOR_REV_BIT1","","SGPIO_PLD_MINOR_REV_BIT2","","SGPIO_PLD_MINOR_REV_BIT3","","SGPIO_PLD_MAJOR_REV_BIT0","","SGPIO_PLD_MAJOR_REV_BIT1","","SGPIO_PLD_MAJOR_REV_BIT2","","SGPIO_PLD_MAJOR_REV_BIT3","",
/*G0-G7*/ "MAIN_PLD_MINOR_REV_BIT0","","MAIN_PLD_MINOR_REV_BIT1","","MAIN_PLD_MINOR_REV_BIT2","","MAIN_PLD_MINOR_REV_BIT3","","MAIN_PLD_MAJOR_REV_BIT0","","MAIN_PLD_MAJOR_REV_BIT1","","MAIN_PLD_MAJOR_REV_BIT2","","MAIN_PLD_MAJOR_REV_BIT3","",
/*H0-H7*/ "","","","","","","","","","","","","","","","",
/*I0-I7*/ "","","","","","","","","","","","","","","","",
/*J0-J7*/ "","","","","","","","","","","","","","","","";
};
&i2c11 {
/* SMB_BMC_MGMT_LVC3 */
gpio@21 {
compatible = "nxp,pcal9535";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
/*IO0.0-0.7*/ "ETH3_CLK_REQ", "ETH2_CLK_REQ", "RSR_A_PCIE_X16_2_PRSNT", "RSR_B_PCIE_X16_2_PRSNT", "", "RSR_B_PCIE_X8_3_PRSNT", "RSR_B_PCIE_X8_4_PRSNT", "RSR_B_PCIE_X16_PRSNT_N",
/*IO1.0-1.7*/ "RSR_B_PCIE_X8_2_PRSNT", "RSR_B_PCIE_X8_1_PRSNT", "NIC_1_PE_BUF_PRSNT", "RSR_A_PCIE_X16_PRSNT", "RSR_A_PCIE_X8_3_PRSNT", "RSR_A_PCIE_X8_2_PRSNT", "RSR_A_PCIE_X8_1_PRSNT_N", "";
};
gpio@23 {
compatible = "nxp,pcal9535";
reg = <0x23>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
/*IO0.0-0.7*/ "FM_LINK_WIDTH_ID0", "FM_LINK_WIDTH_ID0", "FM_LINK_WIDTH_ID0", "FM_LINK_WIDTH_ID0", "FM_LINK_WIDTH_ID0", "", "", "",
/*IO1.0-1.7*/ "", "", "", "", "", "", "", "";
};
gpio@27 {
compatible = "nxp,pca9698";
reg = <0x27>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
/*IO0.0-0.7*/ "PWRGD_PS_PWROK", "PWRGD_DSW_PWROK", "PWRGD_P5V_AUX", "PWRGD_P3V3_AUX", "PWRGD_P5V", "PWRGD_P3V3", "PWRGD_P1V8_PCH_AUX", "PWRGD_PCH_PVNN_AUX",
/*IO1.0-1.7*/ "PWRGD_P1V05_PCH_AUX", "PWRGD_PCH_AUX_VRS", "PWRGD_PVCCIN_CPU0", "PWRGD_PVCCSA_CPU0", "PWRGD_PVCCIO_CPU0", "PWRGD_PVMCP_CPU0", "PWRGD_P1V0_CPU0", "PWRGD_PVDDQ_ABC_CPU0",
/*IO2.0-2.7*/ "PWRGD_PVPP_ABC_CPU0", "PWRGD_PVTT_ABC_CPU0", "PWRGD_PVDDQ_DEF_CPU0", "PWRGD_PVPP_DEF_CPU0", "PWRGD_PVTT_DEF_CPU0", "PWRGD_PVCCIN_CPU1", "PWRGD_PVCCSA_CPU1", "PWRGD_PVCCIO_CPU1",
/*IO3.0-3.7*/ "PWRGD_PVMCP_CPU1", "PWRGD_P1V0_CPU1", "PWRGD_PVDDQ_GHJ_CPU1", "PWRGD_PVPP_GHJ_CPU1", "PWRGD_PVTT_GHJ_CPU1", "PWRGD_PVDDQ_KLM_CPU1", "PWRGD_PVPP_KLM_CPU1", "PWRGD_PVTT_KLM_CPU1",
/*IO4.0-4.7*/ "PCH_PWR_RESET_N", "FM_BOARD_SKU_ID0", "FM_BOARD_SKU_ID1", "FM_BOARD_SKU_ID2", "FM_BOARD_SKU_ID3", "FM_BOARD_SKU_ID4", "FM_BOARD_REV_ID0", "FM_BOARD_REV_ID1";
};
gpio@39 {
compatible = "nxp,pca9554";
reg = <0x39>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
/*IO0.0-0.7*/ "FAN_FAULT_0", "FAN_FAULT_1", "FAN_FAULT_2", "FAN_FAULT_3", "FAN_FAULT_4", "FAN_FAULT_5", "FAN_FAULT_6", "";
};
};
&i2c13 {
/* SMB_PCIE2_STBY_LVC3 */
mux-expa@70 {
compatible = "nxp,pca9548";
reg = <0x70>;
#address-cells = <1>;
#size-cells = <0>;
i2c-mux-idle-disconnect;
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
rsra-mux@72 {
compatible = "nxp,pca9548";
reg = <0x72>;
#address-cells = <1>;
#size-cells = <0>;
i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
at24@50 {
compatible = "atmel,24c64";
reg = <0x50>;
pagesize = <32>;
size = <8192>;
address-width = <16>;
};
};
};
};
};
mux-sata@71 {
compatible = "nxp,pca9543";
reg = <0x71>;
#address-cells = <1>;
#size-cells = <0>;
i2c-mux-idle-disconnect;
};
};
&i2c2 {
/* SMB_PCIE_STBY_LVC3 */
mux-expb@71 {
compatible = "nxp,pca9548";
reg = <0x71>;
#address-cells = <1>;
#size-cells = <0>;
i2c-mux-idle-disconnect;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
rsrb-mux@72 {
compatible = "nxp,pca9548";
reg = <0x72>;
#address-cells = <1>;
#size-cells = <0>;
i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
at24@50 {
compatible = "atmel,24c64";
reg = <0x50>;
pagesize = <32>;
size = <8192>;
address-width = <16>;
};
};
};
at24@50 {
compatible = "atmel,24c64";
reg = <0x50>;
pagesize = <32>;
size = <8192>;
address-width = <16>;
};
};
};
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
&pinctrl_pwm2_default &pinctrl_pwm3_default
&pinctrl_pwm4_default &pinctrl_pwm5_default
&pinctrl_pwm6_default>;
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00 0x07>;
};
fan@1 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x01 0x08>;
};
fan@2 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x02 0x09>;
};
fan@3 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x03 0x0A>;
};
fan@4 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x04 0x0B>;
};
fan@5 {
reg = <0x05>;
aspeed,fan-tach-ch = /bits/ 8 <0x05 0x0C>;
};
fan@6 {
reg = <0x06>;
aspeed,fan-tach-ch = /bits/ 8 <0x06 0x0D>;
};
};

154
arch/arm/boot/dts/aspeed-bmc-vegman-sx20.dts Normal file
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@ -0,0 +1,154 @@
// SPDX-License-Identifier: GPL-2.0+
// Copyright (C) 2021 YADRO
/dts-v1/;
#include "aspeed-bmc-vegman.dtsi"
/ {
model = "YADRO VEGMAN Sx20 BMC";
compatible = "yadro,vegman-sx20-bmc", "aspeed,ast2500";
};
&gpio {
status = "okay";
gpio-line-names =
/*A0-A7*/ "CHASSIS_INTRUSION","CASE_OPEN_FAULT_RST","","","SPEAKER_BMC","FM_FORCE_BMC_UPDATE","","",
/*B0-B7*/ "","","","","","","","",
/*C0-C7*/ "","","","","","","","",
/*D0-D7*/ "","","","","","","","",
/*E0-E7*/ "RESET_BUTTON","RESET_OUT","POWER_BUTTON","POWER_OUT","","","","",
/*F0-F7*/ "NMI_OUT","CPU1_DISABLE_COD","","","SKT0_FAULT_LED","SKT1_FAULT_LED","RST_RGMII_PHYRST_DNP","",
/*G0-G7*/ "CPU_ERR2","CPU_CATERR","PCH_BMC_THERMTRIP","","IRQ_NMI_EVENT","","","",
/*H0-H7*/ "PWRGD_P3V3_RISER1","PWRGD_P3V3_RISER2","PWRGD_P3V3_RISER3","","MIO_BIOS_SEL","_SPI_FLASH_HOLD","_SPI_FLASH_WP","FM_240VA_STATUS",
/*I0-I7*/ "","","","","","","","",
/*J0-J7*/ "","","","","","","","",
/*K0-K7*/ "","","","","","","","",
/*L0-L7*/ "","","","","","","","",
/*M0-M7*/ "","","","","BMC_GPU_RISER_ID1","BMC_GPU_RISER_ID0","","",
/*N0-N7*/ "","","","","","","","",
/*O0-O7*/ "","","","","","","","_SPI2_BMC_CS_SEL",
/*P0-P7*/ "","P12V_HDDS_A_EN","P12V_HDDS_B_EN","P5V_HDDS_A_EN","PWRGD_P5V_HDDS_A","P5V_HDDS_B_EN","PWRGD_P5V_HDDS_B","",
/*Q0-Q7*/ "","","","","","","","",
/*R0-R7*/ "_SPI_RMM4_LITE_CS","","","","","","","",
/*S0-S7*/ "_SPI2_BMC_CS1","","","IRQ_SML0_ALERT_MUX","FP_LED_STATUS_GREEN","FP_LED_STATUS_AMBER","FP_ID_LED","",
/*T0-T7*/ "","","","","","","","",
/*U0-U7*/ "","","","","","","","",
/*V0-V7*/ "","","","","","","","",
/*W0-W7*/ "","","","","","","","",
/*X0-X7*/ "","","","","","","","",
/*Y0-Y7*/ "SIO_S3","SIO_S5","","SIO_ONCONTROL","","","","",
/*Z0-Z7*/ "FM_BMC_PWR_BTN","SIO_POWER_GOOD","FM_BMC_PWRBTN_OUT","FM_BMC_PCH_SCI_LPC","","","","",
/*AA0-AA7*/ "CPU_CLK_MUX_SEL","IRQ_SML1_PMBUS_ALERT","FM_PVCCIN_CPU0_PWR_IN_ALERT","FM_PVCCIN_CPU1_PWR_IN_ALERT","BMC_SYS_PWR_FAULT","BMC_SYS_PWR_OK","SMI","POST_COMPLETE",
/*AB0-AB7*/ "FM_CPU_BMCINIT","NMI_BUTTON","ID_BUTTON","PS_PWROK","","","","",
/*AC0-AC7*/ "","","","","","","","";
};
&sgpio {
ngpios = <80>;
bus-frequency = <2000000>;
status = "okay";
/* SGPIO lines. even: input, odd: output */
gpio-line-names =
/*A0-A7*/ "CPU1_PRESENCE","","CPU1_THERMTRIP","","CPU1_VRHOT","","CPU1_FIVR_FAULT","","CPU1_MEM_ABCD_VRHOT","","CPU1_MEM_EFGH_VRHOT","","","","","",
/*B0-B7*/ "CPU1_MISMATCH","","CPU1_MEM_THERM_EVENT","","CPU2_PRESENCE","","CPU2_THERMTRIP","","CPU2_VRHOT","","CPU2_FIVR_FAULT","","CPU2_MEM_ABCD_VRHOT","","CPU2_MEM_EFGH_VRHOT","",
/*C0-C7*/ "","","","","CPU2_MISMATCH","","CPU2_MEM_THERM_EVENT","","","","","","","","","",
/*D0-D7*/ "","","","","","","","","","","","","","","","",
/*E0-E7*/ "","","","","","","","","","","","","","","","",
/*F0-F7*/ "SGPIO_PLD_MINOR_REV_BIT0","","SGPIO_PLD_MINOR_REV_BIT1","","SGPIO_PLD_MINOR_REV_BIT2","","SGPIO_PLD_MINOR_REV_BIT3","","SGPIO_PLD_MAJOR_REV_BIT0","","SGPIO_PLD_MAJOR_REV_BIT1","","SGPIO_PLD_MAJOR_REV_BIT2","","SGPIO_PLD_MAJOR_REV_BIT3","",
/*G0-G7*/ "MAIN_PLD_MINOR_REV_BIT0","","MAIN_PLD_MINOR_REV_BIT1","","MAIN_PLD_MINOR_REV_BIT2","","MAIN_PLD_MINOR_REV_BIT3","","MAIN_PLD_MAJOR_REV_BIT0","","MAIN_PLD_MAJOR_REV_BIT1","","MAIN_PLD_MAJOR_REV_BIT2","","MAIN_PLD_MAJOR_REV_BIT3","",
/*H0-H7*/ "","","","","","","","","","","","","","","","",
/*I0-I7*/ "","","","","","","","","","","","","","","","",
/*J0-J7*/ "","","","","","","","","","","","","","","","";
};
&i2c11 {
/* SMB_BMC_MGMT_LVC3 */
gpio@21 {
compatible = "nxp,pcal9535";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
/*IO0.0-0.7*/ "", "", "CPU1_PE3_0_SLOT_PRSNT", "", "CPU1_PE1_GPU_PRSNT", "CPU1_PE3_1_SLOT_PRSNT", "PE_PCH_MEZ_PRSNT", "CPU0_PE3_1_SLOT_PRSNT",
/*IO1.0-1.7*/ "CPU0_PE1_GPU_PRSNT", "CPU0_PE2_NVME2_PRSNT", "CPU1_PE2_NVME3_PRSNT", "CPU1_PE2_SLOT_PRSNT", "CPU1_PE2_NVME4_PRSNT", "", "CPU0_PE2_NVME1_PRSNT", "CPU0_PE3_0_RAID_PRSNT";
};
gpio@27 {
compatible = "nxp,pca9698";
reg = <0x27>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
/*IO0.0-0.7*/ "PWRGD_PS_PWROK", "PWRGD_DSW_PWROK", "PWRGD_P5V_AUX", "PWRGD_P3V3_AUX", "PWRGD_P5V", "PWRGD_P3V3", "PWRGD_P1V8_PCH_AUX", "PWRGD_PCH_PVNN_AUX",
/*IO1.0-1.7*/ "PWRGD_P1V05_PCH_AUX", "PWRGD_PCH_AUX_VRS", "PWRGD_PVCCIN_CPU0", "PWRGD_PVCCSA_CPU0", "PWRGD_PVCCIO_CPU0", "PWRGD_PVMCP_CPU0", "PWRGD_P1V0_CPU0", "PWRGD_PVDDQ_ABC_CPU0",
/*IO2.0-2.7*/ "PWRGD_PVPP_ABC_CPU0", "PWRGD_PVTT_ABC_CPU0", "PWRGD_PVDDQ_DEF_CPU0", "PWRGD_PVPP_DEF_CPU0", "PWRGD_PVTT_DEF_CPU0", "PWRGD_PVCCIN_CPU1", "PWRGD_PVCCSA_CPU1", "PWRGD_PVCCIO_CPU1",
/*IO3.0-3.7*/ "PWRGD_PVMCP_CPU1", "PWRGD_P1V0_CPU1", "PWRGD_PVDDQ_GHJ_CPU1", "PWRGD_PVPP_GHJ_CPU1", "PWRGD_PVTT_GHJ_CPU1", "PWRGD_PVDDQ_KLM_CPU1", "PWRGD_PVPP_KLM_CPU1", "PWRGD_PVTT_KLM_CPU1",
/*IO4.0-4.7*/ "PWRGD_P5V_HDDS_A_R", "PWRGD_P5V_HDDS_B_R", "", "", "", "", "", "";
};
};
&i2c13 {
/* SMB_PCIE2_STBY_LVC3 */
mux-expa@73 {
compatible = "nxp,pca9545";
reg = <0x73>;
#address-cells = <1>;
#size-cells = <0>;
i2c-mux-idle-disconnect;
};
mux-sata@71 {
compatible = "nxp,pca9543";
reg = <0x71>;
#address-cells = <1>;
#size-cells = <0>;
i2c-mux-idle-disconnect;
};
};
&i2c2 {
/* SMB_PCIE_STBY_LVC3 */
mux-expb@71 {
compatible = "nxp,pca9545";
reg = <0x71>;
#address-cells = <1>;
#size-cells = <0>;
i2c-mux-idle-disconnect;
};
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
&pinctrl_pwm2_default &pinctrl_pwm3_default
&pinctrl_pwm4_default &pinctrl_pwm5_default
&pinctrl_pwm6_default>;
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00>;
};
fan@1 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x01>;
};
fan@2 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x02>;
};
fan@3 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x03>;
};
fan@4 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x04>;
};
fan@5 {
reg = <0x05>;
aspeed,fan-tach-ch = /bits/ 8 <0x05>;
};
fan@6 {
reg = <0x06>;
aspeed,fan-tach-ch = /bits/ 8 <0x06>;
};
};

311
arch/arm/boot/dts/aspeed-bmc-vegman.dtsi Normal file
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// SPDX-License-Identifier: GPL-2.0+
// Copyright (C) 2021 YADRO
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
/ {
aliases {
serial4 = &uart5;
};
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
};
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
video_engine_memory: jpegbuffer {
size = <0x02000000>; /* 32M */
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
ramoops@9eff0000{
compatible = "ramoops";
reg = <0x9eff0000 0x10000>;
record-size = <0x2000>;
console-size = <0x2000>;
};
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
<&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
<&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>;
};
leds {
compatible = "gpio-leds";
identify {
label = "platform:blue:indicator";
linux,default-trigger = "heartbeat";
gpios = <&gpio ASPEED_GPIO(S, 6) GPIO_ACTIVE_LOW>;
};
status_amber {
label = "platform:red:status";
default-state = "off";
gpios = <&gpio ASPEED_GPIO(S, 5) GPIO_ACTIVE_LOW>;
};
status_green {
label = "platform:green:status";
default-state = "off";
gpios = <&gpio ASPEED_GPIO(S, 4) GPIO_ACTIVE_LOW>;
};
power_fault {
label = "platform:red:power";
default-state = "off";
gpios = <&gpio ASPEED_GPIO(AA, 4) GPIO_ACTIVE_LOW>;
};
power_ok {
label = "platform:green:power";
default-state = "off";
gpios = <&gpio ASPEED_GPIO(AA, 5) GPIO_ACTIVE_LOW>;
};
};
beeper {
compatible = "pwm-beeper";
pwms = <&timer 5 1000000 0>;
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
label = "bmc";
m25p,fast-read;
#include "openbmc-flash-layout-64.dtsi"
};
};
&spi2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2ck_default
&pinctrl_spi2miso_default
&pinctrl_spi2mosi_default
&pinctrl_spi2cs0_default>;
flash@0 {
status = "okay";
label = "bios";
m25p,fast-read;
};
};
&mac0 {
status = "okay";
use-ncsi;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
};
&mac1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
phy-mode = "rgmii";
phy-handle = <&phy>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy: ethernet-phy@1 {
/* KSZ9131 */
compatible = "ethernet-phy-id0022.1640";
reg = <1>;
micrel,led-mode = <0>;
};
};
};
&vhub {
status = "okay";
};
&adc {
status = "okay";
};
&video {
status = "okay";
memory-region = <&video_engine_memory>;
};
&sdmmc {
status = "okay";
};
&sdhci1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sd2_default>;
disable-wp;
};
&timer {
fttmr010,pwm-outputs = <5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_timer5_default>;
#pwm-cells = <3>;
status = "okay";
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default
&pinctrl_nrts1_default
&pinctrl_ndtr1_default
&pinctrl_ndsr1_default
&pinctrl_ncts1_default
&pinctrl_ndcd1_default
&pinctrl_nri1_default>;
};
&uart5 {
status = "okay";
};
&vuart {
status = "okay";
};
&kcs3 {
aspeed,lpc-io-reg = <0xCA2>;
status = "okay";
};
&kcs4 {
aspeed,lpc-io-reg = <0xCA4>;
status = "okay";
};
&lpc_snoop {
snoop-ports = <0x80>;
status = "okay";
};
&uart_routing {
status = "okay";
};
&uart2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <>;
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <>;
};
&i2c0 {
/* SMB_IPMB_STBY_LVC3 */
multi-master;
status = "okay";
};
&i2c1 {
/* SMB_CHASSENSOR_STBY_LVC3 */
status = "okay";
};
&i2c2 {
/* SMB_PCIE_STBY_LVC3 */
status = "okay";
};
&i2c3 {
/* SMB_HOST_STBY_LVC3 */
multi-master;
status = "okay";
};
&i2c4 {
/* BMC_PMBUS2_STBY */
status = "okay";
};
&i2c5 {
/* SMB_SMLINK0_STBY_LVC3 */
bus-frequency = <1000000>;
multi-master;
status = "okay";
};
&i2c6 {
/* SMB_TEMPSENSOR_STBY_LVC3 */
multi-master;
status = "okay";
};
&i2c7 {
/* SMB_SM_PMB1_SML1_STBY_LVC3 */
multi-master;
status = "okay";
};
&i2c9 {
/* SMB_BMC_ETH3_LVC3 */
status = "okay";
};
&i2c10 {
/* SMB_BMC_ETH2_LVC3 */
status = "okay";
};
&i2c11 {
/* SMB_BMC_MGMT_LVC3 */
status = "okay";
at24@50 {
compatible = "atmel,24c64";
reg = <0x50>;
pagesize = <32>;
size = <8192>;
address-width = <16>;
};
};
&i2c12 {
/* SMB_BMC_FAULT_EXP_LVC3 */
status = "okay";
};
&i2c13 {
/* SMB_PCIE2_STBY_LVC3 */
status = "okay";
};

1
arch/arm/boot/dts/aspeed-g4.dtsi
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@ -381,6 +381,7 @@
compatible = "aspeed,ast2400-ibt-bmc";
reg = <0x140 0x18>;
interrupts = <8>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};

5
arch/arm/boot/dts/aspeed-g5.dtsi
View File

@ -446,6 +446,7 @@
compatible = "aspeed,ast2500-kcs-bmc-v2";
reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
interrupts = <8>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};
@ -453,6 +454,7 @@
compatible = "aspeed,ast2500-kcs-bmc-v2";
reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
interrupts = <8>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};
@ -460,6 +462,7 @@
compatible = "aspeed,ast2500-kcs-bmc-v2";
reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
interrupts = <8>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};
@ -467,6 +470,7 @@
compatible = "aspeed,ast2500-kcs-bmc-v2";
reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>;
interrupts = <8>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};
@ -507,6 +511,7 @@
compatible = "aspeed,ast2500-ibt-bmc";
reg = <0x140 0x18>;
interrupts = <8>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};
};

10
arch/arm/boot/dts/aspeed-g6.dtsi
View File

@ -384,6 +384,11 @@
status = "disabled";
};
sbc: secure-boot-controller@1e6f2000 {
compatible = "aspeed,ast2600-sbc";
reg = <0x1e6f2000 0x1000>;
};
gpio0: gpio@1e780000 {
#gpio-cells = <2>;
gpio-controller;
@ -520,6 +525,7 @@
compatible = "aspeed,ast2500-kcs-bmc-v2";
reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
kcs_chan = <1>;
status = "disabled";
};
@ -528,6 +534,7 @@
compatible = "aspeed,ast2500-kcs-bmc-v2";
reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};
@ -535,6 +542,7 @@
compatible = "aspeed,ast2500-kcs-bmc-v2";
reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};
@ -542,6 +550,7 @@
compatible = "aspeed,ast2500-kcs-bmc-v2";
reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>;
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};
@ -581,6 +590,7 @@
compatible = "aspeed,ast2600-ibt-bmc";
reg = <0x140 0x18>;
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};
};

35
arch/arm/boot/dts/openbmc-flash-layout-64-alt.dtsi Normal file
View File

@ -0,0 +1,35 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2020 Bytedance.
*/
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
u-boot@0 {
reg = <0x0 0xe0000>; // 896KB
label = "alt-u-boot";
};
u-boot-env@e0000 {
reg = <0xe0000 0x20000>; // 128KB
label = "alt-u-boot-env";
};
kernel@100000 {
reg = <0x100000 0x900000>; // 9MB
label = "alt-kernel";
};
rofs@a00000 {
reg = <0xa00000 0x2000000>; // 32MB
label = "alt-rofs";
};
rwfs@6000000 {
reg = <0x2a00000 0x1600000>; // 22MB
label = "alt-rwfs";
};
};