Merge branch 'topic/get-cpu-var' into next
This commit is contained in:
commit
dd521d1eb4
@ -21,7 +21,12 @@ DECLARE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
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#define __ARCH_IRQ_STAT
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#define local_softirq_pending() __get_cpu_var(irq_stat).__softirq_pending
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#define local_softirq_pending() __this_cpu_read(irq_stat.__softirq_pending)
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#define __ARCH_SET_SOFTIRQ_PENDING
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#define set_softirq_pending(x) __this_cpu_write(irq_stat.__softirq_pending, (x))
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#define or_softirq_pending(x) __this_cpu_or(irq_stat.__softirq_pending, (x))
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static inline void ack_bad_irq(unsigned int irq)
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{
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@ -107,14 +107,14 @@ extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);
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static inline void arch_enter_lazy_mmu_mode(void)
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{
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struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
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struct ppc64_tlb_batch *batch = this_cpu_ptr(&ppc64_tlb_batch);
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batch->active = 1;
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}
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static inline void arch_leave_lazy_mmu_mode(void)
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{
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struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
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struct ppc64_tlb_batch *batch = this_cpu_ptr(&ppc64_tlb_batch);
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if (batch->index)
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__flush_tlb_pending(batch);
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@ -98,7 +98,7 @@ DECLARE_PER_CPU(struct xics_cppr, xics_cppr);
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static inline void xics_push_cppr(unsigned int vec)
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{
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struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
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struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
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if (WARN_ON(os_cppr->index >= MAX_NUM_PRIORITIES - 1))
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return;
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@ -111,7 +111,7 @@ static inline void xics_push_cppr(unsigned int vec)
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static inline unsigned char xics_pop_cppr(void)
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{
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struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
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struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
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if (WARN_ON(os_cppr->index < 1))
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return LOWEST_PRIORITY;
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@ -121,7 +121,7 @@ static inline unsigned char xics_pop_cppr(void)
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static inline void xics_set_base_cppr(unsigned char cppr)
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{
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struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
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struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
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/* we only really want to set the priority when there's
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* just one cppr value on the stack
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@ -133,7 +133,7 @@ static inline void xics_set_base_cppr(unsigned char cppr)
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static inline unsigned char xics_cppr_top(void)
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{
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struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
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struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
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return os_cppr->stack[os_cppr->index];
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}
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@ -41,7 +41,7 @@ void doorbell_exception(struct pt_regs *regs)
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may_hard_irq_enable();
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__get_cpu_var(irq_stat).doorbell_irqs++;
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__this_cpu_inc(irq_stat.doorbell_irqs);
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smp_ipi_demux();
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@ -63,7 +63,7 @@ int hw_breakpoint_slots(int type)
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int arch_install_hw_breakpoint(struct perf_event *bp)
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{
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struct arch_hw_breakpoint *info = counter_arch_bp(bp);
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struct perf_event **slot = &__get_cpu_var(bp_per_reg);
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struct perf_event **slot = this_cpu_ptr(&bp_per_reg);
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*slot = bp;
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@ -88,7 +88,7 @@ int arch_install_hw_breakpoint(struct perf_event *bp)
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*/
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void arch_uninstall_hw_breakpoint(struct perf_event *bp)
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{
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struct perf_event **slot = &__get_cpu_var(bp_per_reg);
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struct perf_event **slot = this_cpu_ptr(&bp_per_reg);
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if (*slot != bp) {
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WARN_ONCE(1, "Can't find the breakpoint");
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@ -226,7 +226,7 @@ int __kprobes hw_breakpoint_handler(struct die_args *args)
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*/
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rcu_read_lock();
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bp = __get_cpu_var(bp_per_reg);
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bp = __this_cpu_read(bp_per_reg);
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if (!bp)
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goto out;
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info = counter_arch_bp(bp);
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@ -208,7 +208,7 @@ static unsigned long iommu_range_alloc(struct device *dev,
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* We don't need to disable preemption here because any CPU can
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* safely use any IOMMU pool.
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*/
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pool_nr = __raw_get_cpu_var(iommu_pool_hash) & (tbl->nr_pools - 1);
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pool_nr = __this_cpu_read(iommu_pool_hash) & (tbl->nr_pools - 1);
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if (largealloc)
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pool = &(tbl->large_pool);
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@ -114,7 +114,7 @@ static inline notrace void set_soft_enabled(unsigned long enable)
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static inline notrace int decrementer_check_overflow(void)
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{
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u64 now = get_tb_or_rtc();
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u64 *next_tb = &__get_cpu_var(decrementers_next_tb);
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u64 *next_tb = this_cpu_ptr(&decrementers_next_tb);
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return now >= *next_tb;
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}
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@ -499,7 +499,7 @@ void __do_irq(struct pt_regs *regs)
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/* And finally process it */
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if (unlikely(irq == NO_IRQ))
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__get_cpu_var(irq_stat).spurious_irqs++;
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__this_cpu_inc(irq_stat.spurious_irqs);
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else
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generic_handle_irq(irq);
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@ -155,7 +155,7 @@ static int kgdb_singlestep(struct pt_regs *regs)
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{
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struct thread_info *thread_info, *exception_thread_info;
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struct thread_info *backup_current_thread_info =
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&__get_cpu_var(kgdb_thread_info);
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this_cpu_ptr(&kgdb_thread_info);
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if (user_mode(regs))
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return 0;
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@ -119,7 +119,7 @@ static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb)
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static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb)
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{
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__get_cpu_var(current_kprobe) = kcb->prev_kprobe.kp;
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__this_cpu_write(current_kprobe, kcb->prev_kprobe.kp);
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kcb->kprobe_status = kcb->prev_kprobe.status;
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kcb->kprobe_saved_msr = kcb->prev_kprobe.saved_msr;
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}
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@ -127,7 +127,7 @@ static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb)
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static void __kprobes set_current_kprobe(struct kprobe *p, struct pt_regs *regs,
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struct kprobe_ctlblk *kcb)
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{
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__get_cpu_var(current_kprobe) = p;
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__this_cpu_write(current_kprobe, p);
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kcb->kprobe_saved_msr = regs->msr;
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}
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@ -192,7 +192,7 @@ static int __kprobes kprobe_handler(struct pt_regs *regs)
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ret = 1;
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goto no_kprobe;
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}
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p = __get_cpu_var(current_kprobe);
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p = __this_cpu_read(current_kprobe);
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if (p->break_handler && p->break_handler(p, regs)) {
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goto ss_probe;
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}
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@ -73,8 +73,8 @@ void save_mce_event(struct pt_regs *regs, long handled,
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uint64_t nip, uint64_t addr)
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{
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uint64_t srr1;
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int index = __get_cpu_var(mce_nest_count)++;
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struct machine_check_event *mce = &__get_cpu_var(mce_event[index]);
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int index = __this_cpu_inc_return(mce_nest_count);
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struct machine_check_event *mce = this_cpu_ptr(&mce_event[index]);
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/*
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* Return if we don't have enough space to log mce event.
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@ -143,7 +143,7 @@ void save_mce_event(struct pt_regs *regs, long handled,
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*/
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int get_mce_event(struct machine_check_event *mce, bool release)
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{
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int index = __get_cpu_var(mce_nest_count) - 1;
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int index = __this_cpu_read(mce_nest_count) - 1;
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struct machine_check_event *mc_evt;
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int ret = 0;
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@ -153,7 +153,7 @@ int get_mce_event(struct machine_check_event *mce, bool release)
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/* Check if we have MCE info to process. */
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if (index < MAX_MC_EVT) {
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mc_evt = &__get_cpu_var(mce_event[index]);
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mc_evt = this_cpu_ptr(&mce_event[index]);
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/* Copy the event structure and release the original */
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if (mce)
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*mce = *mc_evt;
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@ -163,7 +163,7 @@ int get_mce_event(struct machine_check_event *mce, bool release)
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}
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/* Decrement the count to free the slot. */
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if (release)
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__get_cpu_var(mce_nest_count)--;
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__this_cpu_dec(mce_nest_count);
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return ret;
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}
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@ -184,13 +184,13 @@ void machine_check_queue_event(void)
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if (!get_mce_event(&evt, MCE_EVENT_RELEASE))
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return;
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index = __get_cpu_var(mce_queue_count)++;
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index = __this_cpu_inc_return(mce_queue_count);
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/* If queue is full, just return for now. */
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if (index >= MAX_MC_EVT) {
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__get_cpu_var(mce_queue_count)--;
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__this_cpu_dec(mce_queue_count);
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return;
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}
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__get_cpu_var(mce_event_queue[index]) = evt;
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memcpy(this_cpu_ptr(&mce_event_queue[index]), &evt, sizeof(evt));
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/* Queue irq work to process this event later. */
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irq_work_queue(&mce_event_process_work);
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@ -208,11 +208,11 @@ static void machine_check_process_queued_event(struct irq_work *work)
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* For now just print it to console.
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* TODO: log this error event to FSP or nvram.
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*/
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while (__get_cpu_var(mce_queue_count) > 0) {
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index = __get_cpu_var(mce_queue_count) - 1;
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while (__this_cpu_read(mce_queue_count) > 0) {
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index = __this_cpu_read(mce_queue_count) - 1;
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machine_check_print_event_info(
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&__get_cpu_var(mce_event_queue[index]));
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__get_cpu_var(mce_queue_count)--;
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this_cpu_ptr(&mce_event_queue[index]));
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__this_cpu_dec(mce_queue_count);
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}
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}
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@ -499,7 +499,7 @@ static inline int set_dawr(struct arch_hw_breakpoint *brk)
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void __set_breakpoint(struct arch_hw_breakpoint *brk)
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{
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__get_cpu_var(current_brk) = *brk;
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memcpy(this_cpu_ptr(¤t_brk), brk, sizeof(*brk));
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if (cpu_has_feature(CPU_FTR_DAWR))
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set_dawr(brk);
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@ -842,7 +842,7 @@ struct task_struct *__switch_to(struct task_struct *prev,
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* schedule DABR
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*/
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#ifndef CONFIG_HAVE_HW_BREAKPOINT
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if (unlikely(!hw_brk_match(&__get_cpu_var(current_brk), &new->thread.hw_brk)))
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if (unlikely(!hw_brk_match(this_cpu_ptr(¤t_brk), &new->thread.hw_brk)))
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__set_breakpoint(&new->thread.hw_brk);
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#endif /* CONFIG_HAVE_HW_BREAKPOINT */
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#endif
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@ -856,7 +856,7 @@ struct task_struct *__switch_to(struct task_struct *prev,
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* Collect processor utilization data per process
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*/
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if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
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struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array);
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struct cpu_usage *cu = this_cpu_ptr(&cpu_usage_array);
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long unsigned start_tb, current_tb;
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start_tb = old_thread->start_tb;
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cu->current_tb = current_tb = mfspr(SPRN_PURR);
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@ -866,7 +866,7 @@ struct task_struct *__switch_to(struct task_struct *prev,
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#endif /* CONFIG_PPC64 */
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#ifdef CONFIG_PPC_BOOK3S_64
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batch = &__get_cpu_var(ppc64_tlb_batch);
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batch = this_cpu_ptr(&ppc64_tlb_batch);
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if (batch->active) {
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current_thread_info()->local_flags |= _TLF_LAZY_MMU;
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if (batch->index)
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@ -889,7 +889,7 @@ struct task_struct *__switch_to(struct task_struct *prev,
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#ifdef CONFIG_PPC_BOOK3S_64
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if (current_thread_info()->local_flags & _TLF_LAZY_MMU) {
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current_thread_info()->local_flags &= ~_TLF_LAZY_MMU;
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batch = &__get_cpu_var(ppc64_tlb_batch);
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batch = this_cpu_ptr(&ppc64_tlb_batch);
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batch->active = 1;
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}
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#endif /* CONFIG_PPC_BOOK3S_64 */
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@ -243,7 +243,7 @@ void smp_muxed_ipi_message_pass(int cpu, int msg)
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irqreturn_t smp_ipi_demux(void)
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{
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struct cpu_messages *info = &__get_cpu_var(ipi_message);
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struct cpu_messages *info = this_cpu_ptr(&ipi_message);
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unsigned int all;
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mb(); /* order any irq clear */
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@ -442,9 +442,9 @@ void generic_mach_cpu_die(void)
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idle_task_exit();
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cpu = smp_processor_id();
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printk(KERN_DEBUG "CPU%d offline\n", cpu);
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__get_cpu_var(cpu_state) = CPU_DEAD;
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__this_cpu_write(cpu_state, CPU_DEAD);
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smp_wmb();
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while (__get_cpu_var(cpu_state) != CPU_UP_PREPARE)
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while (__this_cpu_read(cpu_state) != CPU_UP_PREPARE)
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cpu_relax();
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}
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|
@ -394,10 +394,10 @@ void ppc_enable_pmcs(void)
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ppc_set_pmu_inuse(1);
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/* Only need to enable them once */
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if (__get_cpu_var(pmcs_enabled))
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if (__this_cpu_read(pmcs_enabled))
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return;
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__get_cpu_var(pmcs_enabled) = 1;
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__this_cpu_write(pmcs_enabled, 1);
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if (ppc_md.enable_pmcs)
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ppc_md.enable_pmcs();
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|
@ -458,9 +458,9 @@ static inline void clear_irq_work_pending(void)
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DEFINE_PER_CPU(u8, irq_work_pending);
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#define set_irq_work_pending_flag() __get_cpu_var(irq_work_pending) = 1
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#define test_irq_work_pending() __get_cpu_var(irq_work_pending)
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#define clear_irq_work_pending() __get_cpu_var(irq_work_pending) = 0
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#define set_irq_work_pending_flag() __this_cpu_write(irq_work_pending, 1)
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#define test_irq_work_pending() __this_cpu_read(irq_work_pending)
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#define clear_irq_work_pending() __this_cpu_write(irq_work_pending, 0)
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#endif /* 32 vs 64 bit */
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@ -482,8 +482,8 @@ void arch_irq_work_raise(void)
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static void __timer_interrupt(void)
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{
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struct pt_regs *regs = get_irq_regs();
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u64 *next_tb = &__get_cpu_var(decrementers_next_tb);
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struct clock_event_device *evt = &__get_cpu_var(decrementers);
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u64 *next_tb = this_cpu_ptr(&decrementers_next_tb);
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struct clock_event_device *evt = this_cpu_ptr(&decrementers);
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u64 now;
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trace_timer_interrupt_entry(regs);
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@ -498,7 +498,7 @@ static void __timer_interrupt(void)
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*next_tb = ~(u64)0;
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if (evt->event_handler)
|
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evt->event_handler(evt);
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__get_cpu_var(irq_stat).timer_irqs_event++;
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__this_cpu_inc(irq_stat.timer_irqs_event);
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} else {
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now = *next_tb - now;
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if (now <= DECREMENTER_MAX)
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@ -506,13 +506,13 @@ static void __timer_interrupt(void)
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/* We may have raced with new irq work */
|
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if (test_irq_work_pending())
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set_dec(1);
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__get_cpu_var(irq_stat).timer_irqs_others++;
|
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__this_cpu_inc(irq_stat.timer_irqs_others);
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}
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|
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#ifdef CONFIG_PPC64
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/* collect purr register values often, for accurate calculations */
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if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
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struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array);
|
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struct cpu_usage *cu = this_cpu_ptr(&cpu_usage_array);
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cu->current_tb = mfspr(SPRN_PURR);
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}
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#endif
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@ -527,7 +527,7 @@ static void __timer_interrupt(void)
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void timer_interrupt(struct pt_regs * regs)
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{
|
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struct pt_regs *old_regs;
|
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u64 *next_tb = &__get_cpu_var(decrementers_next_tb);
|
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u64 *next_tb = this_cpu_ptr(&decrementers_next_tb);
|
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|
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/* Ensure a positive value is written to the decrementer, or else
|
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* some CPUs will continue to take decrementer exceptions.
|
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@ -813,7 +813,7 @@ static void __init clocksource_init(void)
|
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static int decrementer_set_next_event(unsigned long evt,
|
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struct clock_event_device *dev)
|
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{
|
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__get_cpu_var(decrementers_next_tb) = get_tb_or_rtc() + evt;
|
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__this_cpu_write(decrementers_next_tb, get_tb_or_rtc() + evt);
|
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set_dec(evt);
|
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|
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/* We may have raced with new irq work */
|
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@ -833,7 +833,7 @@ static void decrementer_set_mode(enum clock_event_mode mode,
|
||||
/* Interrupt handler for the timer broadcast IPI */
|
||||
void tick_broadcast_ipi_handler(void)
|
||||
{
|
||||
u64 *next_tb = &__get_cpu_var(decrementers_next_tb);
|
||||
u64 *next_tb = this_cpu_ptr(&decrementers_next_tb);
|
||||
|
||||
*next_tb = get_tb_or_rtc();
|
||||
__timer_interrupt();
|
||||
|
@ -295,7 +295,7 @@ long machine_check_early(struct pt_regs *regs)
|
||||
{
|
||||
long handled = 0;
|
||||
|
||||
__get_cpu_var(irq_stat).mce_exceptions++;
|
||||
__this_cpu_inc(irq_stat.mce_exceptions);
|
||||
|
||||
if (cur_cpu_spec && cur_cpu_spec->machine_check_early)
|
||||
handled = cur_cpu_spec->machine_check_early(regs);
|
||||
@ -304,7 +304,7 @@ long machine_check_early(struct pt_regs *regs)
|
||||
|
||||
long hmi_exception_realmode(struct pt_regs *regs)
|
||||
{
|
||||
__get_cpu_var(irq_stat).hmi_exceptions++;
|
||||
__this_cpu_inc(irq_stat.hmi_exceptions);
|
||||
|
||||
if (ppc_md.hmi_exception_early)
|
||||
ppc_md.hmi_exception_early(regs);
|
||||
@ -700,7 +700,7 @@ void machine_check_exception(struct pt_regs *regs)
|
||||
enum ctx_state prev_state = exception_enter();
|
||||
int recover = 0;
|
||||
|
||||
__get_cpu_var(irq_stat).mce_exceptions++;
|
||||
__this_cpu_inc(irq_stat.mce_exceptions);
|
||||
|
||||
/* See if any machine dependent calls. In theory, we would want
|
||||
* to call the CPU first, and call the ppc_md. one if the CPU
|
||||
@ -1519,7 +1519,7 @@ void vsx_unavailable_tm(struct pt_regs *regs)
|
||||
|
||||
void performance_monitor_exception(struct pt_regs *regs)
|
||||
{
|
||||
__get_cpu_var(irq_stat).pmu_irqs++;
|
||||
__this_cpu_inc(irq_stat.pmu_irqs);
|
||||
|
||||
perf_irq(regs);
|
||||
}
|
||||
|
@ -76,11 +76,11 @@ static inline int local_sid_setup_one(struct id *entry)
|
||||
unsigned long sid;
|
||||
int ret = -1;
|
||||
|
||||
sid = ++(__get_cpu_var(pcpu_last_used_sid));
|
||||
sid = __this_cpu_inc_return(pcpu_last_used_sid);
|
||||
if (sid < NUM_TIDS) {
|
||||
__get_cpu_var(pcpu_sids).entry[sid] = entry;
|
||||
__this_cpu_write(pcpu_sids)entry[sid], entry);
|
||||
entry->val = sid;
|
||||
entry->pentry = &__get_cpu_var(pcpu_sids).entry[sid];
|
||||
entry->pentry = this_cpu_ptr(&pcpu_sids.entry[sid]);
|
||||
ret = sid;
|
||||
}
|
||||
|
||||
@ -108,8 +108,8 @@ static inline int local_sid_setup_one(struct id *entry)
|
||||
static inline int local_sid_lookup(struct id *entry)
|
||||
{
|
||||
if (entry && entry->val != 0 &&
|
||||
__get_cpu_var(pcpu_sids).entry[entry->val] == entry &&
|
||||
entry->pentry == &__get_cpu_var(pcpu_sids).entry[entry->val])
|
||||
__this_cpu_read(pcpu_sids.entry[entry->val]) == entry &&
|
||||
entry->pentry == this_cpu_ptr(&pcpu_sids.entry[entry->val]))
|
||||
return entry->val;
|
||||
return -1;
|
||||
}
|
||||
@ -117,8 +117,8 @@ static inline int local_sid_lookup(struct id *entry)
|
||||
/* Invalidate all id mappings on local core -- call with preempt disabled */
|
||||
static inline void local_sid_destroy_all(void)
|
||||
{
|
||||
__get_cpu_var(pcpu_last_used_sid) = 0;
|
||||
memset(&__get_cpu_var(pcpu_sids), 0, sizeof(__get_cpu_var(pcpu_sids)));
|
||||
__this_cpu_write(pcpu_last_used_sid, 0);
|
||||
memset(this_cpu_ptr(&pcpu_sids), 0, sizeof(pcpu_sids));
|
||||
}
|
||||
|
||||
static void *kvmppc_e500_id_table_alloc(struct kvmppc_vcpu_e500 *vcpu_e500)
|
||||
|
@ -144,9 +144,9 @@ static void kvmppc_core_vcpu_load_e500mc(struct kvm_vcpu *vcpu, int cpu)
|
||||
mtspr(SPRN_GESR, vcpu->arch.shared->esr);
|
||||
|
||||
if (vcpu->arch.oldpir != mfspr(SPRN_PIR) ||
|
||||
__get_cpu_var(last_vcpu_of_lpid)[get_lpid(vcpu)] != vcpu) {
|
||||
__this_cpu_read(last_vcpu_of_lpid[get_lpid(vcpu)]) != vcpu) {
|
||||
kvmppc_e500_tlbil_all(vcpu_e500);
|
||||
__get_cpu_var(last_vcpu_of_lpid)[get_lpid(vcpu)] = vcpu;
|
||||
__this_cpu_write(last_vcpu_of_lpid[get_lpid(vcpu)], vcpu);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -629,7 +629,7 @@ static void native_flush_hash_range(unsigned long number, int local)
|
||||
unsigned long want_v;
|
||||
unsigned long flags;
|
||||
real_pte_t pte;
|
||||
struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
|
||||
struct ppc64_tlb_batch *batch = this_cpu_ptr(&ppc64_tlb_batch);
|
||||
unsigned long psize = batch->psize;
|
||||
int ssize = batch->ssize;
|
||||
int i;
|
||||
|
@ -1322,7 +1322,7 @@ void flush_hash_range(unsigned long number, int local)
|
||||
else {
|
||||
int i;
|
||||
struct ppc64_tlb_batch *batch =
|
||||
&__get_cpu_var(ppc64_tlb_batch);
|
||||
this_cpu_ptr(&ppc64_tlb_batch);
|
||||
|
||||
for (i = 0; i < number; i++)
|
||||
flush_hash_page(batch->vpn[i], batch->pte[i],
|
||||
|
@ -33,13 +33,13 @@ static inline int tlb1_next(void)
|
||||
|
||||
ncams = mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY;
|
||||
|
||||
index = __get_cpu_var(next_tlbcam_idx);
|
||||
index = this_cpu_read(next_tlbcam_idx);
|
||||
|
||||
/* Just round-robin the entries and wrap when we hit the end */
|
||||
if (unlikely(index == ncams - 1))
|
||||
__get_cpu_var(next_tlbcam_idx) = tlbcam_index;
|
||||
__this_cpu_write(next_tlbcam_idx, tlbcam_index);
|
||||
else
|
||||
__get_cpu_var(next_tlbcam_idx)++;
|
||||
__this_cpu_inc(next_tlbcam_idx);
|
||||
|
||||
return index;
|
||||
}
|
||||
|
@ -462,7 +462,7 @@ static void hugepd_free(struct mmu_gather *tlb, void *hugepte)
|
||||
{
|
||||
struct hugepd_freelist **batchp;
|
||||
|
||||
batchp = &get_cpu_var(hugepd_freelist_cur);
|
||||
batchp = this_cpu_ptr(&hugepd_freelist_cur);
|
||||
|
||||
if (atomic_read(&tlb->mm->mm_users) < 2 ||
|
||||
cpumask_equal(mm_cpumask(tlb->mm),
|
||||
|
@ -339,7 +339,7 @@ static void power_pmu_bhrb_reset(void)
|
||||
|
||||
static void power_pmu_bhrb_enable(struct perf_event *event)
|
||||
{
|
||||
struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
|
||||
struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
|
||||
|
||||
if (!ppmu->bhrb_nr)
|
||||
return;
|
||||
@ -354,7 +354,7 @@ static void power_pmu_bhrb_enable(struct perf_event *event)
|
||||
|
||||
static void power_pmu_bhrb_disable(struct perf_event *event)
|
||||
{
|
||||
struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
|
||||
struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
|
||||
|
||||
if (!ppmu->bhrb_nr)
|
||||
return;
|
||||
@ -1144,7 +1144,7 @@ static void power_pmu_disable(struct pmu *pmu)
|
||||
if (!ppmu)
|
||||
return;
|
||||
local_irq_save(flags);
|
||||
cpuhw = &__get_cpu_var(cpu_hw_events);
|
||||
cpuhw = this_cpu_ptr(&cpu_hw_events);
|
||||
|
||||
if (!cpuhw->disabled) {
|
||||
/*
|
||||
@ -1211,7 +1211,7 @@ static void power_pmu_enable(struct pmu *pmu)
|
||||
return;
|
||||
local_irq_save(flags);
|
||||
|
||||
cpuhw = &__get_cpu_var(cpu_hw_events);
|
||||
cpuhw = this_cpu_ptr(&cpu_hw_events);
|
||||
if (!cpuhw->disabled)
|
||||
goto out;
|
||||
|
||||
@ -1403,7 +1403,7 @@ static int power_pmu_add(struct perf_event *event, int ef_flags)
|
||||
* Add the event to the list (if there is room)
|
||||
* and check whether the total set is still feasible.
|
||||
*/
|
||||
cpuhw = &__get_cpu_var(cpu_hw_events);
|
||||
cpuhw = this_cpu_ptr(&cpu_hw_events);
|
||||
n0 = cpuhw->n_events;
|
||||
if (n0 >= ppmu->n_counter)
|
||||
goto out;
|
||||
@ -1469,7 +1469,7 @@ static void power_pmu_del(struct perf_event *event, int ef_flags)
|
||||
|
||||
power_pmu_read(event);
|
||||
|
||||
cpuhw = &__get_cpu_var(cpu_hw_events);
|
||||
cpuhw = this_cpu_ptr(&cpu_hw_events);
|
||||
for (i = 0; i < cpuhw->n_events; ++i) {
|
||||
if (event == cpuhw->event[i]) {
|
||||
while (++i < cpuhw->n_events) {
|
||||
@ -1575,7 +1575,7 @@ static void power_pmu_stop(struct perf_event *event, int ef_flags)
|
||||
*/
|
||||
static void power_pmu_start_txn(struct pmu *pmu)
|
||||
{
|
||||
struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
|
||||
struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
|
||||
|
||||
perf_pmu_disable(pmu);
|
||||
cpuhw->group_flag |= PERF_EVENT_TXN;
|
||||
@ -1589,7 +1589,7 @@ static void power_pmu_start_txn(struct pmu *pmu)
|
||||
*/
|
||||
static void power_pmu_cancel_txn(struct pmu *pmu)
|
||||
{
|
||||
struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
|
||||
struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
|
||||
|
||||
cpuhw->group_flag &= ~PERF_EVENT_TXN;
|
||||
perf_pmu_enable(pmu);
|
||||
@ -1607,7 +1607,7 @@ static int power_pmu_commit_txn(struct pmu *pmu)
|
||||
|
||||
if (!ppmu)
|
||||
return -EAGAIN;
|
||||
cpuhw = &__get_cpu_var(cpu_hw_events);
|
||||
cpuhw = this_cpu_ptr(&cpu_hw_events);
|
||||
n = cpuhw->n_events;
|
||||
if (check_excludes(cpuhw->event, cpuhw->flags, 0, n))
|
||||
return -EAGAIN;
|
||||
@ -1964,7 +1964,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
|
||||
|
||||
if (event->attr.sample_type & PERF_SAMPLE_BRANCH_STACK) {
|
||||
struct cpu_hw_events *cpuhw;
|
||||
cpuhw = &__get_cpu_var(cpu_hw_events);
|
||||
cpuhw = this_cpu_ptr(&cpu_hw_events);
|
||||
power_pmu_bhrb_read(cpuhw);
|
||||
data.br_stack = &cpuhw->bhrb_stack;
|
||||
}
|
||||
@ -2037,7 +2037,7 @@ static bool pmc_overflow(unsigned long val)
|
||||
static void perf_event_interrupt(struct pt_regs *regs)
|
||||
{
|
||||
int i, j;
|
||||
struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
|
||||
struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
|
||||
struct perf_event *event;
|
||||
unsigned long val[8];
|
||||
int found, active;
|
||||
|
@ -210,7 +210,7 @@ static void fsl_emb_pmu_disable(struct pmu *pmu)
|
||||
unsigned long flags;
|
||||
|
||||
local_irq_save(flags);
|
||||
cpuhw = &__get_cpu_var(cpu_hw_events);
|
||||
cpuhw = this_cpu_ptr(&cpu_hw_events);
|
||||
|
||||
if (!cpuhw->disabled) {
|
||||
cpuhw->disabled = 1;
|
||||
@ -249,7 +249,7 @@ static void fsl_emb_pmu_enable(struct pmu *pmu)
|
||||
unsigned long flags;
|
||||
|
||||
local_irq_save(flags);
|
||||
cpuhw = &__get_cpu_var(cpu_hw_events);
|
||||
cpuhw = this_cpu_ptr(&cpu_hw_events);
|
||||
if (!cpuhw->disabled)
|
||||
goto out;
|
||||
|
||||
@ -653,7 +653,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
|
||||
static void perf_event_interrupt(struct pt_regs *regs)
|
||||
{
|
||||
int i;
|
||||
struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
|
||||
struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
|
||||
struct perf_event *event;
|
||||
unsigned long val;
|
||||
int found = 0;
|
||||
|
@ -82,7 +82,7 @@ static void iic_unmask(struct irq_data *d)
|
||||
|
||||
static void iic_eoi(struct irq_data *d)
|
||||
{
|
||||
struct iic *iic = &__get_cpu_var(cpu_iic);
|
||||
struct iic *iic = this_cpu_ptr(&cpu_iic);
|
||||
out_be64(&iic->regs->prio, iic->eoi_stack[--iic->eoi_ptr]);
|
||||
BUG_ON(iic->eoi_ptr < 0);
|
||||
}
|
||||
@ -148,7 +148,7 @@ static unsigned int iic_get_irq(void)
|
||||
struct iic *iic;
|
||||
unsigned int virq;
|
||||
|
||||
iic = &__get_cpu_var(cpu_iic);
|
||||
iic = this_cpu_ptr(&cpu_iic);
|
||||
*(unsigned long *) &pending =
|
||||
in_be64((u64 __iomem *) &iic->regs->pending_destr);
|
||||
if (!(pending.flags & CBE_IIC_IRQ_VALID))
|
||||
@ -163,7 +163,7 @@ static unsigned int iic_get_irq(void)
|
||||
|
||||
void iic_setup_cpu(void)
|
||||
{
|
||||
out_be64(&__get_cpu_var(cpu_iic).regs->prio, 0xff);
|
||||
out_be64(this_cpu_ptr(&cpu_iic.regs->prio), 0xff);
|
||||
}
|
||||
|
||||
u8 iic_get_target_id(int cpu)
|
||||
|
@ -48,7 +48,7 @@ void __trace_opal_entry(unsigned long opcode, unsigned long *args)
|
||||
|
||||
local_irq_save(flags);
|
||||
|
||||
depth = &__get_cpu_var(opal_trace_depth);
|
||||
depth = this_cpu_ptr(&opal_trace_depth);
|
||||
|
||||
if (*depth)
|
||||
goto out;
|
||||
@ -69,7 +69,7 @@ void __trace_opal_exit(long opcode, unsigned long retval)
|
||||
|
||||
local_irq_save(flags);
|
||||
|
||||
depth = &__get_cpu_var(opal_trace_depth);
|
||||
depth = this_cpu_ptr(&opal_trace_depth);
|
||||
|
||||
if (*depth)
|
||||
goto out;
|
||||
|
@ -711,7 +711,7 @@ void __init ps3_register_ipi_irq(unsigned int cpu, unsigned int virq)
|
||||
|
||||
static unsigned int ps3_get_irq(void)
|
||||
{
|
||||
struct ps3_private *pd = &__get_cpu_var(ps3_private);
|
||||
struct ps3_private *pd = this_cpu_ptr(&ps3_private);
|
||||
u64 x = (pd->bmp.status & pd->bmp.mask);
|
||||
unsigned int plug;
|
||||
|
||||
|
@ -75,7 +75,7 @@ static atomic_t dtl_count;
|
||||
*/
|
||||
static void consume_dtle(struct dtl_entry *dtle, u64 index)
|
||||
{
|
||||
struct dtl_ring *dtlr = &__get_cpu_var(dtl_rings);
|
||||
struct dtl_ring *dtlr = this_cpu_ptr(&dtl_rings);
|
||||
struct dtl_entry *wp = dtlr->write_ptr;
|
||||
struct lppaca *vpa = local_paca->lppaca_ptr;
|
||||
|
||||
|
@ -110,7 +110,7 @@ static void probe_hcall_entry(void *ignored, unsigned long opcode, unsigned long
|
||||
if (opcode > MAX_HCALL_OPCODE)
|
||||
return;
|
||||
|
||||
h = &__get_cpu_var(hcall_stats)[opcode / 4];
|
||||
h = this_cpu_ptr(&hcall_stats[opcode / 4]);
|
||||
h->tb_start = mftb();
|
||||
h->purr_start = mfspr(SPRN_PURR);
|
||||
}
|
||||
@ -123,7 +123,7 @@ static void probe_hcall_exit(void *ignored, unsigned long opcode, unsigned long
|
||||
if (opcode > MAX_HCALL_OPCODE)
|
||||
return;
|
||||
|
||||
h = &__get_cpu_var(hcall_stats)[opcode / 4];
|
||||
h = this_cpu_ptr(&hcall_stats[opcode / 4]);
|
||||
h->num_calls++;
|
||||
h->tb_total += mftb() - h->tb_start;
|
||||
h->purr_total += mfspr(SPRN_PURR) - h->purr_start;
|
||||
|
@ -199,7 +199,7 @@ static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
|
||||
|
||||
local_irq_save(flags); /* to protect tcep and the page behind it */
|
||||
|
||||
tcep = __get_cpu_var(tce_page);
|
||||
tcep = __this_cpu_read(tce_page);
|
||||
|
||||
/* This is safe to do since interrupts are off when we're called
|
||||
* from iommu_alloc{,_sg}()
|
||||
@ -212,7 +212,7 @@ static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
|
||||
return tce_build_pSeriesLP(tbl, tcenum, npages, uaddr,
|
||||
direction, attrs);
|
||||
}
|
||||
__get_cpu_var(tce_page) = tcep;
|
||||
__this_cpu_write(tce_page, tcep);
|
||||
}
|
||||
|
||||
rpn = __pa(uaddr) >> TCE_SHIFT;
|
||||
@ -398,7 +398,7 @@ static int tce_setrange_multi_pSeriesLP(unsigned long start_pfn,
|
||||
long l, limit;
|
||||
|
||||
local_irq_disable(); /* to protect tcep and the page behind it */
|
||||
tcep = __get_cpu_var(tce_page);
|
||||
tcep = __this_cpu_read(tce_page);
|
||||
|
||||
if (!tcep) {
|
||||
tcep = (__be64 *)__get_free_page(GFP_ATOMIC);
|
||||
@ -406,7 +406,7 @@ static int tce_setrange_multi_pSeriesLP(unsigned long start_pfn,
|
||||
local_irq_enable();
|
||||
return -ENOMEM;
|
||||
}
|
||||
__get_cpu_var(tce_page) = tcep;
|
||||
__this_cpu_write(tce_page, tcep);
|
||||
}
|
||||
|
||||
proto_tce = TCE_PCI_READ | TCE_PCI_WRITE;
|
||||
|
@ -515,7 +515,7 @@ static void pSeries_lpar_flush_hash_range(unsigned long number, int local)
|
||||
unsigned long vpn;
|
||||
unsigned long i, pix, rc;
|
||||
unsigned long flags = 0;
|
||||
struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
|
||||
struct ppc64_tlb_batch *batch = this_cpu_ptr(&ppc64_tlb_batch);
|
||||
int lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE);
|
||||
unsigned long param[9];
|
||||
unsigned long hash, index, shift, hidx, slot;
|
||||
@ -705,7 +705,7 @@ void __trace_hcall_entry(unsigned long opcode, unsigned long *args)
|
||||
|
||||
local_irq_save(flags);
|
||||
|
||||
depth = &__get_cpu_var(hcall_trace_depth);
|
||||
depth = this_cpu_ptr(&hcall_trace_depth);
|
||||
|
||||
if (*depth)
|
||||
goto out;
|
||||
@ -730,7 +730,7 @@ void __trace_hcall_exit(long opcode, unsigned long retval,
|
||||
|
||||
local_irq_save(flags);
|
||||
|
||||
depth = &__get_cpu_var(hcall_trace_depth);
|
||||
depth = this_cpu_ptr(&hcall_trace_depth);
|
||||
|
||||
if (*depth)
|
||||
goto out;
|
||||
|
@ -302,8 +302,8 @@ static struct rtas_error_log *fwnmi_get_errinfo(struct pt_regs *regs)
|
||||
/* If it isn't an extended log we can use the per cpu 64bit buffer */
|
||||
h = (struct rtas_error_log *)&savep[1];
|
||||
if (!rtas_error_extended(h)) {
|
||||
memcpy(&__get_cpu_var(mce_data_buf), h, sizeof(__u64));
|
||||
errhdr = (struct rtas_error_log *)&__get_cpu_var(mce_data_buf);
|
||||
memcpy(this_cpu_ptr(&mce_data_buf), h, sizeof(__u64));
|
||||
errhdr = (struct rtas_error_log *)this_cpu_ptr(&mce_data_buf);
|
||||
} else {
|
||||
int len, error_log_length;
|
||||
|
||||
|
@ -155,7 +155,7 @@ int __init xics_smp_probe(void)
|
||||
|
||||
void xics_teardown_cpu(void)
|
||||
{
|
||||
struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
|
||||
struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
|
||||
|
||||
/*
|
||||
* we have to reset the cppr index to 0 because we're
|
||||
|
Loading…
Reference in New Issue
Block a user