riscv: dts: microchip: mpfs: remove pci axi address translation property
commit e4009c5fa77b4356aa37ce002e9f9952dfd7a615 upstream. An AXI master address translation table property was inadvertently added to the device tree & this was not caught by dtbs_check at the time. Remove the property - it should not be in mpfs.dtsi anyway as it would be more suitable in -fabric.dtsi nor does it actually apply to the version of the reference design we are using for upstream. Link: https://www.microsemi.com/document-portal/doc_download/1245812-polarfire-fpga-and-polarfire-soc-fpga-pci-express-user-guide # Section 1.3.3 Fixes: 528a5b1f2556 ("riscv: dts: microchip: add new peripherals to icicle kit device tree") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -446,7 +446,6 @@
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ranges = <0x3000000 0x0 0x8000000 0x20 0x8000000 0x0 0x80000000>;
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msi-parent = <&pcie>;
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msi-controller;
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microchip,axi-m-atr0 = <0x10 0x0>;
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status = "disabled";
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pcie_intc: interrupt-controller {
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#address-cells = <0>;
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