1169365 Commits

Author SHA1 Message Date
Hans de Goede
01862d01cb platform/x86: x86-android-tablets: Use LP8557 in direct mode on both the Yoga 830 and the 1050
Both the Lenovo Yoga Tablet 2 830 and 1050 models use an TI LP8557 LED
backlight controller. On the 1050 the LP8557's PWM input is connected to
the PMIC's PWM output and everything works fine with the defaults
programmed into the LP8557 by the BIOS.

But on the 830 the LP8557's PWM input is connected to a PWM output coming
from the LCD panel's controller. The Android code has a hack in the i915
driver to write the non-standard DSI reg 0x9f with the desired backlight
level to set the duty-cycle of the LCD's PWM output.

To avoid having to have a similar hack in the mainline kernel the LP8557
entry in lenovo_yoga_tab2_830_1050_i2c_clients instead just programs the
LP8557 to directly set the level, ignoring the PWM input.

So far we have only been instantiating the LP8557 i2c_client for direct
backlight control on the 830 model. But we want hide/disable the
intel_backlight interface on the 830 model to avoid having 2 backlight
interfaces for the same LCD panel.

And the 830 and 1050 share the same DMI strings. So this will hide the
intel_backlight interface on the 1050 model too.

To avoid this causing problems make the backlight handling consistent
between the 2 models and always directly use the LP8557.

This also simplifies the code.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20230401150737.597417-1-hdegoede@redhat.com
2023-04-06 12:59:25 +02:00
Thomas Weißschuh
3e9adae933 platform/x86: think-lmi: Remove unnecessary casts for attributes
These casts are unnecessary and could break if structure layouts are
randomized or implementation details change.
Use the proper syntax that works without casts.

Also remove some unnecessary braces that checkpatch complains about.

Signed-off-by: Thomas Weißschuh <linux@weissschuh.net>
Link: https://lore.kernel.org/r/20230329-think-lmi-attrs-v1-1-5794f2367cc2@weissschuh.net
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-04-06 12:43:58 +02:00
Gergo Koteles
e82882cdd2 platform/x86: Add driver for Yoga Tablet Mode switch
This WMI driver for the tablet mode control switch for Lenovo Yoga
notebooks was originally written by Gergo Koteles. The mode is mapped to
a SW_TABLET_MODE switch capable input device.

Andrew followed the suggestions that were posted in reply to Gergo's RFC
patch, and on the v1 & v2 versions of this patch to follow-up and get it
merged.

Changes from Gergo's RFC:

 - Refactored obtaining a reference to the EC ACPI device needed for the
   quirk implementation as suggested by Hans de Goede
 - Applied small fixes and switched to always registering handles with
   the driver for automatic cleanup as suggested by Barnabás Pőcze.
 - Merged the lenovo_ymc_trigger_ec function with the
   ideapad_trigger_ymc_next_read function since it was no longer
   external.
 - Added the word "Tablet" to the driver description to hopefully make
   it more clear.
 - Fixed the LENOVO_YMC_QUERY_METHOD ID and the name string for the EC
   APCI device trigged for the quirk
 - Triggered the input event on probe so that the initial tablet mode
   state when the driver is loaded is reported to userspace as suggested
   by Armin Wolf.
 - Restricted the permissions of the ec_trigger parameter as suggested
   by Armin Wolf. Also updated the description.

We have tested this on the Yoga 7 14AIL7 for the non-quirk path and on
the Yoga 7 14ARB7 which has the firmware bug that requires triggering
the embedded controller to send the mode change events. This workaround
is also used by the Windows drivers.

According to reports at https://github.com/lukas-w/yoga-usage-mode,
which uses the same WMI devices, the following models should also work:
Yoga C940, Ideapad flex 14API, Yoga 9 14IAP7, Yoga 7 14ARB7, etc.

Signed-off-by: Gergo Koteles <soyer@irl.hu>
Co-developed-by: Andrew Kallmeyer <kallmeyeras@gmail.com>
Signed-off-by: Andrew Kallmeyer <kallmeyeras@gmail.com>
Link: https://lore.kernel.org/r/20221004214332.35934-1-soyer@irl.hu/
Link: https://lore.kernel.org/r/20230310041726.217447-1-kallmeyeras@gmail.com/
Link: https://lore.kernel.org/r/20230323025200.5462-1-kallmeyeras@gmail.com/
Tested-by: André Apitzsch <git@apitzsch.eu>
Link: https://lore.kernel.org/r/20230329014559.44494-3-kallmeyeras@gmail.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-04-06 12:33:34 +02:00
Andrew Kallmeyer
0de0ab9a65 platform/x86: Move ideapad ACPI helpers to a new header
These functions will be used by a driver written by Gergo Koteles to
detect the tablet mode switch in Lenovo Yoga laptops. These changes were
discussed in review of that patch.

This is the minimal set of functions needed in that driver, there are
several more small functions left in the ACPI Helpers section in
ideapad-laptop.c. The only change is the functions are now marked inline
as requested in the review comments.

Signed-off-by: Andrew Kallmeyer <kallmeyeras@gmail.com>
Link: https://lore.kernel.org/r/20221004214332.35934-1-soyer@irl.hu/
Tested-by: André Apitzsch <git@apitzsch.eu>
Link: https://lore.kernel.org/r/20230329014559.44494-2-kallmeyeras@gmail.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-04-06 12:22:30 +02:00
Dan Carpenter
710ddfbfda platform/x86: ISST: unlock on error path in tpmi_sst_init()
Call mutex_unlock(&isst_tpmi_dev_lock) before returning on this
error path.

Fixes: d805456c712f ("platform/x86: ISST: Enumerate TPMI SST and create framework")
Signed-off-by: Dan Carpenter <error27@gmail.com>
Acked-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Link: https://lore.kernel.org/r/dcdebbb7-7de6-4d04-8e7a-43d5ca043484@kili.mountain
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-03-27 16:10:20 +02:00
Jithu Joseph
3a2f2756c5 Documentation/ABI: Update IFS ABI doc
Array BIST test doesn't need an IFS test image to operate unlike
the SCAN test. Consequently current_batch and image_version
files are not applicable for Array BIST IFS device instance,
clarify this in the ABI doc.

Also given that multiple tests are supported, take the opportunity
to generalize descriptions wherever applicable.

Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20230322003359.213046-10-jithu.joseph@intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-03-27 16:10:20 +02:00
Jithu Joseph
2b965dc05d platform/x86/intel/ifs: Update IFS doc
Array BIST is the second test supported by IFS. Modify IFS doc
entry to be more general.

Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20230322003359.213046-9-jithu.joseph@intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-03-27 16:10:20 +02:00
Jithu Joseph
fed696ce13 platform/x86/intel/ifs: Implement Array BIST test
Array BIST test (for a particular core) is triggered by writing
to MSR_ARRAY_BIST from one sibling of the core.

This will initiate a test for all supported arrays on that
CPU. Array BIST test may be aborted before completing all the
arrays in the event of an interrupt or other reasons.
In this case, kernel will restart the test from that point
onwards. Array test will also be aborted when the test fails,
in which case the test is stopped immediately without further
retry.

Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20230322003359.213046-8-jithu.joseph@intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-03-27 16:10:20 +02:00
Jithu Joseph
5210fb4e18 platform/x86/intel/ifs: Sysfs interface for Array BIST
The interface to trigger Array BIST test and obtain its result
is similar to the existing scan test. The only notable
difference is that, Array BIST doesn't require any test content
to be loaded. So binary load related options are not needed for
this test.

Add sysfs interface for array BIST test, the testing support will
be added by subsequent patch.

Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20230322003359.213046-7-jithu.joseph@intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-03-27 16:10:20 +02:00
Jithu Joseph
d31bbdf42b platform/x86/intel/ifs: Introduce Array Scan test to IFS
Array BIST is a new type of core test introduced under the Intel Infield
Scan (IFS) suite of tests.

Emerald Rapids (EMR) is the first CPU to support Array BIST.
Array BIST performs tests on some portions of the core logic such as
caches and register files. These are different portions of the silicon
compared to the parts tested by the first test type
i.e Scan at Field (SAF).

Make changes in the device driver init flow to register this new test
type with the device driver framework. Each test will have its own
sysfs directory (intel_ifs_0 , intel_ifs_1) under misc hierarchy to
accommodate for the differences in test type and how they are initiated.

Upcoming patches will add actual support.

Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20230322003359.213046-6-jithu.joseph@intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-03-27 16:10:20 +02:00
Jithu Joseph
c68e3d4739 x86/include/asm/msr-index.h: Add IFS Array test bits
Define MSR bitfields for enumerating support for Array BIST test.

Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20230322003359.213046-5-jithu.joseph@intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-03-27 16:10:20 +02:00
Jithu Joseph
d847eddf0e platform/x86/intel/ifs: IFS cleanup
Cleanup incorporating misc review comments

 - Remove the subdirectory intel_ifs/0 for devicenode [1]
 - Make plat_ifs_groups non static and use it directly without using a
    function [2]

Link: https://lore.kernel.org/lkml/Y+4kQOtrHt5pdsSO@kroah.com/ [1]
Link: https://lore.kernel.org/lkml/Y9nyxNesVHCUXAcH@kroah.com/  [2]

Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20230322003359.213046-4-jithu.joseph@intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-03-27 16:10:20 +02:00
Jithu Joseph
54c9fcd187 platform/x86/intel/ifs: Reorganize driver data
The struct holding device driver data contained both read only(ro)
and read write(rw) fields.

Separating ro fields from rw fields was recommended as
a preferable design pattern during review[1].

Group ro fields into a separate const struct. Associate it to
the miscdevice being registered by keeping its pointer in the
same container struct as the miscdevice.

Link: https://lore.kernel.org/lkml/Y+9H9otxLYPqMkUh@kroah.com/ [1]

Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20230322003359.213046-3-jithu.joseph@intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-03-27 16:10:20 +02:00
Jithu Joseph
67f88ffa6d platform/x86/intel/ifs: Separate ifs_pkg_auth from ifs_data
In preparation to supporting additional tests, remove ifs_pkg_auth
from per-test scope, as it is only applicable for one test type.

This will simplify ifs_init() flow when multiple tests are added.

Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20230322003359.213046-2-jithu.joseph@intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-03-27 16:10:20 +02:00
Nikita Kravets
392cacf2aa platform/x86: Add new msi-ec driver
Add a new driver to allow various MSI laptops' functionalities to be
controlled from userspace. This includes such features as power
profiles (aka shift modes), fan speed, charge thresholds, LEDs, etc.

This driver contains EC memory configurations for different firmware
versions and exports battery charge thresholds to userspace (note,
that start and end thresholds control the same EC parameter
and are always 10% apart).

Link: https://github.com/BeardOverflow/msi-ec/
Link: https://github.com/BeardOverflow/msi-ec/pull/13
Cc: Aakash Singh <mail@singhaakash.dev>
Cc: Jose Angel Pastrana <japp0005@red.ujaen.es>
Signed-off-by: Nikita Kravets <teackot@gmail.com>
Link: https://lore.kernel.org/r/20230320225509.3559-1-teackot@gmail.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-03-27 16:10:20 +02:00
Hans de Goede
fd5aadaa21 Merge remote-tracking branch 'intel-speed-select/intel-sst' into review-hans
Summary of changes:

Till the commit:
"tools/power/x86/intel-speed-select: Get punit core mapping
information"

All patches just lays foundation for adding new hardware interface
in addition to existing MSR/MMIO interface.

All patches prefixed with "Abstract" just adds individual hardware
callback for functions called from the core processing.

The mailbox processing is abstracted to a new file with callbacks.

In addition some changes to reduce duplicated code for display
of TRL level.

Patch "Introduce Punit ID concept and add related API" add further
abstraction in addition to existing package and die scope.

-----------
tools/power/x86/intel-speed-select: Get punit core mapping information
-Adds a new way to get package/die/punit information for each CPU.
-----------

Introduce TPMI interface support
- Implement all abstracted callbacks above to use TPMI IOCTL interface.
-----------

tools/power/x86/intel-speed-select: Display punit info
- With TPMI the granularity is per punit, which can be multiple in a
package/die.
----------

tools/power/x86/intel-speed-select: Remove cpu mask display for non-cpu
power domain
tools/power/x86/intel-speed-select: Display fact info for non-cpu power
domain
-There are some power domains with no CPUs, the above patches adds CPU
as invalid for these domains
----------

tools/power/x86/intel-speed-select: Use cgroup v2 isolation
- Adds new option to use Cgroup CPU isolation instead of offline of CPUs
----------

tools/power/x86/intel-speed-select: Change TRL display for Emerald Rapids
- Emerald Rapid has multiple TRL levels and moves away from TRL level
based on instruction type
2023-03-27 15:03:06 +02:00
Zhang Rui
19799d3ae2 tools/power/x86/intel-speed-select: Update version
Update tool and supported API version. This is the first version which
supports newer Xeon platforms with TPMI support.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: subject and changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:41:17 -07:00
Srinivas Pandruvada
2c00056f54 tools/power/x86/intel-speed-select: Change TRL display for Emerald Rapids
Emerald Rapids doesn't specify TRL (Turbo Ratio Limits) based instruction
types. Instead it specifies 5 TRL levels, which can be anyone of the
instruction types.

Increase TRL levels to 5 for Emerald Rapids. Also change display to show
by level number. Show only non zero level values.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:41:17 -07:00
Srinivas Pandruvada
1d54b139f4 tools/power/x86/intel-speed-select: Identify Emerald Rapids
There are some differences compared to Sapphire Rapids. So, add a separate
API.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:41:17 -07:00
Srinivas Pandruvada
a835ff56dd tools/power/x86/intel-speed-select: Display AMX base frequency
AMX frequency is present in non TPMI platforms also. When platform
supports, the value is non zero. So, display AMX base frequency when
non zero, irrespective of platform API version.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:41:17 -07:00
Srinivas Pandruvada
997074df65 tools/power/x86/intel-speed-select: Use cgroup v2 isolation
On supported systems, it is possiible to isolate CPUs instead of
CPU online/offline. This is optional and can be specified using
-g option when running as daemon or in combination with -o option
for SST-PP level change.

CPU isolation doesn't isolate IRQs. So IRQs needs to be moved away
from isoolated CPUs. This can be done via IRQ sysfs or irqbalance daemon.

The IRQ balance daemon is also capable to parse thermal HFI messages to
move IRQs away from CPUS, which are supposed be isolated. But this
requires version released after July 2022.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:55 -07:00
Srinivas Pandruvada
57797f19d5 tools/power/x86/intel-speed-select: Add missing free cpuset
During perf level change cpuset is allocated but not freed.
Add free_cpu_set() in success and failure path.

Although this is not an issue, as the program will exit after
processing of online/offline, but for completeness add the
free_cpu_set().

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:55 -07:00
Zhang Rui
137ba3b13a tools/power/x86/intel-speed-select: Fix clos-max display with TPMI I/F
Comparing clos_config->clos_max with 255 is broken with TPMI I/F because
of different isst_get_disp_freq_multiplier() used.

Checking for clos_config->clos_max * isst_get_disp_freq_multiplier()
instead.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:55 -07:00
Zhang Rui
d0e12c46f5 tools/power/x86/intel-speed-select: Add cpu id check
Some operations applies to cpu-power-domain only. Add check for cpu id
for these functions.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:55 -07:00
Zhang Rui
14f0cf6cfa tools/power/x86/intel-speed-select: Avoid setting duplicate tdp level
If the new TDP level requetsted is same as the current TDP level, don't
call into driver to change level.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:55 -07:00
Zhang Rui
c7ff8ff3b2 tools/power/x86/intel-speed-select: Remove cpu mask display for non-cpu power domain
Non CPU power domains will not have any CPUs. So don't display any CPU
count or enable mask.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: subject and changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:55 -07:00
Zhang Rui
c5a295caef tools/power/x86/intel-speed-select: Hide invalid TRL level
TRL levels with Zero ratio values is meaningless.
Prevent these TRL levels from being displayed.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:55 -07:00
Zhang Rui
b1e9b87b3b tools/power/x86/intel-speed-select: Display fact info for non-cpu power domain
Allow displaying SST-TF info for non-cpu power domain.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:54 -07:00
Zhang Rui
ca7c5d5b75 tools/power/x86/intel-speed-select: Show level 0 name for new api_version
level 0 name is not shown in some case for backward compatibility reason.
No need to keep this quirk for new api_version.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:54 -07:00
Zhang Rui
443bf104ef tools/power/x86/intel-speed-select: Prevent cpu clos config for non-cpu power domain
Non-cpu power domain does not support cpu clos config.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:54 -07:00
Zhang Rui
2e54ba89ec tools/power/x86/intel-speed-select: Allow display non-cpu power domain info
Some power domain may not have CPUs associated, allow displaying
information for these non-cpu power domains.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:54 -07:00
Zhang Rui
5f31908165 tools/power/x86/intel-speed-select: Display amx_p1 and cooling_type
amx_p1 and cooling_type are newly introduced for TPMI interface.

Display amx_p1 and cooling_type info for platforms that support them.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:54 -07:00
Zhang Rui
46de87e39b tools/power/x86/intel-speed-select: Display punit info
Display punit info for platforms with new api_version.
For platforms with old api_version, don't display the punit info to be
backward compatible.

For example:

Intel(R) Speed Select Technology
Executing on CPU model:173[0xad]
 package-0
  die-0
    powerdomain-0
      cpu-0
        get-config-current_level:0
 package-0
  die-0
    powerdomain-3
      cpu--1
        get-config-current_level:0
 package-0
  die-0
    powerdomain-4
      cpu--1
        get-config-current_level:0

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:54 -07:00
Zhang Rui
79554aaa22 tools/power/x86/intel-speed-select: Introduce TPMI interface support
TPMI (Topology Aware Register and PM Capsule Interface) creates a
flexible, extendable and software-PCIe-driver-enumerable MMIO interface
for PM features.

SST feature is exposed via the TPMI interface on newer Xeon platforms.

Kernel TPMI based SST driver provides a series of new IOCTLs for userspace
to use.

Introduce support for the platforms that do SST control via TPMI interface.

Compared with previous platforms, Newer Xeons also supports multi-punit in a
package/die, including cpu punit and non-cpu punit. These have already
been handled in the generic code.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:54 -07:00
Srinivas Pandruvada
a0ca5a0973 tools/power/x86/intel-speed-select: Get punit core mapping information
Get punit core mapping information using format of MSR 0x54. Based
on the API version, decode is done using new format. The new format
also include a power domain ID. TPMI SST information is for each
power domain.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:53 -07:00
Zhang Rui
887e5be91d tools/power/x86/intel-speed-select: Introduce api_version helper
In some cases, the output format may be different with different
api_version because of different capabilities or for backward
capabilities reason.

Introduce api_version() to get the api_version of the platform running.

No functional changes are expected.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:53 -07:00
Zhang Rui
20f06c9db2 tools/power/x86/intel-speed-select: Support large clos_min/max
clos_min/max in TPMI interface is frequency in MHz, thus clos_min/max
needs to support larger values.

No functional changes are expected.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:53 -07:00
Zhang Rui
9798768ce9 tools/power/x86/intel-speed-select: Introduce is_debug_enabled()
Platform specific code also needs to give debug output.
Introduce is_debug_enabled() for this purpose.

No functional changes are expected.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:52 -07:00
Zhang Rui
05aab5b8c1 tools/power/x86/intel-speed-select: Allow api_version based platform callbacks
Different api_version suggests different kernel driver used and
different interface is used to communication with the hardware.

Allow setting platform specific callbacks based on api_version.

Currently, all platforms with api_version 1 uses Mbox/MMIO interfaces.

No functional changes are expected.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:52 -07:00
Zhang Rui
2b86ed225e tools/power/x86/intel-speed-select: Move send_mbox_cmd to isst-core-mbox.c
After the previous cleanup, there is no user of send_mbox_cmd outside of
isst-core-mbox.c.
Thus move send_mbox_cmd to isst-core-mbox.c as internal functions.

No functional changes are expected.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:52 -07:00
Zhang Rui
73452ccc19 tools/power/x86/intel-speed-select: Abstract adjust_uncore_freq
Allow platform specific implementation to adjust the uncore frequency.

No functional changes are expected.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:52 -07:00
Zhang Rui
8f54104f7a tools/power/x86/intel-speed-select: Abstract read_pm_config
Allow platform specific implementation to get SST-CP capability and
current state.

No functional changes are expected.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:52 -07:00
Zhang Rui
a59a6c0cad tools/power/x86/intel-speed-select: Abstract clos_associate
Allow platform specific implementation to set per core CLOS setting.

No functional changes are expected.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:52 -07:00
Zhang Rui
b161bbad6d tools/power/x86/intel-speed-select: Abstract clos_get_assoc_status
Allow platform specific implementation to get per core CLOS setting.

No functional changes are expected.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:52 -07:00
Zhang Rui
33dbf360db tools/power/x86/intel-speed-select: Abstract set_clos
Allow platform specific implementation to set CLOS priority setting.

No functional changes are expected.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:52 -07:00
Zhang Rui
43314e798c tools/power/x86/intel-speed-select: Abstract pm_get_clos
Allow platform specific implementation to get CLOS priority setting.

No functional changes are expected.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:52 -07:00
Zhang Rui
904d2baa8b tools/power/x86/intel-speed-select: Abstract pm_qos_config
Allow platform specific implementation to set CLOS config settings.

No functional changes are expected.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:52 -07:00
Zhang Rui
a07bdb81c1 tools/power/x86/intel-speed-select: Abstract get_clos_information
Allow platform specific implementation to get CLOS config setting.

No functional changes are expected.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:51 -07:00
Zhang Rui
4a17b29188 tools/power/x86/intel-speed-select: Abstract get_get_trls
Allow platform specific implementation to get turbo ratio limits of each
AVX level, for a selected SST-PP level.

No functional changes are expected.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:51 -07:00
Zhang Rui
8559328315 tools/power/x86/intel-speed-select: Enhance get_tdp_info
mbox_get_uncore_p0_p1_info/get_p1_info/get_uncore_mem_freq can be done
inside get_tdp_info().

Fold the code into get_tdp_info().

No functional changes are expected.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
2023-03-22 13:36:51 -07:00