Commit Graph

18863 Commits

Author SHA1 Message Date
Will Deacon
e5f5210212 Merge branch 'for-next/trbe-errata' into for-next/core
* for-next/trbe-errata:
  arm64: errata: Add detection for TRBE write to out-of-range
  arm64: errata: Add workaround for TSB flush failures
  arm64: errata: Add detection for TRBE overwrite in FILL mode
  arm64: Add Neoverse-N2, Cortex-A710 CPU part definition
2021-10-29 12:25:33 +01:00
Will Deacon
655ee5571f Merge branch 'for-next/sve' into for-next/core
* for-next/sve:
  arm64/sve: Fix warnings when SVE is disabled
  arm64/sve: Add stub for sve_max_virtualisable_vl()
  arm64/sve: Track vector lengths for tasks in an array
  arm64/sve: Explicitly load vector length when restoring SVE state
  arm64/sve: Put system wide vector length information into structs
  arm64/sve: Use accessor functions for vector lengths in thread_struct
  arm64/sve: Rename find_supported_vector_length()
  arm64/sve: Make access to FFR optional
  arm64/sve: Make sve_state_size() static
  arm64/sve: Remove sve_load_from_fpsimd_state()
  arm64/fp: Reindent fpsimd_save()
2021-10-29 12:25:29 +01:00
Will Deacon
16c200e040 Merge branch 'for-next/pfn-valid' into for-next/core
* for-next/pfn-valid:
  arm64/mm: drop HAVE_ARCH_PFN_VALID
  dma-mapping: remove bogus test for pfn_valid from dma_map_resource
2021-10-29 12:25:19 +01:00
Will Deacon
7066248c44 Merge branch 'for-next/mte' into for-next/core
* for-next/mte:
  kasan: Extend KASAN mode kernel parameter
  arm64: mte: Add asymmetric mode support
  arm64: mte: CPU feature detection for Asymm MTE
  arm64: mte: Bitfield definitions for Asymm MTE
  kasan: Remove duplicate of kasan_flag_async
  arm64: kasan: mte: move GCR_EL1 switch to task switch when KASAN disabled
2021-10-29 12:25:08 +01:00
Will Deacon
dc6bab18fb Merge branch 'for-next/mm' into for-next/core
* for-next/mm:
  arm64: mm: update max_pfn after memory hotplug
  arm64/mm: Add pud_sect_supported()
  arm64: mm: Drop pointless call to set_max_mapnr()
2021-10-29 12:25:04 +01:00
Will Deacon
2bc655ce29 Merge branch 'for-next/misc' into for-next/core
* for-next/misc:
  arm64: Select POSIX_CPU_TIMERS_TASK_WORK
  arm64: Document boot requirements for FEAT_SME_FA64
  arm64: ftrace: use function_nocfi for _mcount as well
  arm64: asm: setup.h: export common variables
  arm64/traps: Avoid unnecessary kernel/user pointer conversion
2021-10-29 12:24:59 +01:00
Will Deacon
d8a2c0fba5 Merge branch 'for-next/kexec' into for-next/core
* for-next/kexec:
  arm64: trans_pgd: remove trans_pgd_map_page()
  arm64: kexec: remove cpu-reset.h
  arm64: kexec: remove the pre-kexec PoC maintenance
  arm64: kexec: keep MMU enabled during kexec relocation
  arm64: kexec: install a copy of the linear-map
  arm64: kexec: use ld script for relocation function
  arm64: kexec: relocate in EL1 mode
  arm64: kexec: configure EL2 vectors for kexec
  arm64: kexec: pass kimage as the only argument to relocation function
  arm64: kexec: Use dcache ops macros instead of open-coding
  arm64: kexec: skip relocation code for inplace kexec
  arm64: kexec: flush image and lists during kexec load time
  arm64: hibernate: abstract ttrb0 setup function
  arm64: trans_pgd: hibernate: Add trans_pgd_copy_el2_vectors
  arm64: kernel: add helper for booted at EL2 and not VHE
2021-10-29 12:24:47 +01:00
Will Deacon
99fe09c857 Merge branch 'for-next/extable' into for-next/core
* for-next/extable:
  arm64: vmlinux.lds.S: remove `.fixup` section
  arm64: extable: add load_unaligned_zeropad() handler
  arm64: extable: add a dedicated uaccess handler
  arm64: extable: add `type` and `data` fields
  arm64: extable: use `ex` for `exception_table_entry`
  arm64: extable: make fixup_exception() return bool
  arm64: extable: consolidate definitions
  arm64: gpr-num: support W registers
  arm64: factor out GPR numbering helpers
  arm64: kvm: use kvm_exception_table_entry
  arm64: lib: __arch_copy_to_user(): fold fixups into body
  arm64: lib: __arch_copy_from_user(): fold fixups into body
  arm64: lib: __arch_clear_user(): fold fixups into body
2021-10-29 12:24:37 +01:00
Linus Torvalds
411a44c24a Networking fixes for 5.15-rc8/final, including fixes from WiFi
(mac80211), and BPF.
 
 Current release - regressions:
 
  - skb_expand_head: adjust skb->truesize to fix socket memory
    accounting
 
  - mptcp: fix corrupt receiver key in MPC + data + checksum
 
 Previous releases - regressions:
 
  - multicast: calculate csum of looped-back and forwarded packets
 
  - cgroup: fix memory leak caused by missing cgroup_bpf_offline
 
  - cfg80211: fix management registrations locking, prevent list
    corruption
 
  - cfg80211: correct false positive in bridge/4addr mode check
 
  - tcp_bpf: fix race in the tcp_bpf_send_verdict resulting in reusing
    previous verdict
 
 Previous releases - always broken:
 
  - sctp: enhancements for the verification tag, prevent attackers
    from killing SCTP sessions
 
  - tipc: fix size validations for the MSG_CRYPTO type
 
  - mac80211: mesh: fix HE operation element length check, prevent
    out of bound access
 
  - tls: fix sign of socket errors, prevent positive error codes
    being reported from read()/write()
 
  - cfg80211: scan: extend RCU protection in cfg80211_add_nontrans_list()
 
  - implement ->sock_is_readable() for UDP and AF_UNIX, fix poll()
    for sockets in a BPF sockmap
 
  - bpf: fix potential race in tail call compatibility check resulting
    in two operations which would make the map incompatible succeeding
 
  - bpf: prevent increasing bpf_jit_limit above max
 
  - bpf: fix error usage of map_fd and fdget() in generic batch update
 
  - phy: ethtool: lock the phy for consistency of results
 
  - prevent infinite while loop in skb_tx_hash() when Tx races with
    driver reconfiguring the queue <> traffic class mapping
 
  - usbnet: fixes for bad HW conjured by syzbot
 
  - xen: stop tx queues during live migration, prevent UAF
 
  - net-sysfs: initialize uid and gid before calling net_ns_get_ownership
 
  - mlxsw: prevent Rx stalls under memory pressure
 
 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE6jPA+I1ugmIBA4hXMUZtbf5SIrsFAmF6zR8ACgkQMUZtbf5S
 Irtu4w//e7BJVjn1zKnGHo5SdpHwIxePP5sgD7rGT9udTlYUeteRAEQPALlA8oHo
 6nx59eZBlvOt4+1yyK8qVzT94aLca8dwJ4j7dlONrvLFyWinSUlSZ5ayH8Co2f8t
 ZGYVg+EinR6b+iaeUp5PG0VGbW+FmyIO6iS2xytireJxW6sytZ2BLlrus4+j7BCM
 oCaLD+P6A1bCH1PxDMO2GRFNXphxPX3azec33HpNevHD0iwdgrjAlnz0+PZ5uiEA
 AQ92PVw59+I1el/h0SxDsxfOrCdUMWbM4ZoC2wf0jDC8o6tAg4KxhlI0lAiMvhla
 iqo0BTxhMWAeqC4CMmZJVGAR7zY7xpZiLowp92qSCzZpG0XKVxPaomLFGHFiU3Im
 JDNGGmWAsE5maWsMbUtGr9Gd4Gxoor5r2YfFwCBsMsg7VtO98lCIdORi44VGVD3A
 z2OtHEk0ismOmu8ktDumpFPTF0l1G5HR+YxsVP7obEh3T+hv4nEwPtHQ7OsByuxg
 BBUrmOGr3hB5kcYtbmT/CqLqGXHNCCEAS0f+7mCPsGJfMvsOZeVurdk5GS7SjPIE
 870ogJycV+KRP7ZoefXQxiRe9oCmQs9tFQqCxyPwZ8O5vevTx78D5vj1dkuF4Q5w
 cbn2qbgJAtNe0UN1Gxw3emarofXarAVQoO7n+29CDFG5fe/NlnY=
 =61p6
 -----END PGP SIGNATURE-----

Merge tag 'net-5.15-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

Pull networking fixes from Jakub Kicinski:
 "Including fixes from WiFi (mac80211), and BPF.

  Current release - regressions:

   - skb_expand_head: adjust skb->truesize to fix socket memory
     accounting

   - mptcp: fix corrupt receiver key in MPC + data + checksum

  Previous releases - regressions:

   - multicast: calculate csum of looped-back and forwarded packets

   - cgroup: fix memory leak caused by missing cgroup_bpf_offline

   - cfg80211: fix management registrations locking, prevent list
     corruption

   - cfg80211: correct false positive in bridge/4addr mode check

   - tcp_bpf: fix race in the tcp_bpf_send_verdict resulting in reusing
     previous verdict

  Previous releases - always broken:

   - sctp: enhancements for the verification tag, prevent attackers from
     killing SCTP sessions

   - tipc: fix size validations for the MSG_CRYPTO type

   - mac80211: mesh: fix HE operation element length check, prevent out
     of bound access

   - tls: fix sign of socket errors, prevent positive error codes being
     reported from read()/write()

   - cfg80211: scan: extend RCU protection in
     cfg80211_add_nontrans_list()

   - implement ->sock_is_readable() for UDP and AF_UNIX, fix poll() for
     sockets in a BPF sockmap

   - bpf: fix potential race in tail call compatibility check resulting
     in two operations which would make the map incompatible succeeding

   - bpf: prevent increasing bpf_jit_limit above max

   - bpf: fix error usage of map_fd and fdget() in generic batch update

   - phy: ethtool: lock the phy for consistency of results

   - prevent infinite while loop in skb_tx_hash() when Tx races with
     driver reconfiguring the queue <> traffic class mapping

   - usbnet: fixes for bad HW conjured by syzbot

   - xen: stop tx queues during live migration, prevent UAF

   - net-sysfs: initialize uid and gid before calling
     net_ns_get_ownership

   - mlxsw: prevent Rx stalls under memory pressure"

* tag 'net-5.15-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (67 commits)
  Revert "net: hns3: fix pause config problem after autoneg disabled"
  mptcp: fix corrupt receiver key in MPC + data + checksum
  riscv, bpf: Fix potential NULL dereference
  octeontx2-af: Fix possible null pointer dereference.
  octeontx2-af: Display all enabled PF VF rsrc_alloc entries.
  octeontx2-af: Check whether ipolicers exists
  net: ethernet: microchip: lan743x: Fix skb allocation failure
  net/tls: Fix flipped sign in async_wait.err assignment
  net/tls: Fix flipped sign in tls_err_abort() calls
  net/smc: Correct spelling mistake to TCPF_SYN_RECV
  net/smc: Fix smc_link->llc_testlink_time overflow
  nfp: bpf: relax prog rejection for mtu check through max_pkt_offset
  vmxnet3: do not stop tx queues after netif_device_detach()
  r8169: Add device 10ec:8162 to driver r8169
  ptp: Document the PTP_CLK_MAGIC ioctl number
  usbnet: fix error return code in usbnet_probe()
  net: hns3: adjust string spaces of some parameters of tx bd info in debugfs
  net: hns3: expand buffer len for some debugfs command
  net: hns3: add more string spaces for dumping packets number of queue info in debugfs
  net: hns3: fix data endian problem of some functions of debugfs
  ...
2021-10-28 10:17:31 -07:00
Marc Zyngier
c6dca712f6 Merge branch irq/remove-handle-domain-irq-20211026 into irq/irqchip-next
* irq/remove-handle-domain-irq-20211026:
  : Large rework of the architecture entry code from Mark Rutland.
  : From the cover letter:
  :
  : <quote>
  : The handle_domain_{irq,nmi}() functions were oringally intended as a
  : convenience, but recent rework to entry code across the kernel tree has
  : demonstrated that they cause more pain than they're worth and prevent
  : architectures from being able to write robust entry code.
  :
  : This series reworks the irq code to remove them, handling the necessary
  : entry work consistently in entry code (be it architectural or generic).
  : </quote>
  MIPS: irq: Avoid an unused-variable error
  irq: remove handle_domain_{irq,nmi}()
  irq: remove CONFIG_HANDLE_DOMAIN_IRQ_IRQENTRY
  irq: riscv: perform irqentry in entry code
  irq: openrisc: perform irqentry in entry code
  irq: csky: perform irqentry in entry code
  irq: arm64: perform irqentry in entry code
  irq: arm: perform irqentry in entry code
  irq: add a (temporary) CONFIG_HANDLE_DOMAIN_IRQ_IRQENTRY
  irq: nds32: avoid CONFIG_HANDLE_DOMAIN_IRQ
  irq: arc: avoid CONFIG_HANDLE_DOMAIN_IRQ
  irq: add generic_handle_arch_irq()
  irq: unexport handle_irq_desc()
  irq: simplify handle_domain_{irq,nmi}()
  irq: mips: simplify do_domain_IRQ()
  irq: mips: stop (ab)using handle_domain_irq()
  irq: mips: simplify bcm6345_l1_irq_handle()
  irq: mips: avoid nested irq_enter()

Signed-off-by: Marc Zyngier <maz@kernel.org>
2021-10-28 13:34:52 +01:00
Nicolas Saenz Julienne
a68773bd32 arm64: Select POSIX_CPU_TIMERS_TASK_WORK
With 6caa5812e2 ("KVM: arm64: Use generic KVM xfer to guest work
function") all arm64 exit paths are properly equipped to handle the
POSIX timers' task work.

Deferring timer callbacks to thread context, not only limits the amount
of time spent in hard interrupt context, but is a safer
implementation[1], and will allow PREEMPT_RT setups to use KVM[2].

So let's enable POSIX_CPU_TIMERS_TASK_WORK on arm64.

[1] https://lore.kernel.org/all/20200716201923.228696399@linutronix.de/
[2] https://lore.kernel.org/linux-rt-users/87v92bdnlx.ffs@tglx/

Signed-off-by: Nicolas Saenz Julienne <nsaenzju@redhat.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20211018144713.873464-1-nsaenzju@redhat.com
Signed-off-by: Will Deacon <will@kernel.org>
2021-10-28 09:56:23 +01:00
Dave Airlie
970eae1560 Linux 5.15-rc7
-----BEGIN PGP SIGNATURE-----
 
 iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAmF298ceHHRvcnZhbGRz
 QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGIJYH/1rsEFQQ6caeQdy1
 z9eFIe48DNM4l7bFk+qEj2UAbzPdahVJ299Mg5fW0n2CDemOc9/n0b9TxQ37YObi
 mOzu0xwJVupIxkyFMPQSSc2q8aLm67NSpJy08DsmaNses5hSvu8x15RPHLQTybjt
 SwtKns+jpCq79P1GWbrB5e5UkLb0VNoxNp4L1U4pMrYGcEkJUXbaxNY2V/JcXdM7
 Vtn+qN0T/J6V6QVftv0t8Ecj3bjEnmL3kZHaTaNg3dGeKRpCGyHc5lcBQ0cNFG6t
 vjZ9VbuhBzGI3TN2tHH5hpA1UXo7HPBBCwQqxF1jeGLGHULikYwZ3TAPWqL3QZqC
 9cxr9SY=
 =p75d
 -----END PGP SIGNATURE-----

BackMerge tag 'v5.15-rc7' into drm-next

The msm next tree is based on rc3, so let's just backmerge rc7 before pulling it in.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2021-10-28 14:59:38 +10:00
Suzuki K Poulose
561ced0bb9 arm64: errata: Enable TRBE workaround for write to out-of-range address
With the TRBE driver workaround available, enable the config symbols
to be built without COMPILE_TEST

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-16-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
2021-10-27 11:46:06 -06:00
Suzuki K Poulose
74b2740f57 arm64: errata: Enable workaround for TRBE overwrite in FILL mode
With the workaround enabled in TRBE, enable the config entries
to be built without COMPILE_TEST

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-15-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
2021-10-27 11:46:04 -06:00
Arnd Bergmann
c17c7cc775 Apple SoC DT updates for 5.16. Adds pinctrl and PCIe nodes.
-----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQSU7I7lUkZru3Mt15+lhN6SrnTN2AUCYXlFhAAKCRClhN6SrnTN
 2LD8AQDtmREY69BH2TAwaOK4J8g3TY+4oqYcTfwrh5D1PVfq0AD+NsCQWz8zxHF7
 oBkOWdbaTyPqSRg6E4LliR9VUgWFOwQ=
 =BAGP
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmF5VbsACgkQmmx57+YA
 GNmUxhAAgSWfVo2VjDLaCWFDeAVWvJfhFAPENJqcfT8/b2X0vGpXLrPIzVEEvHfe
 4qd0uSyBxLvm1virI/goccjmBW33imS+hLGaecD1bzMmcdMfepL+3J8BqIZwCMD6
 zrX4jQt1uB+BTScPlJz/qPB0MJcL83cTXiAu6BW/QS974xX71XjAcJsTUr7iAqQ1
 RjFaMGaUvynm9n7HDAi6ODFVDu6dBcVp1pARxJ2k9hZYuVw6PfjojiFjUQkubO1Q
 LUiDo17RDtbu6BoGkZd4hn15XmdKXdj8AKKxS0PlFyYJRGOlE3fj49wX0rCx363P
 aQgzxlZcUQeSInH2TbayJSYI9ZnkMMxs3UKJ30bY/n+InA0DJIUOWvulIF+cobqW
 tFohTTbkPGnGc0ZVe1UwPfJGjxwbbcQjEoS9wRl3XzLuI90GQUCo+oUq1RoypMdW
 /EQLAMUk7ixF72AkJxo6pR0f4thJ1UDmkz3i20MqXBNP70eL/PUak8XEwlEC8fsu
 srRVw+reqTNpMb0dXYwvdk6djXB8oX3FKBRzn33f87da2AoIbw+lggzmhe0aCwLD
 zyTDuJP5dNhIXkwxq2PchYxIei1SpLywVAnFFrT9UKGPyUfcHP2mLFPFMH12ncTA
 FqFN3GJP2Nat4xdN5rEYICh8+KKLKZZXbjd6KN08z5mJIOeR6NQ=
 =CuMn
 -----END PGP SIGNATURE-----

Merge tag 'asahi-soc-dt-5.16-v2' of https://github.com/AsahiLinux/linux into arm/dt

Apple SoC DT updates for 5.16. Adds pinctrl and PCIe nodes.

* tag 'asahi-soc-dt-5.16-v2' of https://github.com/AsahiLinux/linux:
  arm64: dts: apple: j274: Expose PCI node for the Ethernet MAC address
  arm64: dts: apple: t8103: Add root port interrupt routing
  arm64: dts: apple: t8103: Add PCIe DARTs
  arm64: apple: Add PCIe node
  arm64: apple: Add pinctrl nodes

Link: https://lore.kernel.org/r/6d41b29c-dafa-9b0e-d9ff-fe01eb6dce82@marcan.st
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-27 15:35:55 +02:00
Marc Zyngier
e1bebf9781 arm64: dts: apple: j274: Expose PCI node for the Ethernet MAC address
At the moment, all the Minis running Linux have the same MAC
address (00:10:18:00:00:00), which is a bit annoying.

Expose the PCI node corresponding to the Ethernet device, and
declare a 'local-mac-address' property. The bootloader will update
it (m1n1 already has the required feature). And if it doesn't, then
the default value is already present in the DT.

This relies on forcing the bus number for each port so that the
endpoints connected to them are correctly numbered (and keeps dtc
quiet).

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-10-27 21:12:32 +09:00
Marc Zyngier
128888a6fd arm64: dts: apple: t8103: Add root port interrupt routing
Add the interrupt-map properties that are required for INTx
signalling.

Tested-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-10-27 21:12:30 +09:00
Marc Zyngier
3c866bb795 arm64: dts: apple: t8103: Add PCIe DARTs
PCIe on the Apple M1 (aka t8103) requires the use of IOMMUs (aka
DARTs). Add the three instances that deal with the internal PCIe
ports and route each port's traffic through its DART.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-10-27 21:12:28 +09:00
Mark Kettenis
ff2a8d91d8 arm64: apple: Add PCIe node
Add node corresponding to the apcie,t8103 node in the
Apple device tree for the Mac mini (M1, 2020).

Power domain references and DART (IOMMU) references are left out
at the moment and will be added once the appropriate bindings have
been settled upon.

Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210921183420.436-5-kettenis@openbsd.org
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-10-27 21:12:25 +09:00
Mark Kettenis
0a8282b831 arm64: apple: Add pinctrl nodes
Add pinctrl nodes corresponding to the gpio,t8101 nodes in the
Apple device tree for the Mac mini (M1, 2020).

Clock references are left out at the moment and will be added once
the appropriate bindings have been settled upon.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210520171310.772-3-mark.kettenis@xs4all.nl
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-10-27 21:12:24 +09:00
Linus Torvalds
d25f27432f ARM: SoC fixes for 5.15, part 3
One last set of small fixes for the soc tree:
 
  - Incorrect ethernet phy settings found on i.mx and
    allwinner platforms
 
  - a revert for a Qualcomm DT change that caused a boot
    regression
 
  - four patches for incorrect settings in i.MX DT files
 
  - new MAINTAINER file entries for dhcom boards
 
  - a Kconfig fix for a reset driver that became unselectable
 
  - three more code changes for bugs in reset drivers
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmF4aYcACgkQmmx57+YA
 GNkLvw/8CROdWYOk8D7y3KlJjSTkCnpajzKRxFuP0hkdZPpdVqYZe1ZMenZMCQ88
 UcqRwxtSBLihRIqfbPwTNzvz83sOt4L/DfMFPJclLD45Kx6VuezOIx6ga4Y2H9kB
 Zh8HEmcKjdIDvtRakqtbujOUK8HGXnAJGZip8vJOMexHyLB4FoA/2IB2m5U3sYoE
 l3OcQCfVAwfCpXrQIuPtJhf2qSMbDOQG08TC4Wo8xKRWE2K7koyH6oh/FDDPl64c
 MAIA2zy9cQHizCLKBsyv55f4evhqwMMHwituQcp4HWntOv+yBtqyzwb8wm8Ovn1S
 3eGJAjIw7RbeJiji5CUkeIzXlZR/z6B9RV5XDyrTD3xgXe7cqhv7lUHViBzZMYS3
 CG8h86H/dCUCL0IFeBLcsTPuehnQbRrS/AXlRNVLtvFru/9lBx7VnOilq6tggots
 Eb7sUhZnabzE1heiPh0ydGm/ZpHWJ6hfTpmY+XpFDYHh/roHw1P8vQSe425clyGx
 JkipnBSeZF5m99OwGD+cPwfjkQGllkXhTEtZIlzmK5iycvcugRvy52ol/2iToTDK
 RohDPTjtoaeYjk1LoTt4EaqRjwMwHI3yNvvRMPT7AZghxFaFia+A+K6+o3v9B4fK
 jjj+dhfO6hJsc9fTtpiAxi/hPbFRfMKviF9fNXZYtHtdUNj6P0Y=
 =EB7G
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc-fixes-5.15-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "One last set of small fixes for the soc tree:

   - Incorrect ethernet phy settings found on i.mx and allwinner
     platforms

   - a revert for a Qualcomm DT change that caused a boot regression

   - four patches for incorrect settings in i.MX DT files

   - new MAINTAINER file entries for dhcom boards

   - a Kconfig fix for a reset driver that became unselectable

   - three more code changes for bugs in reset drivers"

* tag 'arm-soc-fixes-5.15-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  MAINTAINERS: Add maintainers for DHCOM i.MX6 and DHCOM/DHCOR STM32MP1
  Revert "arm64: dts: qcom: sm8250: remove bus clock from the mdss node for sm8250 target"
  arm64: dts: imx8mm-kontron: Fix connection type for VSC8531 RGMII PHY
  arm64: dts: imx8mm-kontron: Fix CAN SPI clock frequency
  arm64: dts: imx8mm-kontron: Fix polarity of reg_rst_eth2
  arm64: dts: imx8mm-kontron: Set lower limit of VDD_SNVS to 800 mV
  arm64: dts: imx8mm-kontron: Make sure SOC and DRAM supply voltages are correct
  reset: socfpga: add empty driver allowing consumers to probe
  reset: tegra-bpmp: Handle errors in BPMP response
  reset: pistachio: Re-enable driver selection
  reset: brcmstb-rescal: fix incorrect polarity of status bit
  ARM: dts: sun7i: A20-olinuxino-lime2: Fix ethernet phy-mode
  arm64: dts: allwinner: h5: NanoPI Neo 2: Fix ethernet node
2021-10-26 15:24:33 -07:00
Jakub Kicinski
440ffcdd9d Merge https://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf
Daniel Borkmann says:

====================
pull-request: bpf 2021-10-26

We've added 12 non-merge commits during the last 7 day(s) which contain
a total of 23 files changed, 118 insertions(+), 98 deletions(-).

The main changes are:

1) Fix potential race window in BPF tail call compatibility check, from Toke Høiland-Jørgensen.

2) Fix memory leak in cgroup fs due to missing cgroup_bpf_offline(), from Quanyang Wang.

3) Fix file descriptor reference counting in generic_map_update_batch(), from Xu Kuohai.

4) Fix bpf_jit_limit knob to the max supported limit by the arch's JIT, from Lorenz Bauer.

5) Fix BPF sockmap ->poll callbacks for UDP and AF_UNIX sockets, from Cong Wang and Yucong Sun.

6) Fix BPF sockmap concurrency issue in TCP on non-blocking sendmsg calls, from Liu Jian.

7) Fix build failure of INODE_STORAGE and TASK_STORAGE maps on !CONFIG_NET, from Tejun Heo.

* https://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf:
  bpf: Fix potential race in tail call compatibility check
  bpf: Move BPF_MAP_TYPE for INODE_STORAGE and TASK_STORAGE outside of CONFIG_NET
  selftests/bpf: Use recv_timeout() instead of retries
  net: Implement ->sock_is_readable() for UDP and AF_UNIX
  skmsg: Extract and reuse sk_msg_is_readable()
  net: Rename ->stream_memory_read to ->sock_is_readable
  tcp_bpf: Fix one concurrency problem in the tcp_bpf_send_verdict function
  cgroup: Fix memory leak caused by missing cgroup_bpf_offline
  bpf: Fix error usage of map_fd and fdget() in generic_map_update_batch()
  bpf: Prevent increasing bpf_jit_limit above max
  bpf: Define bpf_jit_alloc_exec_limit for arm64 JIT
  bpf: Define bpf_jit_alloc_exec_limit for riscv JIT
====================

Link: https://lore.kernel.org/r/20211026201920.11296-1-daniel@iogearbox.net
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-10-26 14:38:55 -07:00
Arnd Bergmann
d584cdc9e8 Qualcomm ARM64 DTS additional patches for v5.16
The RPM and RPMh sleep stats are introduced on a number of platforms, to
 aid the enablement of entering low power mode.
 
 The MSM8916 support receives some polishing touches, followed by
 introduction of the necessary pieces to use the DeviceTree on 32-bit
 variants of the MSM8916 platform, in particular to boot the secondary
 CPUs. Based on this support for the Samsung Galaxy S4 Mini Value Edition
 is introduced.
 
 The Asus Zenfone 2 Laser gained touchscreen, sensors and sdcard support.
 
 MSM8996 got support for the its crypto hardware and the Xiaomi Mi 5
 gained a description of its LCD panel.
 
 The Trogdor device on SC7180 gained support for a second source eDP
 brigde, while SC7280 gains PCIe support and the newly introduced
 Herobrine device.
 
 Both MSM8916 and SDM845 has their standalong SMEM node dropped, in favour
 of the newly introduced support for specifying the compatible directly
 on the reserved-memory node.
 
 The SM7225 platform is introduced, as a derrivative of SM6350, initial
 support for the PM6350 PMIC and based on this the Fairphone 4 is
 introduced.
 
 The RB3 and RB5 devices gains msm-id and board-id, to allow the two DTBs
 to be baked into a single boot.img that can be booted on both devices.
 
 As the GDSC driver has been extended to properly describe the
 relationship between MMCX and MDSS_GDSC, the now deprecated mmcx
 regulator is removed from SM8250.
 
 SM8350 gained CPU topology, idle-states and fastrpc support. FastRPC was
 also added for SM8150 and the SA8155p ADP got a couple of remoteprocs
 enabled.
 
 Additionally a number of DT validation issues was corrected across the
 various platforms and devices.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmF4YM4bHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FzjsP/306Q4le1jTZBiGaR0b0
 BR3qqBFZLWfoBzonyzeLZJgs/zqHRzcibDtwe1a8G/0zRKrAS43zXNyDyOp6Ng19
 vWWU9Yi9KrfFpYOo+J6TZ0uo4WrGyeepGgxoL1elHyEtqslKDEi+0xICz8nQbG/8
 phnUbo88Dq8fkEA7EtIi8+hJAqp1Nne1bcHQ2YGsWiHH8yfYIdQtv/MvRq6crhEw
 g2EgNIDP8ne1+OsorGEXGYEL3IE/7hGiw8cJ3T9kg198UHKGLjBlJs2z8p3nweuP
 3z/t0dDSTMRIr7sTZAIMATHhRoBdPyVV5qUrEZhGfJAdW68Ftsu29c2/tdbD/qGe
 l49bG3R6TETqW3lVjT6gcdJWiUPfycKTuexLGF5ZIYkfvmBBA9UlJKJeaO4nTsQt
 3R/nLNfCG4aua2r+vrQMkxZvTt8zvk57t4cflmuvbVcF2iyGBagLhW64gGc4VgvS
 NL3sGcYvCJzVhLkrMA5zPtUe1dpeDjO9YsGvLLZDBf/7JCWAg8G5O1zNsJwnsCv4
 IPJcWPmn8k1t+Nnmz50RnWFo4vwNSTwfX4NgqIT0TjFaoAyxhW/7UWFnx7l4tKS8
 KpWixdb+4Vs7OZ0kkOD+oYSNqGsMBU5RfyDEgX1JzU8UbkJIbtn37OU7/fMCfcvG
 s3ND+lPb/BF5g2EUgEOCB/L0
 =fQI7
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmF4ZOUACgkQmmx57+YA
 GNl02w//WEyEfidchHkf45Tgh+8kdT40qJwWEARaKpVDcyYFt2kEqYKHK3zfEqfg
 6nCQYO42Zv3huOaFmG3xLcQcDzNBPIO+v1IAZUn6twIBFIUQh/HGMLgS3zyYNI5R
 5gW7/4YmReCZZ9qd0zbQ2Kxjx1EZL8N3gsQ+zvKAxckEYlVQoo55SdvrKi4B2XnZ
 XEg3FQ8qeUvUnMBnZngKRTMApyN6IZ0YNYLgqEfYBN11nFobxL2SPm+mLIYS+0O/
 SB6AALEcYb4ef0O4Nig7zjrg+brpIiqwk7s+DXqb9sCnXUoPUM7uln4HraCj4zpR
 I3WJBqHTNhFTDkPx6CBgBf6UZL8ByN/A4O/PNsYXnyFX38lHgBrstr/ZOUEBa2LT
 /HCcrAqmE6QDdFq/64tM9iEWmrLOGkvX9xhVoCpXwSW6bRpgWIgLTS0ARZvcPEsZ
 z4d0PYVozDf+xjMXn6Qy18xW5h7B/Crefvy7oK/tkW5uAoYN/GxqIsN1Do2yw9he
 md25WPaE/Aqf3vEcq4Oq0Z9jAZPO56CsoSCWRSRVKt77sjC+bef3Lpf6wUdKUJLW
 il2ZMsu6+htLngVaxa2swB7tmrLur61h1/7oOjbLHgYOPC+DwmSvrVWJXymcTpJp
 bya0edkzm2Sr7JKIGWEKonMocqhOwq8R7DMjrAA6JxF92BKmPR0=
 =OHZ9
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM64 DTS additional patches for v5.16

The RPM and RPMh sleep stats are introduced on a number of platforms, to
aid the enablement of entering low power mode.

The MSM8916 support receives some polishing touches, followed by
introduction of the necessary pieces to use the DeviceTree on 32-bit
variants of the MSM8916 platform, in particular to boot the secondary
CPUs. Based on this support for the Samsung Galaxy S4 Mini Value Edition
is introduced.

The Asus Zenfone 2 Laser gained touchscreen, sensors and sdcard support.

MSM8996 got support for the its crypto hardware and the Xiaomi Mi 5
gained a description of its LCD panel.

The Trogdor device on SC7180 gained support for a second source eDP
brigde, while SC7280 gains PCIe support and the newly introduced
Herobrine device.

Both MSM8916 and SDM845 has their standalong SMEM node dropped, in favour
of the newly introduced support for specifying the compatible directly
on the reserved-memory node.

The SM7225 platform is introduced, as a derrivative of SM6350, initial
support for the PM6350 PMIC and based on this the Fairphone 4 is
introduced.

The RB3 and RB5 devices gains msm-id and board-id, to allow the two DTBs
to be baked into a single boot.img that can be booted on both devices.

As the GDSC driver has been extended to properly describe the
relationship between MMCX and MDSS_GDSC, the now deprecated mmcx
regulator is removed from SM8250.

SM8350 gained CPU topology, idle-states and fastrpc support. FastRPC was
also added for SM8150 and the SA8155p ADP got a couple of remoteprocs
enabled.

Additionally a number of DT validation issues was corrected across the
various platforms and devices.

* tag 'qcom-arm64-for-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (77 commits)
  Revert "arm64: dts: qcom: msm8916-asus-z00l: Add sensors"
  arm64: dts: qcom: ipq6018: Remove unused 'iface_clk' property from dma-controller node
  arm64: dts: qcom: ipq6018: Remove unused 'qcom,config-pipe-trust-reg' property
  arm64: dts: qcom: sm8350: Add CPU topology and idle-states
  arm64: dts: qcom: Drop unneeded extra device-specific includes
  arm64: dts: qcom: msm8916: Drop standalone smem node
  arm64: dts: qcom: Fix node name of rpm-msg-ram device nodes
  arm64: dts: qcom: msm8916-asus-z00l: Add sensors
  arm64: dts: qcom: msm8916-asus-z00l: Add SDCard
  arm64: dts: qcom: msm8916-asus-z00l: Add touchscreen
  arm64: dts: qcom: sdm845-oneplus: remove devinfo-size from ramoops node
  arm64: dts: qcom: sdm845: Fix Qualcomm crypto engine bus clock
  arm64: dts: qcom: msm8996: Add device tree entries to support crypto engine
  arm64: dts: qcom: msm8996: move clock-frequency from PN547 NFC to I2C bus
  arm64: dts: qcom: msm8916-asus-z00l: Add sensors
  arm64: dts: qcom: sdm630: Add disabled Venus support
  arm64: dts: qcom: pm660l: Remove board-specific WLED configuration
  arm64: dts: qcom: Move WLED num-strings from pmi8994 to sony-xperia-tone
  arm64: dts: qcom: pmi8994: Remove hardcoded linear WLED enabled-strings
  arm64: dts: qcom: pmi8994: Fix "eternal"->"external" typo in WLED node
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-26 22:28:18 +02:00
Arnd Bergmann
fa348938db Qualcomm ARM64 defconfig updates for v5.16
The major change here is the disabling of the firmware loades user space
 fallback, this is done as arm64 is the only platform with this flag
 enabled and as a result doesn't play nice with standard distributions.
 
 It then enables the new limits driver, which controls the hardware based
 thermal mitigation on a range of Qualcomm platforms. The prima/pronto
 WiFi and Bluetooth drivers are enabled to ensure these features works
 out of the box, now that the last details in the dts are landed.
 
 The new driver for acquiring sleep stats is enabled to facilitate the
 various efforts on getting these platforms into low power mode.
 
 Lastly the base SC7280 drivers needed to simply boot this platform are
 enabled.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmF4BzsbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FP+4QANBsizO+Cgzm7x4hYjzc
 vgLsa5qzgIEhjcDrCrRZe91HkzeE5HnzkKGWUMi+JO4SOTGeCYZf+txm012Tjtnv
 w8kFbRMY3OxfAijM00euSIKxIGjM3aKq7UJ4qplDXSKVhVzqlsHjFhaGBzT/CMcW
 3ViSinJiXuCQ2+5R6hW5FeNkGx9nhqd1nBGNvBaZuMRJcpyEe6AHx56eHC2R6hRh
 +1Rt+Eu5rawnA5MDpkHoso+OtBi36Rr++GMHLy11XoPABjXscgKIfGZOl4hk8KJe
 eDZdnV9DT9bUu3Ozdz+jkYSzdo00K+ZtB+0n8JmDvON0nhQp8otll/2BdRoZ3JpB
 eFwNyRFlLTHpKPp5mcPh9Xe7BfEpz/FqdTwz35hmlGe2n98q61Lny6/XcF85TFc6
 LzqHcftkgHzvPaWPbOpJ1MZ+XFOrGD2w5/pEYDOmjoeicWQh587+RUXI1TzkdVes
 klVzc4klUYw50a31LNILO9UfGDdB7lupBe1/kQOHUR1NPn6oBMKhNIGDdNx1VXZA
 BM2Kb9JEhwYLelw8lmyHz1waOK1ik2JFtClwmfVqLkq37FpcS0V66P2XugiuZgeA
 /ZUSTB0Pa1XMlJqcyFPFoHj/DnTDBsFDb8HxxAHTIh/YfK/iFf0iBuJ1t0VbTc4w
 v5P+oj/ZSZxdWJz5ls92FIlI
 =xuCz
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmF4Ke4ACgkQmmx57+YA
 GNnufw/9GcUKYHyndGW1GnTeWB69G0ghYtaVwrsertmAhBzwjKq15jecF1CqosGe
 G6SKKFRLXUoaB1ilxwHeo8qC5DG0R4Y9FMYD2/e+/nAQZLEe+7dbvlYQMU2ctqgH
 bfg0M9HPVIVDNlH0d1Z+xFgQClTQ2twZmYKxyj8W+sKpZpx5JXtg5nbN+Gf1JbSr
 yWPIQTol86VkMXK7ASP4BtBm5xm2PEOvplrRgjo1owV63fuhaPGk9qtz3YyI6uRC
 qq543MHGGiHSv4mytn5BjmAosSf7XTiyj2Bv5EPSqzFz0cdu82NyAMncoqu5NFCB
 6wHRljVB5nxJhQBF0Zp6T1cAVjVEjPyC6z0H2DkTVtfoh8Fpr36qTtgQ2xERLMTR
 ZLJhYOzMFGVK/ljT4Vpngd5y4stYcWmA/hToKzkeyCbYQ21DPEpO7GHH0Jqo0mTZ
 QR62awi9lzNpkbLa/uqbhE71sXAmILmqXHX1VUN27KbiOIfrCI6I3EK1dR7GKwdD
 7VgKAa/EE17aTt3Ce9ihBUpvwTzDt233AIHaNSyt2IB3CanVdv5DSIFap3FSHxPL
 ij1EYbQyeO3RDQtNsVFx1pJc043T6vp/TTmtYvvxkswZ4BHSjsv9PW3UpmMa7C4/
 uW3p94NaeqQ8dG4YO1x1tpvSsdxgrnAFHhkItSjyV6Q7Ay+5AOw=
 =DfL5
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-defconfig-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/defconfigs

Qualcomm ARM64 defconfig updates for v5.16

The major change here is the disabling of the firmware loades user space
fallback, this is done as arm64 is the only platform with this flag
enabled and as a result doesn't play nice with standard distributions.

It then enables the new limits driver, which controls the hardware based
thermal mitigation on a range of Qualcomm platforms. The prima/pronto
WiFi and Bluetooth drivers are enabled to ensure these features works
out of the box, now that the last details in the dts are landed.

The new driver for acquiring sleep stats is enabled to facilitate the
various efforts on getting these platforms into low power mode.

Lastly the base SC7280 drivers needed to simply boot this platform are
enabled.

* tag 'qcom-arm64-defconfig-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  arm64: defconfig: Enable Qualcomm LMH driver
  arm64: defconfig: Enable Qualcomm prima/pronto drivers
  arm64: defconfig: Enable Sleep stats driver
  arm64: defconfig: Enable QTI SC7280 pinctrl, gcc and interconnect
  arm64: defconfig: Disable firmware sysfs fallback

Link: https://lore.kernel.org/r/20211026134953.1204327-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-26 18:16:46 +02:00
Arnd Bergmann
f253fb365e Samsung DTS ARM64 changes for v5.16, part two
1. Add chassis-type property.
 2. Add ChipID node to ExynosAutov9 DTSI.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmF3zK8QHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD142wD/0Vli9+cSeu5p4GMqEHUJpqFmX18njwygBQ
 xGRIzgZrt/j0L0NfoiGUCpEbOVCuEW1h2+xYcw+yQAGvKgGVVI8ZTmrbWym/PDRt
 vLmFS4gOrF9+PmQahtDi7PjRiirzjROcVBqFAdQZWfCoWWJ8q1gdzkC2u0qq8ZBK
 NHARHL2a77DJqQ10NzCklhKxgLD13K2/JucG/j4qblZ4kCF0QwncoZ+cDyJsKpew
 uStSzwmMWlOS88S2ZtYPpCM1p2Hon1QdQHkb8Qa6ZUyT7jUF8XX3Ha+KO//cw8ig
 EZtaa6Wh30hyVPiETi9z/TNFpJm8fSUiwtkICY7As7wDsynfIwdFiTggKwvjJ0CF
 r0I/Q3/vopgcwzode02LLNJ/Oe/IgaVORSmDarY2susjglnmcPcC8G+LHJwCGHhT
 drQNaIeX7PR+kufB7JgMUzhMHDmfn+VWfNBgb6w4a2xcRxcgWa0+uz53enBl1Hu4
 zkXd0uSXQMeW6aijjm+ghJO0J1qPxUyVtn9Fia8dIgCZ/iBVHCH/3mw350Q4ObG1
 JSsAb45lS1I6YvvGNY5Dk6J67tB7b7XLgtnJqiAS1ToWXBT925EH8PnwM+a0qVCv
 9W37rr7kuQdelvfcN1O61qGGRCAIKyuYBtztxTUjEKwejO6fL0sPrERoJpy5+Rl6
 Rn9KZItYxg==
 =Q04S
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmF4KV4ACgkQmmx57+YA
 GNlaVBAApFaM4FouP5Ve6fmWegTCmwdmy9gdf3QlTWNMKw+gn4L1ad6Uf1ZbhSHW
 wiyv5p80Jq59KG9qQwVsbl3imLT8lRZdPRsMtmyq9DK2G+SNlSvdH4xG1f6lkwrw
 zne50smmguYYUpgdiB994KVec2YqVQKovpnSob8Coxjd/Bnxv4A1nuoAmMvS65CC
 BxZjxLDcfy1XkZo+SK2Ju0D5+PtJPZsluFMKz9VHvWyNnMvoZmiOMda7/q//pwix
 U0GzTK+9CZCCguSEF9TNf572FB4vuIAt23WdnvxIojh5yVaQuYT4bVotPH4+95xn
 z/5JfAI3zW3NAmE2a3ZmbLJLgJZfNUbWjln7NUcKzgFEXdonDpMQgKhXBGZwohAW
 EoZiS9ddQeNTpx/MyY2alEcgv2fq+iWneSvudQFSaG+7pvOFJLRRa/kK6ETh6wdF
 6bv56APOoeEpJ4JBHH7Px8VQkda2beOYkFWbUo/mYIc7gcsDrd9dkx5mKS9HqH53
 JJeqpq/GT1ytVvk7VM9oaeje+tjYELjy8uJkXVOXMr9WZ5LaRS+IxHzSxg6OSL6J
 ZLt8dcF1ZnFVcUiwZ/eJAZFCkUpy1gaHjRFhticZJQcqa3QdjDmpgWYixITS05Qh
 Yco08k2QvQ+NWzzRWKZt6GqN+B5pcb8T95eYQPd5JegAEMAocn8=
 =ah7o
 -----END PGP SIGNATURE-----

Merge tag 'samsung-dt64-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM64 changes for v5.16, part two

1. Add chassis-type property.
2. Add ChipID node to ExynosAutov9 DTSI.

* tag 'samsung-dt64-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos: add chipid node for exynosautov9 SoC
  arm64: dts: exynos: add 'chassis-type' property

Link: https://lore.kernel.org/r/20211026094709.75692-4-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-26 18:14:22 +02:00
Rob Herring
25b892b583
ARM: dts: arm: Update register-bit-led nodes 'reg' and node names
Add a 'reg' entry for register-bit-led nodes on the Arm Ltd platforms.
The 'reg' entry is the LED control register address. With this, the node
name can be updated to use a generic node name, 'led', and a
unit-address.

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: https://lore.kernel.org/r/20211024232003.211484-1-linus.walleij@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-26 17:20:41 +02:00
Arnd Bergmann
64954d19e0 Samsung SoC drivers changes for v5.16
1. Convert Exynos ChipID and ASV driver to a module and make it a
    default, instead of selected. The driver is not essential, so it
    could be disabled, if needed.
 2. Add support for Exynos850 and Exynos Auto v9 to Exynos ChipID and ASV
    driver.
 3. Get rid of HAVE_S3C_RTC because it was adding just another layer
    instead of direct dependencies.
 4. Minor cleanups.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmF3zFcQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD1wXED/9VSIwfegbhUkfa9yCetdt8dDrjINAUuZ89
 FZsplj7BdFJVra7KxjZ6WSWqT5bBVF804mPQKi/filUvuZLr8oOVc/BCdARPMqxq
 3rui2xiXvUgDWfJmqFEaVhTTChKAK2NKMgC+aGB0Ah3PK9QbO9fG+E1IcOBLIEUQ
 bQH77+GH4rG8/INWdrqmL7LrJUkOyUsCgK3IxGh08m6nRgn8Xfwk1Y0UPpeGgQTs
 66CnmIgBiN3+w0MeFClHpLXokBnSSFwrtITrwLILffAO18EEFaaErSZhSyge4tdu
 WwH9no+mcp8gpV7mU/b4rAhNVqn6LIldGrk3O6H9Pm9RJj1ITsLYdTXEpUKErXma
 g3ZloSyQ/zMUAM3K6rMHYg92Z8pUTnbkbYI6hoCgPGmrHIIRIhIjbjafBHuFZuhL
 aeLUCcPxGv3tETjmDaSscHDJ+kVtCyArAoggDbPzWr8V7IO8OmMecxTfYJEKPelM
 CH0uvIBHgXRtSF091XbrJ8vXy/GZSWZJH5CrQmeY/HqE+iJFAYXGj53fohGlOu7m
 t0OsCnnX/eaCRFPtg6yUfGbiJ3xjdyTvA6ffn7c4Eel4tezy3HnGIaIjA/QI2KVa
 J18YWZDMGxeQpofuTo8wpCZiUZo/6zlVb3zh9vyRvf1gR06Ln8y5Kb+SAna+EvTj
 YDxiCGYwIg==
 =ZJb8
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmF4G7MACgkQmmx57+YA
 GNk7ug//Y69NRwLTxnZSY5mX88SegROm4oARW8+hZLA3XGmpZuZsNBzc709p/64B
 Ba/AKIILWKzY4kp5gdT+u02JYoPNVYGuq0SQ1F/Owj7ojAQkBKpwlvDARCIWIFN0
 4HohEU6eO1XOm3aUqKYsGfZxk53ECnx3IP5vxSVkTUGOSQKNQAsqIKG+bfYM3J/4
 AsMFwm7aMHxgBqAxk3ZTPeqAl2JLH5+7uIcZHRWqt9wCiPMWXLSVbKpW79xPHCHC
 eaRw6je+HI4MwZjNSqdmaiP/4WCnKGowiq0OGnkv9vcH4GykT9a6qS3pTL50rLom
 lHov9WbNXGP+wFYMWLn9f8fyLwFmdNmOFvkQT6IX2H4a6VlceMqx6HfAKzeAr6fX
 6ck6/t8gjF/s9rXpR08sBDpefXLxp7nYZSsFMNesVRCD+h+JciC3pnUw+YgUpcRb
 GK4AoaxHbaIJy94OzARGECOP7fzXfVFBrMHgYucWOeVvX1W7JX0eyDKOAkWF4W+J
 R+af/7HIcNtB1bXFpxL6Njeyyf2B4a8qncMlLTtJ7r5DX5oU7T8KRngzD4kCvnkP
 gjkBzY1+41/K9RCII6L05miNc36ATf/07bQx4e1F2L9/1RzGnjIl8OxN5OVs89y0
 CvplsgtlYgnGccNbpChO0r4IaR7UWYTDPulXkEdNE+jJxuTYvwI=
 =y2Ab
 -----END PGP SIGNATURE-----

Merge tag 'samsung-drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/drivers

Samsung SoC drivers changes for v5.16

1. Convert Exynos ChipID and ASV driver to a module and make it a
   default, instead of selected. The driver is not essential, so it
   could be disabled, if needed.
2. Add support for Exynos850 and Exynos Auto v9 to Exynos ChipID and ASV
   driver.
3. Get rid of HAVE_S3C_RTC because it was adding just another layer
   instead of direct dependencies.
4. Minor cleanups.

* tag 'samsung-drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  soc: samsung: exynos-chipid: add exynosautov9 SoC support
  rtc: s3c: remove HAVE_S3C_RTC in favor of direct dependencies
  soc: samsung: exynos-chipid: Add Exynos850 support
  dt-bindings: samsung: exynos-chipid: Document Exynos850 compatible
  soc: samsung: exynos-chipid: Pass revision reg offsets
  soc: samsung: pm_domains: drop unused is_off field
  arm64: exynos: don't have ARCH_EXYNOS select EXYNOS_CHIPID
  soc: samsung: exynos-chipid: do not enforce built-in
  soc: samsung: exynos-chipid: convert to a module
  soc: samsung: exynos-chipid: avoid soc_device_to_device()
  soc: samsung: exynos-pmu: Fix compilation when nothing selects CONFIG_MFD_CORE

Link: https://lore.kernel.org/r/20211026094709.75692-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-26 17:16:03 +02:00
Arnd Bergmann
f44e8f91b8 Qualcomm ARM64 DTS one more fix for 5.15
This reverts a clock change in the Qualcomm RB5 devicetree which in some
 combinations of firmware and configuration causes the device to crash
 during boot.
 
 Data on an adjacent platform indicates that this is probably not be the
 root cause of the problem, but this resolves the regression seen on RB5
 and will allow the SM8250 platform to boot v5.15.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmF3BPgbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FVf0P/iIpoAWcuXv0ZFWwmEhu
 FMzyeiXuq7tcf5ZGmcZI8+Ap+VEB676wWFuhM2yCB6AD6oOoEeqwNKB2H08eYP4s
 b6uDCiT0gAMNMVNnWZ9JInO/Goa3Kk8CD7cwkqkW1U8fAVC4NhwJ7m7WMMSObuGp
 o8b9TQsAKqVRlPHyKE5Uwf+2XYhW/5DdWOBExNT5VRDptWEMh5BdLYEus5HdIMmq
 DxTz29a+DL2eVOUVm1j3NaLr3RS982E2z/Y0IZO6L06e4OerLWCr1KrFoLi2Jopz
 IfNwCXZ8qVw07CUDrwd7FlPOwQK5S286mbXyeDOgneqio1kqPreMzym2Mb+o5Leh
 AYYxUTmrYoGf0VW0+N6nOVvlmTnH3qVQpuRALqbswm1s7A9BbH2NwzX3QHp8v8qW
 B5hH49oX0a7bglr+kxmaY9rgNP27m2VZ42/SUGrO5Wgmknp4zDJ+LmQRzgknvCa+
 eKxz5L4NwsfkS7uy/1Wtt0tlRYeJ5DTQo5DwzztqJPltIRPyQBfUDULUZ7Jhqjzd
 jQAt7qjd0Q9iH8/0sprVhn0wpOjUsUq1ifDdgKHtqwKtkeMztttCtLuY5hQ8lrY2
 OnWL5hzOQijwZaYLrEL4sky8rdGvV5+MtOVxw/m/tK402zXhCEuiHY44czKJlBvU
 WoNNzIqV7/zMxHrwLx7vmvXl
 =GNxs
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmF4DsIACgkQmmx57+YA
 GNlimQ/+NLLCAIPtiC3Qw6ydO4vGHr09QmKSUXJEgxguuc7MWJ8nyDE9tgR/wpV0
 9NBuFNY8/yyTgZYAAOZ6AwlzmHfOWieSFFnqIlQ8po/4WUxRasVSnbk0KxtrrErT
 QXFFuhmL5XYGrNtAEU7TkoFbjl+Tj9IgBix/qTxRKcnGhh2KIIOZfNrImpEZyAc6
 IvdcSs7bo+NfR9xhz59n8otEDTavHChF9kZVYz0QxSK02F99cedkXr7fdrFeFtd3
 e/FeHkSCgEEWPwMJ7DD7kjewTICe8BpletjxP/BdhBZ6oB0lFmgeV22dLe/wnxtw
 NALUk302hs9YrsnGXO+QqFEww+YvWbhNZZiV0Z5qdjC8fU60Ir3Tf5/4MMlUCO89
 0ttua18ud8VdK+iVnpCzjz5HXwrJ3GnbomXJo/FJJaxlpyAwiZUSZ/dG6ilYQhMC
 FhX9dzX0zF90YjGfUoEyMRZksi6hcGmLk73zZfXjczTuh0C5aCwM46EUTB+fYNDX
 +KzOK89a4/et5DCBcXmRpKDbe8QcNIDiAgE6wlCIl+wyF0QylIXFbCRDf5iptwy1
 qdn9RwjZNIOKCRydTPzy6ULaXU3wUB37aFfaKjSvAO1Ill2Qn81jo6t1F0qGzDsF
 cAyFZzR4GBbwcZSZD8oLha//Iwh+5+nLfKOeh6ihMii+PFNxfKo=
 =jkPI
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-fixes-for-5.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes

Qualcomm ARM64 DTS one more fix for 5.15

This reverts a clock change in the Qualcomm RB5 devicetree which in some
combinations of firmware and configuration causes the device to crash
during boot.

Data on an adjacent platform indicates that this is probably not be the
root cause of the problem, but this resolves the regression seen on RB5
and will allow the SM8250 platform to boot v5.15.

* tag 'qcom-arm64-fixes-for-5.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  Revert "arm64: dts: qcom: sm8250: remove bus clock from the mdss node for sm8250 target"

Link: https://lore.kernel.org/r/20211025201213.1145348-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-26 16:20:50 +02:00
Mark Brown
04ee53a555 arm64/sve: Fix warnings when SVE is disabled
In configurations where SVE is disabled we define but never reference the
functions for retrieving the default vector length, causing warnings. Fix
this by move the ifdef up, marking get_default_vl() inline since it is
referenced from code guarded by an IS_ENABLED() check, and do the same for
the other accessors for consistency.

Reported-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20211022141635.2360415-3-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2021-10-26 10:15:46 +01:00
Mark Brown
49ed920408 arm64/sve: Add stub for sve_max_virtualisable_vl()
Fixes build problems for configurations with KVM enabled but SVE disabled.

Reported-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20211022141635.2360415-2-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
2021-10-26 10:15:46 +01:00
Mark Rutland
0953fb2637 irq: remove handle_domain_{irq,nmi}()
Now that entry code handles IRQ entry (including setting the IRQ regs)
before calling irqchip code, irqchip code can safely call
generic_handle_domain_irq(), and there's no functional reason for it to
call handle_domain_irq().

Let's cement this split of responsibility and remove handle_domain_irq()
entirely, updating irqchip drivers to call generic_handle_domain_irq().

For consistency, handle_domain_nmi() is similarly removed and replaced
with a generic_handle_domain_nmi() function which also does not perform
any entry logic.

Previously handle_domain_{irq,nmi}() had a WARN_ON() which would fire
when they were called in an inappropriate context. So that we can
identify similar issues going forward, similar WARN_ON_ONCE() logic is
added to the generic_handle_*() functions, and comments are updated for
clarity and consistency.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
2021-10-26 10:13:31 +01:00
Mark Rutland
26dc129342 irq: arm64: perform irqentry in entry code
In preparation for removing HANDLE_DOMAIN_IRQ_IRQENTRY, have arch/arm64
perform all the irqentry accounting in its entry code.

As arch/arm64 already performs portions of the irqentry logic in
enter_from_kernel_mode() and exit_to_kernel_mode(), including
rcu_irq_{enter,exit}(), the only additional calls that need to be made
are to irq_{enter,exit}_rcu(). Removing the calls to
rcu_irq_{enter,exit}() from handle_domain_irq() ensures that we inform
RCU once per IRQ entry and will correctly identify quiescent periods.

Since we should not call irq_{enter,exit}_rcu() when entering a
pseudo-NMI, el1_interrupt() is reworked to have separate __el1_irq() and
__el1_pnmi() paths for regular IRQ and psuedo-NMI entry, with
irq_{enter,exit}_irq() only called for the former.

In preparation for removing HANDLE_DOMAIN_IRQ, the irq regs are managed
in do_interrupt_handler() for both regular IRQ and pseudo-NMI. This is
currently redundant, but not harmful.

For clarity the preemption logic is moved into __el1_irq(). We should
never preempt within a pseudo-NMI, and arm64_enter_nmi() already
enforces this by incrementing the preempt_count, but it's clearer if we
never invoke the preemption logic when entering a pseudo-NMI.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Pingfan Liu <kernelfans@gmail.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will@kernel.org>
2021-10-26 10:12:53 +01:00
Chanho Park
b2f217cc7f arm64: dts: exynos: add chipid node for exynosautov9 SoC
It can be compatible with exynos850's chipid. The SoC has eight chipid
registers that can be used for OTP.

Cc: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20211021012017.158919-3-chanho61.park@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-26 09:17:42 +02:00
Amit Pundir
e091b836a3 Revert "arm64: dts: qcom: sm8250: remove bus clock from the mdss node for sm8250 target"
This reverts commit 001ce9785c.

This upstream commit broke AOSP (post Android 12 merge) build
on RB5. The device either silently crashes into USB crash mode
after android boot animation or we see a blank blue screen
with following dpu errors in dmesg:

[  T444] hw recovery is not complete for ctl:3
[  T444] [drm:dpu_encoder_phys_vid_prepare_for_kickoff:539] [dpu error]enc31 intf1 ctl 3 reset failure: -22
[  T444] [drm:dpu_encoder_phys_vid_wait_for_commit_done:513] [dpu error]vblank timeout
[  T444] [drm:dpu_kms_wait_for_commit_done:454] [dpu error]wait for commit done returned -110
[    C7] [drm:dpu_encoder_frame_done_timeout:2127] [dpu error]enc31 frame done timeout
[  T444] [drm:dpu_encoder_phys_vid_wait_for_commit_done:513] [dpu error]vblank timeout
[  T444] [drm:dpu_kms_wait_for_commit_done:454] [dpu error]wait for commit done returned -110

Fixes: 001ce9785c ("arm64: dts: qcom: sm8250: remove bus clock from the mdss node for sm8250 target")
Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211014135410.4136412-1-dmitry.baryshkov@linaro.org
2021-10-25 14:26:00 -05:00
Mark Rutland
2fe35f8ee7 irq: add a (temporary) CONFIG_HANDLE_DOMAIN_IRQ_IRQENTRY
Going forward we want architecture/entry code to perform all the
necessary work to enter/exit IRQ context, with irqchip code merely
handling the mapping of the interrupt to any handler(s). Among other
reasons, this is necessary to consistently fix some longstanding issues
with the ordering of lockdep/RCU/tracing instrumentation which many
architectures get wrong today in their entry code.

Importantly, rcu_irq_{enter,exit}() must be called precisely once per
IRQ exception, so that rcu_is_cpu_rrupt_from_idle() can correctly
identify when an interrupt was taken from an idle context which must be
explicitly preempted. Currently handle_domain_irq() calls
rcu_irq_{enter,exit}() via irq_{enter,exit}(), but entry code needs to
be able to call rcu_irq_{enter,exit}() earlier for correct ordering
across lockdep/RCU/tracing updates for sequences such as:

  lockdep_hardirqs_off(CALLER_ADDR0);
  rcu_irq_enter();
  trace_hardirqs_off_finish();

To permit each architecture to be converted to the new style in turn,
this patch adds a new CONFIG_HANDLE_DOMAIN_IRQ_IRQENTRY selected by all
current users of HANDLE_DOMAIN_IRQ, which gates the existing behaviour.
When CONFIG_HANDLE_DOMAIN_IRQ_IRQENTRY is not selected,
handle_domain_irq() requires entry code to perform the
irq_{enter,exit}() work, with an explicit check for this matching the
style of handle_domain_nmi().

Subsequent patches will:

1) Add the necessary IRQ entry accounting to each architecture in turn,
   dropping CONFIG_HANDLE_DOMAIN_IRQ_IRQENTRY from that architecture's
   Kconfig.

2) Remove CONFIG_HANDLE_DOMAIN_IRQ_IRQENTRY once it is no longer
   selected.

3) Convert irqchip drivers to consistently use
   generic_handle_domain_irq() rather than handle_domain_irq().

4) Remove handle_domain_irq() and CONFIG_HANDLE_DOMAIN_IRQ.

... which should leave us with a clear split of responsiblity across the
entry and irqchip code, making it possible to perform additional
cleanups and fixes for the aforementioned longstanding issues with entry
code.

There should be no functional change as a result of this patch.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
2021-10-25 10:05:30 +01:00
Bjorn Andersson
b34a82f06f Revert "arm64: dts: qcom: msm8916-asus-z00l: Add sensors"
I didn't notice that I already had applied this patch and while this
builds fine one copy is enough.

This reverts commit 22efef1ca0.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-10-24 17:31:14 -05:00
Bhupesh Sharma
82f07cbd40 arm64: dts: qcom: ipq6018: Remove unused 'iface_clk' property from dma-controller node
'iface_clk' clock is not used by the
qcom, bam_dma driver, so remove the same from 'ipq6018' dts.

This is a preparatory patch for subsequent patch in
this series which converts the qcom_bam_dma device-tree
binding into YAML format.

Without this change, 'make dtbs_check' leads to the following
error:
 $ arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dt.yaml:
     dma-controller@7984000: clock-names: ['iface_clk', 'bam_clk']
     is too long

Fix the same.

Cc: Thara Gopinath <thara.gopinath@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211013105541.68045-4-bhupesh.sharma@linaro.org
2021-10-24 13:04:13 -05:00
Bhupesh Sharma
62b177fcdf arm64: dts: qcom: ipq6018: Remove unused 'qcom,config-pipe-trust-reg' property
'qcom,config-pipe-trust-reg' property doesn't seem to be
used by the qcom, bam_dma driver, so remove the same
from 'ipq6018' dts.

This is a preparatory patch for subsequent patch in
this series which converts the qcom_bam_dma device-tree
binding into YAML format.

Without this change, 'make dtbs_check' leads to the following
error:
 $ arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dt.yaml:
     dma-controller@704000: 'qcom,config-pipe-trust-reg' does not match
     any of the regexes: 'pinctrl-[0-9]+'

Fix the same.

Cc: Thara Gopinath <thara.gopinath@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211013105541.68045-3-bhupesh.sharma@linaro.org
2021-10-24 13:04:08 -05:00
Bjorn Andersson
07ddb30281 arm64: dts: qcom: sm8350: Add CPU topology and idle-states
Add CPU topology and define the idle states for the silver and gold
cores as well as the cluster.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Link: https://lore.kernel.org/r/20210825221600.1498939-1-bjorn.andersson@linaro.org
2021-10-24 13:04:08 -05:00
Stephan Gerhold
442ee1fc60 arm64: dts: qcom: Drop unneeded extra device-specific includes
For some reason apq8016-sbc, apq8096-db820c, msm8916-mtp and msm8996-mtp
were added as separate .dts and .dtsi files where the first only contains
the model name and the latter contains most of the actual definitions.
Perhaps this was done with the expectation that there would be other
devices also making use of exactly the same. However, this has not
been the case until now and it also seems unlikely in the future.
Having the extra .dtsi only clutters the file list and provides
little benefit.

Move the contents of the .dtsi into the .dts file to make this consistent
with most other devices that simply define everything in the .dts.

There are no functional changes introduced by this patch:
The compiled ".dtb"s are completely identical.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211018133656.32649-1-stephan@gerhold.net
2021-10-24 13:04:08 -05:00
Stephan Gerhold
c86c43c41e arm64: dts: qcom: msm8916: Drop standalone smem node
SMEM can now be described directly in the reserved-memory.
This is mainly meant for newer SoCs where there is only one SMEM
region. However, even on older SoCs like MSM8916 there is clearly one
main SMEM region (described by "memory-region") that holds the
smem_header and one special extra region used only for data of the
RPM ("qcom,rpm-msg-ram").

The definition in reserved-memory also looks cleaner for older SoCs,
so make use of that in MSM8916 as well.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211018110009.30837-2-stephan@gerhold.net
2021-10-24 13:04:08 -05:00
Stephan Gerhold
179811bebc arm64: dts: qcom: Fix node name of rpm-msg-ram device nodes
According to the new DT schema for qcom,rpm-msg-ram the node name
should be sram@. memory@ is reserved for definition of physical RAM
(usable by Linux).

This fixes the following dtbs_check error on various device trees:
memory@60000: 'device_type' is a required property
        From schema: dtschema/schemas/memory.yaml

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211018110009.30837-1-stephan@gerhold.net
2021-10-24 13:04:08 -05:00
J.R. Divya Antony
22efef1ca0 arm64: dts: qcom: msm8916-asus-z00l: Add sensors
This device has MPU-6515 imu and Asahi Kasei AK09911 magnetometer,
Add support for it.

Signed-off-by: J.R. Divya Antony <d.antony.jr@gmail.com>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211012112735.2765-3-d.antony.jr@gmail.com
2021-10-24 13:04:08 -05:00
J.R. Divya Antony
68edf2d8fc arm64: dts: qcom: msm8916-asus-z00l: Add SDCard
Enable SDHCI (SD Card) Storage.

Signed-off-by: J.R. Divya Antony <d.antony.jr@gmail.com>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211012112735.2765-2-d.antony.jr@gmail.com
2021-10-24 13:04:08 -05:00
J.R. Divya Antony
21e95ec221 arm64: dts: qcom: msm8916-asus-z00l: Add touchscreen
Add support for touchscreen in this device.

Signed-off-by: J.R. Divya Antony <d.antony.jr@gmail.com>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211012112735.2765-1-d.antony.jr@gmail.com
2021-10-24 13:04:07 -05:00
David Heidelberg
b212400d5d arm64: dts: qcom: sdm845-oneplus: remove devinfo-size from ramoops node
This property doesn't exist in Linux kernel.

Fixes: 288ef8a426 ("arm64: dts: sdm845: add oneplus6/6t devices")
Reviewed-by: Caleb Connolly <caleb@connolly.tech>
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211011200138.115688-1-david@ixit.cz
2021-10-24 13:04:07 -05:00
Vladimir Zapolskiy
d5240f8e23 arm64: dts: qcom: sdm845: Fix Qualcomm crypto engine bus clock
The change corrects the described bus clock of the QCE.

Fixes: 3e482859f1 ("dts: qcom: sdm845: Add dt entries to support crypto engine.")
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211011095534.1580406-1-vladimir.zapolskiy@linaro.org
2021-10-24 13:04:07 -05:00
Vladimir Zapolskiy
ef062eb675 arm64: dts: qcom: msm8996: Add device tree entries to support crypto engine
The change adds description of Qualcomm crypto engine controller and
BAM associated with it. The change is inspired by commit 3e482859f1
("dts: qcom: sdm845: Add dt entries to support crypto engine.")

While performance of cryptographic algorithms executed on QCE is lower
than e.g. ones tinkered for ARM NEON, the offloaded execution would
make sense:

    # cryptsetup benchmark | grep aes
    aes-cbc        128b        71.0 MiB/s        71.9 MiB/s
    aes-cbc        256b        62.4 MiB/s        62.4 MiB/s
    aes-xts        256b        70.7 MiB/s        70.8 MiB/s
    aes-xts        512b        62.0 MiB/s        63.3 MiB/s

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Cc: Thara Gopinath <thara.gopinath@linaro.org>
Acked-by: Thara Gopinath <thara.gopinath@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211011094822.1580122-1-vladimir.zapolskiy@linaro.org
2021-10-24 13:04:07 -05:00
Krzysztof Kozlowski
bb270c86ec arm64: dts: qcom: msm8996: move clock-frequency from PN547 NFC to I2C bus
Although the early NXP NCI NFC bindings required the clock-frequency
property, it was never used by the driver and it is actually a property
of I2C bus, not I2C slave.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211011073143.32645-1-krzysztof.kozlowski@canonical.com
2021-10-24 13:04:07 -05:00
J.R. Divya Antony
52f5fbe259 arm64: dts: qcom: msm8916-asus-z00l: Add sensors
This device has MPU-6515 imu and Asahi Kasei AK09911 magnetometer.
Add support for it.

Signed-off-by: J.R. Divya Antony <d.antony.jr@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211010033750.15204-1-d.antony.jr@gmail.com
2021-10-24 13:04:07 -05:00
AngeloGioacchino Del Regno
f468ecf105 arm64: dts: qcom: sdm630: Add disabled Venus support
Add support for the Venus video decoder/encoder but leave it disabled
by default; it is expected to eventually get enabled in each machine
specific DT, where required.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211008102119.268869-3-angelogioacchino.delregno@collabora.com
2021-10-24 13:04:07 -05:00
Marijn Suijten
90ba636e40 arm64: dts: qcom: pm660l: Remove board-specific WLED configuration
This string- and electrical configuration depend on the board and panel,
and should hence not be defined generically for every user of pm660l.
SoMainline will pick this configuration again when enabling WLED on the
Sony Nile platform.

Fixes: 7b56a804e5 ("arm64: dts: qcom: pm660l: Add WLED support")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-By: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211007213400.258371-14-marijn.suijten@somainline.org
2021-10-24 13:04:04 -05:00
Marijn Suijten
360f20c801 arm64: dts: qcom: Move WLED num-strings from pmi8994 to sony-xperia-tone
The number of WLED strings used by a certain platform depend on the
panel connected to that board and may not be the same for every user of
pmi8994.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-By: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211007213400.258371-13-marijn.suijten@somainline.org
2021-10-24 13:04:04 -05:00
Marijn Suijten
9b729b0932 arm64: dts: qcom: pmi8994: Remove hardcoded linear WLED enabled-strings
The driver now sets an appropriate default for WLED4 (and WLED5) just
like WLED3 making this linear array from 0-3 redundant.  In addition the
driver is now able to parse arrays of variable length solving the "all
four strings *have to* be defined" comment.

Besides the driver will now warn when both properties are specified to
prevent ambiguity: the length of the array is enough to imply a set
number of strings.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-By: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211007213400.258371-12-marijn.suijten@somainline.org
2021-10-24 13:04:04 -05:00
Marijn Suijten
b110dfa5ad arm64: dts: qcom: pmi8994: Fix "eternal"->"external" typo in WLED node
The property is named "qcom,external-pfet", as found by
dt_binding_check:

    'qcom,eternal-pfet' does not match any of the regexes

Fixes: 37aa540cbd ("arm64: dts: qcom: pmi8994: Add WLED node")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-By: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211007213400.258371-11-marijn.suijten@somainline.org
2021-10-24 13:04:03 -05:00
Matthias Kaehlcke
669e7adb2f arm64: dts: qcom: sc7280: Add Herobrine
Herobrine is a Chrome OS board/platform based on the QCA SC7280.
Add a .dtsi for the platform parts and a .dts for the board
specific bits. Currently the .dtsi has everything except the
compatible strings, things will likely get shuffled around in the
future as we learn more about the differences between boards.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211007140854.1.I70615769f27bbaf7e480419d0f660f802b1fea43@changeid
2021-10-24 13:04:03 -05:00
Prasad Malisetty
4e24d227aa arm64: dts: qcom: sc7280: Add PCIe nodes for IDP board
Enable PCIe controller and PHY for sc7280 IDP board.
Add specific NVMe GPIO entries for SKU1 and SKU2 support.

Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1633628923-25047-4-git-send-email-pmaliset@codeaurora.org
2021-10-24 13:04:03 -05:00
Prasad Malisetty
92e0ee9f83 arm64: dts: qcom: sc7280: Add PCIe and PHY related nodes
Add PCIe controller and PHY nodes for sc7280 SOC.

Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1633628923-25047-3-git-send-email-pmaliset@codeaurora.org
2021-10-24 13:04:03 -05:00
Raffaele Tranquillini
ff80dc99cd arm64: dts: qcom: msm8996: xiaomi-gemini: Enable JDI LCD panel
This enables the JDI FHD_R63452 LCD panel used on Xiaomi Mi 5

Signed-off-by: Raffaele Tranquillini <raffaele.tranquillini@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210925113808.524749-1-raffaele.tranquillini@gmail.com
2021-10-24 13:04:03 -05:00
Rob Herring
0ac10b291b arm64: dts: qcom: Fix 'interrupt-map' parent address cells
The 'interrupt-map' in several QCom SoCs is malformed. The '#address-cells'
size of the parent interrupt controller (the GIC) is not accounted for.

Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210928192210.1842377-1-robh@kernel.org
2021-10-24 13:04:03 -05:00
Shawn Guo
561650dcea arm64: dts: qcom: ipq8074-hk01: Add dummy supply for QMP USB3 PHY
Per QMP PHY bindings schema, 'vdda-phy-supply' and 'vdda-phy-supply' are
required for IPQ8074 QMP USB3 PHY.  Since supplies are not added in DTS
for this platform, add a dummy regulator as the supply to QMP USB3 PHY,
so that dtbs_check stops complaining the missing supplies.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210929034253.24570-10-shawn.guo@linaro.org
2021-10-24 13:04:03 -05:00
Shawn Guo
942bcd33ed arm64: dts: qcom: Fix IPQ8074 PCIe PHY nodes
IPQ8074 PCIe PHY nodes are broken in the many ways:

- '#address-cells', '#size-cells' and 'ranges' are missing.
- Child phy/lane node is missing, and the child properties like
  '#phy-cells' and 'clocks' are mistakenly put into parent node.
- The clocks properties for parent node are missing.

Fix them to get the nodes comply with the bindings schema.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210929034253.24570-9-shawn.guo@linaro.org
2021-10-24 13:04:03 -05:00
Shawn Guo
f47466db11 arm64: dts: qcom: msm8998-clamshell: Add missing vdda supplies
'vdda-phy-supply' and 'vdda-pll-supply' are required properties.  Add
them to fix the dtbs_check warnings below.

phy@1da7000: 'vdda-phy-supply' is a required property
        arch/arm64/boot/dts/qcom/msm8998-asus-novago-tp370ql.dt.yaml
        arch/arm64/boot/dts/qcom/msm8998-hp-envy-x2.dt.yaml
        arch/arm64/boot/dts/qcom/msm8998-lenovo-miix-630.dt.yaml

phy@1da7000: 'vdda-pll-supply' is a required property
        arch/arm64/boot/dts/qcom/msm8998-asus-novago-tp370ql.dt.yaml
        arch/arm64/boot/dts/qcom/msm8998-hp-envy-x2.dt.yaml
        arch/arm64/boot/dts/qcom/msm8998-lenovo-miix-630.dt.yaml

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210929034253.24570-8-shawn.guo@linaro.org
2021-10-24 13:04:03 -05:00
Shawn Guo
6fef7b3957 arm64: dts: qcom: Drop reg-names from QMP PHY nodes
The 'reg-names' is not a supported/used property.  Drop it from QMP PHY
nodes to fix dtbs_check warnings like below.

phy-wrapper@88e9000: 'reg-names' does not match any of the regexes: '^phy@[0-9a-f]+$', 'pinctrl-[0-9]+'
        arch/arm64/boot/dts/qcom/sm8350-hdk.dt.yaml
        arch/arm64/boot/dts/qcom/sm8350-mtp.dt.yaml

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210929034253.24570-7-shawn.guo@linaro.org
2021-10-24 13:04:03 -05:00
Shawn Guo
03ceec4e34 arm64: dts: qcom: Drop max-microamp and vddp-ref-clk properties from QMP PHY
The following properties are not supported and causing dtbs_check
warnings.

- vdda-phy-max-microamp
- vdda-pll-max-microamp
- vddp-ref-clk-max-microamp
- vddp-ref-clk-always-on

Drop them from QMP PHY nodes.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210929034253.24570-6-shawn.guo@linaro.org
2021-10-24 13:04:03 -05:00
Shawn Guo
1351512f29 arm64: dts: qcom: Correct QMP PHY child node name
Many child nodes of QMP PHY are named without following bindings schema
and causing dtbs_check warnings like below.

phy@1c06000: 'lane@1c06800' does not match any of the regexes: '^phy@[0-9a-f]+$'
        arch/arm64/boot/dts/qcom/msm8998-asus-novago-tp370ql.dt.yaml
        arch/arm64/boot/dts/qcom/msm8998-hp-envy-x2.dt.yaml
        arch/arm64/boot/dts/qcom/msm8998-lenovo-miix-630.dt.yaml
        arch/arm64/boot/dts/qcom/msm8998-mtp.dt.yaml
        arch/arm64/boot/dts/qcom/msm8998-oneplus-cheeseburger.dt.yaml
        arch/arm64/boot/dts/qcom/msm8998-oneplus-dumpling.dt.yaml

Correct them to fix the warnings.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210929034253.24570-5-shawn.guo@linaro.org
2021-10-24 13:04:03 -05:00
Shawn Guo
82d61e19fc arm64: dts: qcom: msm8996: Move '#clock-cells' to QMP PHY child node
'#clock-cells' is a required property of QMP PHY child node, not itself.
Move it to fix the dtbs_check warnings.

There are only '#clock-cells' removal from SM8350 QMP PHY nodes, because
child nodes already have the property.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210929034253.24570-4-shawn.guo@linaro.org
2021-10-24 13:04:03 -05:00
Rajesh Patil
6ea15b5065 arm64: dts: qcom: sc7280: Add 200MHz in qspi_opp_table
Add 200MHz OPP in qspi_opp_table

Signed-off-by: Rajesh Patil <rajpat@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1632892123-11006-1-git-send-email-rajpat@codeaurora.org
2021-10-24 13:04:03 -05:00
Douglas Anderson
12a7f71a8e arm64: dts: qcom: pmk8350: Make RTC disabled by default; enable on sc7280-idp
The RTC on the pmk8350 is not useful on all boards. Some boards may
not provide backup power to the PMIC but might have another RTC on the
board that does have backup power. In this case it's better to not use
the RTC on the PMIC.

At the moment, the only boards that includes this PMIC are sc7280-idp
and sc7280-idp2. On sc7280-idp I'm not aware of any other RTCs, but
sc7280-idp2 has a Chrome OS EC on it and this is intended to provide
the RTC for the AP.

Let's do what we normally do for hardware that's not used by all
boards and set it to a default status of "disabled" and then enable it
on the boards that need it.

NOTE: for sc7280-idp it's _possible_ we might also want to add
`allow-set-time;`. That could be the subject of a future patch if it
is indeed true.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Satya Priya <skakit@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
[bjorn: Enable the RTC on the MTP as well]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210929153553.1.Ib44c2ac967833d7a3f51452d44d15b7b8d23c1f0@changeid
2021-10-24 13:04:03 -05:00
Chukun Pan
9c0bd8e537 arm64: dts: qcom: ipq8074: Add QUP5 I2C node
Add node to support the QUP5 I2C controller inside of IPQ8074.
It is exactly the same as QUP2 controllers.
Some routers like ZTE MF269 use this bus.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211001145421.18302-1-amadeus@jmu.edu.cn
2021-10-24 13:03:57 -05:00
Masahiro Yamada
8212f8986d kbuild: use more subdir- for visiting subdirectories while cleaning
Documentation/kbuild/makefiles.rst suggests to use "archclean" for
cleaning arch/$(SRCARCH)/boot/, but it is not a hard requirement.

Since commit d92cc4d516 ("kbuild: require all architectures to have
arch/$(SRCARCH)/Kbuild"), we can use the "subdir- += boot" trick for
all architectures. This can take advantage of the parallel option (-j)
for "make clean".

I also cleaned up the comments in arch/$(SRCARCH)/Makefile. The "archdep"
target no longer exists.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Kees Cook <keescook@chromium.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc)
2021-10-24 13:49:46 +09:00
Amit Pundir
503da6e2d4 arm64: dts: qcom: qrb5165-rb5: Add msm-id and board-id
Add qcom,msm-id and qcom,board-id for Robotics Board RB5.
This will help us boot the device with newer Android boot
image header versions, which package dtb separately
instead of the default Image.gz-dtb (appended dtb) format.

Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210930185742.117928-2-amit.pundir@linaro.org
2021-10-23 22:43:24 -05:00
Amit Pundir
93ec8732f6 arm64: dts: qcom: sdm845-db845c: Add msm-id and board-id
Add qcom,msm-id and qcom,board-id for Dragonboard 845c.
This will help us boot the device with newer Android boot
image header versions, which package dtb separately
instead of the default Image.gz-dtb (appended dtb) format.

Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210930185742.117928-1-amit.pundir@linaro.org
2021-10-23 22:43:23 -05:00
Konrad Dybcio
dea1a7880f arm64: dts: qcom: sdm845: Move gpio.h inclusion to SoC DTSI
Almost any board that boots and has a way to interact with it
(say for the rare cases of just-pstore or let's-rely-on-bootloader-setup)
needs to set some GPIOs, so it makes no sense to include gpio.h separately
each time. Hence move it to SoC DTSI.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211002001358.45920-6-konrad.dybcio@somainline.org
2021-10-23 22:41:52 -05:00
Konrad Dybcio
26b59eb53a arm64: dts: qcom: sdm845: Add size/address-cells to dsi[01]
Add the aforementioned properties in the SoC DTSI so that everybody doesn't
have to copy that into their device DTs, effectively reducing code
duplication.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211002001358.45920-5-konrad.dybcio@somainline.org
2021-10-23 22:41:52 -05:00
Konrad Dybcio
4a5622c1d9 arm64: dts: qcom: sdm845: Don't disable MDP explicitly
DPU/MDSS is borderline useless without MDP, so disabling
both of them makes little sense. With this change, enabling
mdss will be enough.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211002001358.45920-4-konrad.dybcio@somainline.org
2021-10-23 22:41:52 -05:00
Konrad Dybcio
7f761609d7 arm64: dts: qcom: sdm845: Disable Adreno, modem and Venus by default
Components that rely on proprietary (not to mention signed!) firmware should
not be enabled by default, as lack of the aforementioned firmware could cause
various issues, from random errors to straight-up failing to boot.

Re-enable these remote processors on boards that didn't previously explicitly
disable them.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Tested-By: Steev Klimaszewski <steev@kali.org>
[bjorn: Added missing changes to db845c and lenovo-yoga-c630 to the patch]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211002001358.45920-3-konrad.dybcio@somainline.org
2021-10-23 22:41:06 -05:00
Konrad Dybcio
d87e9a4d27 arm64: dts: qcom: sdm845: Add XO clock to SDHCI
Add the missing XO clock to the SDHCI controller.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211002001358.45920-2-konrad.dybcio@somainline.org
2021-10-23 22:36:52 -05:00
Stephan Gerhold
a22f9a766e arm64: dts: qcom: msm8916: Add CPU ACC and SAW/SPM
Add the device tree nodes necessary for SMP bring-up and cpuidle
without PSCI on ARM32. The hardware is typically controlled by the
PSCI implementation in the TrustZone firmware and is therefore marked
as status = "reserved" by default (from the device tree specification):

  "Indicates that the device is operational, but should not be used.
   Typically this is used for devices that are controlled by another
   software component, such as platform firmware."

Since this is part of the MSM8916 SoC it should be added to msm8916.dtsi
but in practice these nodes should only get enabled via an extra include
on ARM32.

This is necessary for some devices with signed firmware which is missing
both ARM64 and PSCI support and can therefore only boot ARM32 kernels.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004204955.21077-13-stephan@gerhold.net
2021-10-23 22:35:38 -05:00
Stephan Gerhold
ab0f0987e0 arm64: dts: qcom: msm8916-samsung-serranove: Add NFC
The LTE version of the S4 Mini VE has a NXP PN547, which is supported
by the nxp-nci-i2c driver in mainline. It seems to detect NFC tags
using "nfctool" just fine, although more testing is difficult given
there seem to be very few useful applications making use of the
Linux NFC subsystem. :(

Note that for some reason Samsung decided to connect the I2C pins
to GPIOs where no hardware I2C bus is available, so we need to
fall back to software bit-banging with i2c-gpio.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004201921.18526-7-stephan@gerhold.net
2021-10-23 22:23:02 -05:00
Stephan Gerhold
792b495098 arm64: dts: qcom: msm8916-samsung-serranove: Add rt5033 battery
Like the Samsung Galaxy A3/A5, the S4 Mini VE uses a Richtek RT5033 PMIC
as battery fuel gauge, charger, flash LED and for some regulators.
For now, only add the fuel gauge/battery device to the device tree,
so we can check the remaining battery percentage.

The other RT5033 drivers need some more work first before
they can be used properly.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004201921.18526-6-stephan@gerhold.net
2021-10-23 22:23:02 -05:00
Stephan Gerhold
85733cd737 arm64: dts: qcom: msm8916-samsung-serranove: Add IMU
Add the STMicroelectronics LSM6DS3 IMU that is used in the S4 Mini VE
to the device tree.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004201921.18526-5-stephan@gerhold.net
2021-10-23 22:23:02 -05:00
Stephan Gerhold
3fb7605735 arm64: dts: qcom: msm8916-samsung-serranove: Add touch key
Add the CORERIVER TC360 touch key together with the two necessary
fixed regulators for it.

Note that for some reason Samsung decided to connect this to GPIOs
where no hardware I2C bus is available, so we need to fall back
to software bit-banging using i2c-gpio.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004201921.18526-4-stephan@gerhold.net
2021-10-23 22:23:02 -05:00
Stephan Gerhold
c6b4ddc08d arm64: dts: qcom: msm8916-samsung-serranove: Add touch screen
Like msm8916-samsung-a3u-eur, the S4 Mini VE uses a Zinitix BT541
touch screen. Add it together with the necessary fixed-regulator
to the device tree.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004201921.18526-3-stephan@gerhold.net
2021-10-23 22:23:02 -05:00
Stephan Gerhold
0e0253ccaf arm64: dts: qcom: Add device tree for Samsung Galaxy S4 Mini Value Edition
The Samsung Galaxy S4 Mini Value Edition is an updated version of the
original S4 Mini based on MSM8916. It is similar to the other Samsung
devices based on MSM8916 with only a few minor differences.

The device tree contains initial support for the S4 Mini Value Edition with:
  - UART
  - eMMC/SD card (needs quirk for some reason)
  - Buttons
  - Vibrator
  - WiFi/Bluetooth (WCNSS)
  - USB

Unfortunately, the S4 Mini VE was released with outdated 32-bit only
firmware and never received any update from Samsung. Since the 32-bit
TrustZone firmware is signed there seems to be no way currently to
actually boot this device tree on arm64 Linux at the moment. :(

However, it is possible to use this device tree by compiling an ARM32 kernel
instead. The device tree can be easily built on ARM32 with an #include
and it works really well there. To avoid confusion for others it is still
better to add this device tree on arm64. Otherwise it's easy to forget
to update this one when making some changes that affect all MSM8916 devices.

Maybe someone finds a way to boot ARM64 Linux on this device at some point.
In this case I expect that this device tree can be simply used as-is.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004201921.18526-2-stephan@gerhold.net
2021-10-23 22:23:02 -05:00
Luca Weiss
4cbea66876 arm64: dts: qcom: sm7225: Add device tree for Fairphone 4
Add device tree for the Fairphone 4 smartphone which is based on
Snapdragon 750G (sm7225) which is basically sm6350.

Currently supported are UART, physical buttons (power & volume), screen
(based on simple-framebuffer set up by the bootloader), regulators and
USB.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211007212444.328034-12-luca@z3ntu.xyz
2021-10-23 22:07:08 -05:00
Luca Weiss
134283324d arm64: dts: qcom: Add SM7225 device tree
The Snapdragon 750G (sm7225) is software-wise very similar to Snapdragon
690 (sm6350) with minor differences in clock speeds and as added here,
it uses the Kryo 570 instead of Kryo 560.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211007212444.328034-11-luca@z3ntu.xyz
2021-10-23 22:07:08 -05:00
Luca Weiss
cd10fb7993 arm64: dts: qcom: sm6350: add debug uart
Add the necessary nodes for the debug uart on SM6350.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211007212444.328034-8-luca@z3ntu.xyz
2021-10-23 22:07:08 -05:00
Luca Weiss
d8a3c775d7 arm64: dts: qcom: Add PM6350 PMIC
PM6350 is used in SM6350 and provides similar functionality to other
Qualcomm PMICs.

Add the pon node with power & volume key and the gpios.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211007212444.328034-7-luca@z3ntu.xyz
2021-10-23 22:07:08 -05:00
Bhupesh Sharma
6dccaae0cb arm64: dts: qcom: sa8155p-adp: Enable remoteproc capabilities
Enable two of the remoteprocs found on SA8155p platform - 'audio and
compute'. Also specify firmware path for them.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210928140929.2549459-3-bhupesh.sharma@linaro.org
2021-10-23 22:00:50 -05:00
Bhupesh Sharma
81729330a7 arm64: dts: qcom: sm8150: Add fastrpc nodes
Add fastrpc nodes for sDSP, cDSP, and aDSP.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210928140929.2549459-2-bhupesh.sharma@linaro.org
2021-10-23 21:59:50 -05:00
Ola Jeppsson
178056a461 arm64: dts: qcom: sm8350: Add fastrpc nodes
Add fastrpc nodes for sDSP, cDSP, and aDSP.

Signed-off-by: Ola Jeppsson <ola@snap.com>
Acked-by: Heinrich Fink <hfink@snap.com>
Acked-by: Olivier Schonken <oschonken@snapchat.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211018085017.1549494-1-ola@snap.com
2021-10-23 21:56:07 -05:00
Lorenz Bauer
5d63ae9082 bpf: Define bpf_jit_alloc_exec_limit for arm64 JIT
Expose the maximum amount of useable memory from the arm64 JIT.

Signed-off-by: Lorenz Bauer <lmb@cloudflare.com>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
Link: https://lore.kernel.org/bpf/20211014142554.53120-3-lmb@cloudflare.com
2021-10-22 17:23:53 -07:00
Masami Hiramatsu
cd9bc2c925 arm64: Recover kretprobe modified return address in stacktrace
Since the kretprobe replaces the function return address with
the kretprobe_trampoline on the stack, stack unwinder shows it
instead of the correct return address.

This checks whether the next return address is the
__kretprobe_trampoline(), and if so, try to find the correct
return address from the kretprobe instance list. For this purpose
this adds 'kr_cur' loop cursor to memorize the current kretprobe
instance.

With this fix, now arm64 can enable
CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE, and pass the
kprobe self tests.

Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2021-10-22 12:16:53 -04:00
Masami Hiramatsu
fc6d647638 arm64: kprobes: Make a frame pointer on __kretprobe_trampoline
Make a frame pointer (make the x29 register points the
address of pt_regs->regs[29]) on __kretprobe_trampoline.

This frame pointer will be used by the stacktracer when it is
called from the kretprobe handlers. In this case, the stack
tracer will unwind stack to trampoline_probe_handler() and
find the next frame pointer in the stack frame of the
__kretprobe_trampoline().

Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2021-10-22 12:16:53 -04:00
Masami Hiramatsu
f871741062 arm64: kprobes: Record frame pointer with kretprobe instance
Record the frame pointer instead of stack address with kretprobe
instance as the identifier on the instance list.
Since arm64 always enable CONFIG_FRAME_POINTER, we can use the
actual frame pointer (x29).

This will allow the stacktrace code to find the original return
address from the FP alone.

Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Acked-by: Will Deacon <will@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2021-10-22 12:16:53 -04:00
Suzuki K Poulose
8d81b2a38d arm64: errata: Add detection for TRBE write to out-of-range
Arm Neoverse-N2 and Cortex-A710 cores are affected by an erratum where
the trbe, under some circumstances, might write upto 64bytes to an
address after the Limit as programmed by the TRBLIMITR_EL1.LIMIT.
This might -
  - Corrupt a page in the ring buffer, which may corrupt trace from a
    previous session, consumed by userspace.
  - Hit the guard page at the end of the vmalloc area and raise a fault.

To keep the handling simpler, we always leave the last page from the
range, which TRBE is allowed to write. This can be achieved by ensuring
that we always have more than a PAGE worth space in the range, while
calculating the LIMIT for TRBE. And then the LIMIT pointer can be
adjusted to leave the PAGE (TRBLIMITR.LIMIT -= PAGE_SIZE), out of the
TRBE range while enabling it. This makes sure that the TRBE will only
write to an area within its allowed limit (i.e, [head-head+size]) and
we do not have to handle address faults within the driver.

Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-5-suzuki.poulose@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
2021-10-21 17:49:17 +01:00
Suzuki K Poulose
fa82d0b4b8 arm64: errata: Add workaround for TSB flush failures
Arm Neoverse-N2 (#2067961) and Cortex-A710 (#2054223) suffers
from errata, where a TSB (trace synchronization barrier)
fails to flush the trace data completely, when executed from
a trace prohibited region. In Linux we always execute it
after we have moved the PE to trace prohibited region. So,
we can apply the workaround every time a TSB is executed.

The work around is to issue two TSB consecutively.

NOTE: This errata is defined as LOCAL_CPU_ERRATUM, implying
that a late CPU could be blocked from booting if it is the
first CPU that requires the workaround. This is because we
do not allow setting a cpu_hwcaps after the SMP boot. The
other alternative is to use "this_cpu_has_cap()" instead
of the faster system wide check, which may be a bit of an
overhead, given we may have to do this in nvhe KVM host
before a guest entry.

Cc: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-4-suzuki.poulose@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
2021-10-21 17:49:16 +01:00
Suzuki K Poulose
b9d216fcef arm64: errata: Add detection for TRBE overwrite in FILL mode
Arm Neoverse-N2 and the Cortex-A710 cores are affected
by a CPU erratum where the TRBE will overwrite the trace buffer
in FILL mode. The TRBE doesn't stop (as expected in FILL mode)
when it reaches the limit and wraps to the base to continue
writing upto 3 cache lines. This will overwrite any trace that
was written previously.

Add the Neoverse-N2 erratum(#2139208) and Cortex-A710 erratum
(#2119858) to the detection logic.

This will be used by the TRBE driver in later patches to work
around the issue. The detection has been kept with the core
arm64 errata framework list to make sure :
  - We don't duplicate the framework in TRBE driver
  - The errata detection is advertised like the rest
    of the CPU errata.

Note that the Kconfig entries are not fully active until the
TRBE driver implements the work around.

Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
cc: Leo Yan <leo.yan@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-3-suzuki.poulose@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
2021-10-21 17:49:16 +01:00
Suzuki K Poulose
2d0d656700 arm64: Add Neoverse-N2, Cortex-A710 CPU part definition
Add the CPU Partnumbers for the new Arm designs.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will@kernel.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-2-suzuki.poulose@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
2021-10-21 17:49:16 +01:00