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Make the turris mox rwtm firmware more generic for Armada 3700 SoCs
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCYM7/HQAKCRALBhiOFHI7
1d1YAJ9WfxE3M0KhsvFQ/9wo4cniPTSMuACgou49J9SIZTQ95fZ9GGdZGy7BKe4=
=0Qm0
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQJDBAABCgAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAmDT5pQPHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3/DAP+wVANvRuHerjlPKiQRWAFqzKvy/31vigr5In
CBdOPcz70BvFDZKZmbC1eRf2mRUznDxZwT2u/E6pbqqJ//+Vz0qY68nX8u9/Dmxj
nUXPvlF/YqE5NQGZ4UKlReA4p+/IYrjguXd1vIrmEX1iqj8hn4PfGdsNN4r9wZeP
TDir1ILweAMpiabUF2NP/p5StKKDWPuAoNKDq7nUssqsI0C33SfzWyMO4s1lZYd2
WkfPR9p1t3baoYOArVr4CZHDwk//R0Hh3cFTVqoNR531BpOo29jvaLSarprBxhiQ
/CcgRoq8Sar8SXkS5kKFrdNZjEbflJRbq07k8PJSasIYt52qqz6kA7soXwPA/2Ie
xiYJLaoLCwX0dyf7hsHSIgBZHNq3FCmsVRqrb25nImw6kReBQKLQODogU7RudbOe
+hELQDjOtcRvJzsIruXcJ1Y1e3TGjXiYv+tXOySLpq3ivWGrCLwF28B1g8raINrR
W0bPQo62UUHmLBUxizIQn5h9lGz+znPisWjvzaMyQyLAaWZ3/tps77VfbxWaDGuA
rbaxveHU4WLHmW2eGBqVJW2UQf/D082NBM4z9wyY+aCZ7Lex3r6UQAK1xEdxp0/1
VELQg+R+8+U3U8DY/vzH3FLLf+Xbu1h235J0+0HB9GEyaO0ihoM1CCXJpxGwbnMd
GAIIBg9I
=S+hO
-----END PGP SIGNATURE-----
Merge tag 'mvebu-drivers-5.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/drivers
mvebu drivers for 5.14 (part 1)
Make the turris mox rwtm firmware more generic for Armada 3700 SoCs
* tag 'mvebu-drivers-5.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
firmware: turris-mox-rwtm: add marvell,armada-3700-rwtm-firmware compatible string
Link: https://lore.kernel.org/r/87bl802a2d.fsf@BL-laptop
Signed-off-by: Olof Johansson <olof@lixom.net>
Few fixes for the Turris Mox rWTM firmware found on the Armada 3700
SoCs.
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCYM79VAAKCRALBhiOFHI7
1dn6AKCYZ+OiQwsfRWIasbrqZo3q7nhZXwCeL+kOOXMoafAIscGOPrF+rhwFNG4=
=GNs9
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQJDBAABCgAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAmDT5oMPHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3cE4P/0sJC2VQBaxnauF/0ekxFExwTLAtEtT9cUWs
ghGf6/kYMsNOfs1QhME24Z18r2WpNlm4OfEpq5dCsYBRynp7z/4PuRI4oY03Qsfd
24i5FaL1Vzp70yd/iz4dBdlgdc2aaIVpyw9dZi6GXlHQEAZxbfhpY+t0YwXjHow0
nqtzifgJ9gy4G8XNtpFQ/aQcFVUofAwmfWRTq0k9lRd+OPuJ2+qwSLqREV6ilxRK
yuJDkT2BHz8KV7RtOiXYK1PpClVYDsFDZdk4aMHxTeStFWLo2qoidpCGCry7JGdp
uFRrSm5vbE1Cq0VTI4k53v94k5dC+0k60DrQucaOgmruEEkD9m7/7GrtDJSo+Ajj
T9IU5ADCqvhk+vpC0x6ZlIg6Il4t9deOT9E4MeARr0XS03ucWSGX6H4NRKHbEDRy
UkLPuOWfUWpRX59+PfB8FBuTRNgv6AKwi3oQYhcxjBkqfV7mr3DKPdjCqDwJTBu9
hGg76jqeR4lxVI/cVDGO0MPCXjsltDgs+KQKmmolXqaOgyiJicxFN5tXqoy7vqh4
x/5DlA+qwlZLKDljvNxm2lVX46B4ivGMVguSH3TgRxZFKe1phkzbMD8C9cXxs4by
RbvCtBHsrB3QgNZh/4eSJcuWWXJguActXhKxDl3PdNYjm6XrXAyRHCZgefZYns8X
ej/aEClE
=NNPw
-----END PGP SIGNATURE-----
Merge tag 'mvebu-fixes-5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/drivers
mvebu fixes for 5.13 (part 1)
Few fixes for the Turris Mox rWTM firmware found on the Armada 3700
SoCs.
* tag 'mvebu-fixes-5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
firmware: turris-mox-rwtm: show message about HWRNG registration
firmware: turris-mox-rwtm: fail probing when firmware does not support hwrng
firmware: turris-mox-rwtm: report failures better
firmware: turris-mox-rwtm: fix reply status decoding function
Link: https://lore.kernel.org/r/87eecx0w6s.fsf@BL-laptop
Signed-off-by: Olof Johansson <olof@lixom.net>
This tag contains a few small fixes, allows to build the Berlin reset
driver as a module, and adds stubs to the reset controller API to allow
compile-testing drivers outside of drivers/reset without enabling the
reset framework.
-----BEGIN PGP SIGNATURE-----
iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCYMtFIxcccC56YWJlbEBw
ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwEIsAP4m0pQOBknwAy8IpNXhXzqcXd3d
fcFn36QGzMxA3CEI7QD+IQMxfKvCOZNUVKaDQa3azX6gvbooqsr8xl+5MYsHSQU=
=/q1G
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQJDBAABCgAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAmDLqRoPHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3xZcP/33VY9ORMKiiNIwKGz3DKHZY8M3139xyYA/e
QXazt/Uo1OahmGpGqM8hnoIciP7CbasY8HyED4mhdIoulRAmZ9i7wILl2punXLP+
PxlTHnYNStPDO36mt9GleNu7/HpOjJNvoEklpeslNMrDOImQ4mbyrSmrY4Yp6gop
dSDMwXPtSTkFfxnNYUPYpf+TYXv1II9SaDYhR8rixhC6LXGv5Xa5QMNxRUwds1id
xXgNBLb06lPvgYQVu7cyrroa5BbAyeVBehJaWXbymvY7gETXrOy6mH3Koo3enHA2
XyWsWo/AsY1ZkzT3zldS6YGGPW6v2Rp8+XpQ/qFD9bYf6rFzMHuebF63RHgD/ljM
HiVRsIEnAJO1Agq/0aMgcPv5TT4ehIblU1NZFUZ/5aeo7mGrHArNjm6nFRh0ztpI
f5LbavbfDAzSF/1q4sDvpauD4y9K/WgTXGx99QRRQN6oayUsY5BbsIIQ9K0VDPKq
8a+SnZuxPWwleZ959OQDsaBM8mNEK/2aLjXI63YJyH8HB8Xs8Orx5iYRcYDz5qlb
oH6FfwpckLusrvFdp/sU1KMmtPtKxmUFPXZcrE3OCeoL3UpgxlSgGFUHBQHqZppm
rKtpJZbxp81MEls9U5yP1PhNtvt8xl0BuecTMWVCf6ccIYH/O67+q45usM6A8hAc
BEzPhhZ9
=AwL+
-----END PGP SIGNATURE-----
Merge tag 'reset-for-v5.14-2' of git://git.pengutronix.de/pza/linux into arm/drivers
Reset controller updates for v5.14, part2
This tag contains a few small fixes, allows to build the Berlin reset
driver as a module, and adds stubs to the reset controller API to allow
compile-testing drivers outside of drivers/reset without enabling the
reset framework.
* tag 'reset-for-v5.14-2' of git://git.pengutronix.de/pza/linux:
reset: Add compile-test stubs
reset: berlin: support module build
reset: bail if try_module_get() fails
reset: mchp: sparx5: fix return value check in mchp_sparx5_map_io()
reset: lantiq: use devm_reset_controller_register()
reset: hi6220: Use the correct HiSilicon copyright
Link: https://lore.kernel.org/r/14d33ac19b2a107e97ce1ab264987b707baa9ba7.camel@pengutronix.de
Signed-off-by: Olof Johansson <olof@lixom.net>
Add more generic compatible string 'marvell,armada-3700-rwtm-firmware' for
this driver, since it can also be used on other Armada 3720 devices.
Current compatible string 'cznic,turris-mox-rwtm' is kept for backward
compatibility.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Currently it is hard to determinate if on Armada 3720 device is HWRNG
by running kernel accessible or not. So print information message into
dmesg when HWRNG is available and registration was successful.
Fixes: 389711b37493 ("firmware: Add Turris Mox rWTM firmware driver")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
When Marvell's rWTM firmware, which does not support the GET_RANDOM
command, is used, kernel prints an error message
hwrng: no data available
every 10 seconds.
Fail probing of this driver if the rWTM firmware does not support the
GET_RANDOM command.
Fixes: 389711b37493 ("firmware: Add Turris Mox rWTM firmware driver")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Report a notice level message if a command is not supported by the rWTM
firmware.
This should not be an error, merely a notice, because the firmware can
be used on boards that do not have manufacturing information burned.
Fixes: 389711b37493 ("firmware: Add Turris Mox rWTM firmware driver")
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The status decoding function mox_get_status() currently contains an
incorrect check: if the error status is not MBOX_STS_SUCCESS, it always
returns -EIO, so the comparison to MBOX_STS_FAIL is never executed and
we don't get the actual error code sent by the firmware.
Fix this.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Fixes: 389711b37493 ("firmware: Add Turris Mox rWTM firmware driver")
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Second set of changes for Tegra SoC memory controller drivers,
containing patchset from Thierry Reding:
"The goal here is to avoid early identity mappings altogether and instead
postpone the need for the identity mappings to when devices are attached
to the SMMU. This works by making the SMMU driver coordinate with the
memory controller driver on when to start enforcing SMMU translations.
This makes Tegra behave in a more standard way and pushes the code to
deal with the Tegra-specific programming into the NVIDIA SMMU
implementation."
This pulls a dependency from Will Deacon (ARM SMMU driver) and contains
further ARM SMMU driver patches to resolve complex dependencies between
different patchsets. The pull from Will contains only one patch
("Implement ->probe_finalize()"). Further work in Will's tree might
depend on this patch, therefore patch was applied there.
On the other hand, this ("Implement ->probe_finalize()") patch is also a
dependency for ARM SMMU driver changes for Tegra. These changes,
bringing seamless transition from the firmware framebuffer to the OS
framebuffer, depend on earlier Tegra memory controller driver patches.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmDHsjAQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD14vID/9let7+Nk2rX8g3RcHbCCcTYaDnsfG1Jthw
eq2BPBJstRB4IxL4AyoVGZmha7boDpOts95sJPLiETA5OMzYPFk2YhVm+yVnN6d0
Wo9j/XFRMH8RyfSDZdIJQZ4q3dUgVt+6dCDonuk+lSLEYpo39lPBMoKxZVGIoiGK
/qd1nFBhxUWWqJsZDUaxuSK75mCK1dWzwxUqT4SQ7ww0HKy7zJXLskQj4vKT6fbt
BS+wzlQqjt72VvYGcU0ARv4/7nF3rENLG/1va9khbvImgUHJ8FJMllBPdi/rj4Gk
diwoPpbDBeAv2NsXGwqribVtcUNZiBXNh1GOIea26WdtYHpA2ZC10uZC+TK6vwi5
62sUu7MdFJ5Wrrbo+Pzl8iCrvUVXoXAA9fRorYDamfkTh+vuVNEN4/8Frkt2bWe6
ScLgqWWG7jEiwxOAcmLq4jhcMpVyTXOyQ6U0Gk9VHeGWA+WkubcyBoEripiEFLY3
25oMVXVw+xbGSEameDkosaxyVvbshKnxw8RnBEZ4IG18Xp3xJYBqG1w4iSIWowv3
pN4hUF57+KrDrBDBjWm7sWeXPhZ7ibW/EXVTvp0hqsigFriupRnaO8sPAyaTuTrL
4rMhCO+JoHvIWUtDzpLutLG6ZTXdr1PRcEZDooZGaUKuABbGIiPNtU0Phj96rcdf
rD8dZEyjoQ==
=qHnq
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQJDBAABCgAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAmDKmQ4PHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3io8P/i/rcOnipS5JPscHsPsgnAW+P1VbCoHBKdp9
KZTPQXbtE47pUrYk7bYgiWJ5uWzY8toRUyYjgXZmwWWOzM8PpP/aadXSTSD8oEZ7
t9mva3NTtnfT8LX4sjYxmY9P4vIzPMM7KqsT8JkEiTMamVFDLbx+KAUSv0T+ykmY
iSe4o6QKN/2ErHLK9PrIjVFTD9zPA8uAjKvnUxBAZHp+8FoX0W5mwT1D7GNhj792
Zsi7VodViw0xz+DuYNJQ7wQs7O3QrJnEQplXaLBJhxb08i8o7gEjLwX7WVXpW5wx
y3P3XrELAZk3MxAgMFVNjpKdf4vVe4z4oFjr8a9hbUkJpTFIwiLqgu8tQaV83gjh
xzfWuNf5BKaSic/VGuj+pYS9Y7TFjqNsVp7ziXmpS8KFGh3FzyjVWsUaewwD/H47
pVldVHRvhXp77p+H6R8Uo3Jr2oBQflynHP4r7LB9mAZ2gBuygW8XczgL+q7Z/WZt
yZrtPAY+fYFQ6P+Xk8scb7tzFYYu1XXs/FFB0BCEAABhB8vde3aQ3nt2kLB26pfM
/nzP9oAngZxnN3EdKutH5U9D/WRTOL2ujrPF+8gNekEo0phM852r1AoDJ899kX3L
sngdqvnXbMI5LNaFq1F14RX8jGU6bxf2trVlvKg+siD4YBsLrxw03vni5a9k5n8H
LfEUaejs
=pB39
-----END PGP SIGNATURE-----
Merge tag 'memory-controller-drv-tegra-5.14-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers
Memory controller drivers for v5.14 - Tegra SoC, part two
Second set of changes for Tegra SoC memory controller drivers,
containing patchset from Thierry Reding:
"The goal here is to avoid early identity mappings altogether and instead
postpone the need for the identity mappings to when devices are attached
to the SMMU. This works by making the SMMU driver coordinate with the
memory controller driver on when to start enforcing SMMU translations.
This makes Tegra behave in a more standard way and pushes the code to
deal with the Tegra-specific programming into the NVIDIA SMMU
implementation."
This pulls a dependency from Will Deacon (ARM SMMU driver) and contains
further ARM SMMU driver patches to resolve complex dependencies between
different patchsets. The pull from Will contains only one patch
("Implement ->probe_finalize()"). Further work in Will's tree might
depend on this patch, therefore patch was applied there.
On the other hand, this ("Implement ->probe_finalize()") patch is also a
dependency for ARM SMMU driver changes for Tegra. These changes,
bringing seamless transition from the firmware framebuffer to the OS
framebuffer, depend on earlier Tegra memory controller driver patches.
* tag 'memory-controller-drv-tegra-5.14-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: (37 commits)
iommu/arm-smmu: Use Tegra implementation on Tegra186
iommu/arm-smmu: tegra: Implement SID override programming
iommu/arm-smmu: tegra: Detect number of instances at runtime
dt-bindings: arm-smmu: Add Tegra186 compatible string
memory: tegra: Delete dead debugfs checking code
iommu/arm-smmu: Implement ->probe_finalize()
memory: tegra: Implement SID override programming
memory: tegra: Split Tegra194 data into separate file
memory: tegra: Add memory client IDs to tables
memory: tegra: Unify drivers
memory: tegra: Only initialize reset controller if available
memory: tegra: Make IRQ support opitonal
memory: tegra: Parameterize interrupt handler
memory: tegra: Extract setup code into callback
memory: tegra: Make per-SoC setup more generic
memory: tegra: Push suspend/resume into SoC drivers
memory: tegra: Introduce struct tegra_mc_ops
memory: tegra: Unify struct tegra_mc across SoC generations
memory: tegra: Consolidate register fields
memory: tegra30-emc: Use devm_tegra_core_dev_init_opp_table()
...
Link: https://lore.kernel.org/r/20210614195200.21657-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Olof Johansson <olof@lixom.net>
The Arm FFA specification describes a software architecture to
leverages the virtualization extension to isolate software images
provided by an ecosystem of vendors from each other and describes
interfaces that standardize communication between the various software
images including communication between images in the Secure world and
Normal world. Any Hypervisor could use the FFA interfaces to enable
communication between VMs it manages.
The Hypervisor a.k.a Partition managers in FFA terminology can assign
system resources(Memory regions, Devices, CPU cycles) to the partitions
and manage isolation amongst them.
This is the initial and minimal support for the FFA interface to enable
communication between secure partitions and the normal world OS.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEunHlEgbzHrJD3ZPhAEG6vDF+4pgFAmC19HAACgkQAEG6vDF+
4pijcw//XugK+jFEN7fA6eFzE7OeGt1xPG2mhG5TF1jtvQv2TQlij50V8evOgJmd
kM3h5pUeEWMt4XrF0I2TlLOglBHLpFbU253kRPRC7zeYxK+AzD6TxtABKZ+eykAk
OEQisX9FMp/h1rnnvu/OqT7l2AH/pZkVIwc2GQi6h+BvQzUq/NPanuuT+rS00U2E
lLfZ98MQIjoUSDKr6r0C83gt8BlUWR62jkIkhsLycwFFouhWrdewXptfOntD4wIs
1pDRi4+qdZLbOeFCLxHR9NfMTdGdnBY//P8NwmnSYV6YnbtVcgwvwyRqMAC6ElJM
Lk+AuqJS+RSCdyqQerjkvVMNSQx778nPsmzEMteOyLCAfr2kXhQ84FfqaJpFBDsJ
GQUUW8H5runR2P4p2Q3Tql9tTt7AhrOuO0iUIxBu5cq4YRBPMBamtRbquJtYN+VH
9ggV4ygbkq4BIKYaBFaVffHOg0ygbvDTkXv/09wRmcGNH12y9AeuLyumhwcWxV0Z
Kk0bjEieTjvisrshOeKOp5eOuhyixhFJNcffAOIos3KIkuQ1ivAL7cIig9fWF+k0
AbqOTvX4dVSdIKBi+Q8op2CZ1gyDi80P43MstTgKlbZ8AN2YWxa9S3Iw27D4gY8u
tIN8PqkB2NctwQecVcGv58JyDlqTRnCcuole7fJWr3iGRdGvyV4=
=DQ7A
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQJDBAABCgAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAmDI23cPHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3uCcP/37GON7dD4zlic7idjGb6Wh5VuaaCSkKJDGc
J7KDji52tvYVzNiqlTJu4qgTzWEIX3RLGqKHjeZHBDUwuHoWZFOTtVAU0d3xLVw1
gXa9LQypRQ094pZ4/5ClaiBV2tiQB2E8j/jppynG+8XpOUDhu5rFD+dUpOhQwqW+
REs+t1xDuGItcoweJj7ufXw+ZLgoLkbRnU7YniPQe4awS8Ml6lwDi1Rj7CXHmpW4
5AMA1FLovAZ9Y0Dyy3MVOkfHTP/LVP6LPLxcSUc6xkBT9We76WgiHPMtzvNiwSAV
ZLTua2cB9OdYt1ZGB40x4XDEZs85L8dGSSRXsARkcX+ImR3rLLOcomdW5QrD7Hgr
1FtoAed13g5cxfiOizjpXLCEl6qxeW3lQ9au4FQ5xCasS7LM5tM/YuiyrafHu+Ep
yVNgy35pBNjgh0NmGCGtrH7H9d/n7kdMgTNXHVkD6GW8qxXKEVfVVtwATSRJMRTV
1bjxXjA2B7u91xAnWm874X6SLVYgxRXtHUR4EMxWoSATNAL4pvTNfGz6Wwt1QD1D
ZJ8wqjYKhdEnKPqjtUW7iFYrbUd550B9FXwu8f3Uaau8/ON9P+t63C1XPdmyZA57
CQMufO8TaXJ2ARDVxzO5dyYhgqN5Ew2DvDj/qmlGz26mF25JmdigeuRBplNF302+
wj3e47y6
=TfmE
-----END PGP SIGNATURE-----
Merge tag 'arm-ffa-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/drivers
Arm Firmware Framework for ARMv8-A(FFA) interface driver
The Arm FFA specification describes a software architecture to
leverages the virtualization extension to isolate software images
provided by an ecosystem of vendors from each other and describes
interfaces that standardize communication between the various software
images including communication between images in the Secure world and
Normal world. Any Hypervisor could use the FFA interfaces to enable
communication between VMs it manages.
The Hypervisor a.k.a Partition managers in FFA terminology can assign
system resources(Memory regions, Devices, CPU cycles) to the partitions
and manage isolation amongst them.
This is the initial and minimal support for the FFA interface to enable
communication between secure partitions and the normal world OS.
* tag 'arm-ffa-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
firmware: arm_ffa: Add support for MEM_* interfaces
firmware: arm_ffa: Setup in-kernel users of FFA partitions
firmware: arm_ffa: Add support for SMCCC as transport to FFA driver
firmware: arm_ffa: Add initial Arm FFA driver support
firmware: arm_ffa: Add initial FFA bus support for device enumeration
arm64: smccc: Add support for SMCCCv1.2 extended input/output registers
Link: https://lore.kernel.org/r/20210601095838.GA838783@bogus
Signed-off-by: Olof Johansson <olof@lixom.net>
These changes contain two minor fixes for the Tegra BPMP driver.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmDDjXkTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zodwzD/9GxlLcEtY5TbOrYT7uX/zLz+PqUgLA
Oufl2SOMWnzuTkbR3PlwkD4idKTVjtn9f/8HW9oGdtmihYb6Bo2SiKurZR9Pd1iK
3+HaukH3jDsLsBgiyK4wBtuD+MlcQaoPbcPc7i2azqgJDwkkIHrmk++vgrzuBvul
JQgNSHdJkMdgXQ9tkCQAmDoPi/O3fHyDzl+NtdQQ1toii/0xBRw5Gt9tPACELAF0
dk0PFD6iY/I3iwC9VCJct0JGYYPX4YefkD+OzzYK6UyOlNhFfNd0q8ceZyKGlroM
hpOQW/HDzqE3umLow7SfVv8c96v/dAIoGpjjVZMq0Ci3FhLxLkDb6qepjh9RDEOh
slZx2J60WYfVPjPw0e0TLMblXhojRdbo3BAtKYEHC9rME+JLboaBiRaOr5CVLhn5
Sbe3SDBFYkNYlk0cRUlGgcau0rTLDQee2nv0v74sWHq2Xdrll0aWwkX5n3YbJ07O
zMnmogp/X9ICtKr6fFmjfrn+j6ZPnAnMhRz3ABqmDwd3CPsanouThvMnyBGmzCfB
S7RnBAmzFqCU6Ee+6GXjilHcq0mBFQ1yrKa7rzuZTQtHErR0cfXWbx3k2ZYOniSt
Qxxa9eDPlTvuv3ZOpXmJsAGsYUptcfgMdHGI7U85qmmIDHUkx/N8qoh94KByZGah
io0hwnx/pW2npw==
=W3nY
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.14-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers
firmware: tegra: Changes for v5.14-rc1
These changes contain two minor fixes for the Tegra BPMP driver.
* tag 'tegra-for-5.14-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
firmware: tegra: bpmp: Fix Tegra234-only builds
firmware: tegra: Fix error return code in tegra210_bpmp_init()
Link: https://lore.kernel.org/r/20210611164437.3568059-3-thierry.reding@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
In addition to fixing a kerneldoc issue in the qcom-ebi2 driver this
populates socinfo with a range of platforms and PMICs and extends a few
of the Qualcomm drivers bits of support for MSM8226, MDM9607, SM6125 and
SC8180X.
-----BEGIN PGP SIGNATURE-----
iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmDHzwcbHGJqb3JuLmFu
ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FGQQP/1LIahAfEFvu6UfbVIOJ
6cRsYCNv0UnqzGUqiV+4RehNkq9n/VTEvRKKk8bXrQoH75V4TVoCpKy22h2/13MF
+2zts3dDdsTSLZqRaWJCt2AShkQwqF2W+3cpy9g9hcJaP/5L8rQGSsfmzIyZ/mwn
fp2xHHF624Wf6o8GjMVk7TyeUJ+FTeZovoc9vOPdG0f+Zmb+JniSdl5LTd3h0bYr
ZcFyDnd6/b3sU7jUy3x2tHEZwr8T3uPCN8T2tsrVc6NbjXF7QTnfhtkl8jOOmrZW
MAHr8qC9hjhZDbJCYOvOHpUWXqwIybfsliAE3mEqA7k2AGgeVTr5qBGnGUiBmM1i
OZ+AE34CP3p5L+GFz+ZaDeAa0NhaLMluHCvMb42xvf9iNdlnYoSgmo+CwSTloc4F
hHvnmZtRdCC6A6hjR3pjMZw/gStH5a5HAchLIneAeP/fferoHox/7tb/IOYXcMuW
pkjrXxvR4+0TtV/RSeqIOp2L5vq5UjJkN690UyFzZqltaWd312WPXRaO9L+GKVoc
9Tru3y9kx/oQvt36elB8SKWaiYMpYEie8pGKCWhNRLW/EAZCIPRWcu3aFgkXCP9g
uDjRQEO3Q+h/A4qXrWKuhgbrM+wXwoqSsVyWsiNLu75swjPi11Yx97BQGbqvlC5c
JZ14hDxM/uifaWsndnnPoRqk
=EwKG
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
Qualcomm driver updates for v5.14
In addition to fixing a kerneldoc issue in the qcom-ebi2 driver this
populates socinfo with a range of platforms and PMICs and extends a few
of the Qualcomm drivers bits of support for MSM8226, MDM9607, SM6125 and
SC8180X.
* tag 'qcom-drivers-for-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
firmware: qcom_scm: Add MDM9607 compatible
soc: qcom: rpmpd: Add MDM9607 RPM Power Domains
soc: qcom: smd-rpm: Add MSM8226 compatible
dt-bindings: soc: qcom: smd-rpm: Add MSM8226 compatible
soc: qcom: socinfo: import PMIC IDs from pmic-spmi
bus: qcom-ebi2: Fix incorrect documentation for '{slow,fast}_cfg'
soc: qcom: socinfo: Add more IDs
soc: qcom: rpmhpd: Add SC8180X
dt-bindings: power: rpmpd: Add SC8180X to rpmpd binding
dt-bindings: soc: qcom: smd-rpm: Document SM6125 compatible
soc: qcom: smd-rpm: Add SM6125 compatible
soc: qcom: socinfo: Add remaining IPQ6018 family ID-s
soc: qcom: socinfo: Add missing SoC ID for SM6125
Link: https://lore.kernel.org/r/20210614223727.393159-1-bjorn.andersson@linaro.org
Signed-off-by: Olof Johansson <olof@lixom.net>
- A patch series from Lucas Stach and Peng Fan adding i.MX8MM power
domains support into i.MX GPCv2 driver.
- A couple of patches from Adam Ford adding i.MX8MN power domains on top
of i.MX8MM power domain support.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmDFbO4UHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM7qLQf/ahf5xIQiQFpWMa8A+wJwYFucs4Tz
FD8HzO9/l6/WFQgwTa9WGseEnur5XIjSiyv6sCSBsxbroz8FlQvTpn2sOl0OoONB
OXBM6aSZahC/GMOgAfuKZ3/xftIKxtY4arlzumYC56ox9AzSPxW4UhoFFrabz1zj
Ib4uSMW1VjV9d+qP9QwpM8j24nBhzw7kbhitzlfFPjnDfKbvfl7VTdQLxNWONyTe
bAxSNqcWrrUxslmhHpcUHk0O86GDmxLMktQQuv+yPI7KaD/k4XDfcLMmgFZ0hwPn
08dDFbidovow/aNRu+Ham//qwyuA71qqS+6M7hE34o1IW+UCZchpyo8X4A==
=AVH/
-----END PGP SIGNATURE-----
Merge tag 'imx-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers update for 5.14:
- A patch series from Lucas Stach and Peng Fan adding i.MX8MM power
domains support into i.MX GPCv2 driver.
- A couple of patches from Adam Ford adding i.MX8MN power domains on top
of i.MX8MM power domain support.
* tag 'imx-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: gpcv2: add support for i.MX8MN power domains
dt-bindings: add defines for i.MX8MN power domains
soc: imx: gpcv2: move reset assert after requesting domain power up
soc: imx: gpcv2: Add support for missing i.MX8MM VPU/DISPMIX power domains
soc: imx: gpcv2: add support for i.MX8MM power domains
dt-bindings: power: add defines for i.MX8MM power domains
soc: imx: gpcv2: add support for optional resets
soc: imx: gpcv2: allow domains without power-sequence control
soc: imx: gpcv2: add runtime PM support for power-domains
soc: imx: gpcv2: wait for ADB400 handshake
soc: imx: gpcv2: split power up and power down sequence control
soc: imx: gpcv2: switch to clk_bulk_* API
soc: imx: gpcv2: move domain mapping to domain driver probe
soc: imx: gpcv2: move to more ideomatic error handling in probe
Link: https://lore.kernel.org/r/20210613082544.16067-1-shawnguo@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
Bigger work around ARM Primecell PL35x SMC memory controller driver by
Miquel Raynal built on previous series from Naga Sureshkumar Relli.
This includes bindings cleanup and correction, converting these to
dtschema and several cleanyps in pl353-smc driver.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmDDbN8QHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD1y6sD/0asCOer/fNfM4qDyr4TtDsBFO8ckKoH7h+
/VEDZGyIw5pc3RYyxp62i4qGzjAh2Q65SaGZ+AwCt1Hhcb3e5PutmYgqvNd6hnJR
eWtUi8/kyzmvQhH+QG1umiOFAngv8hs1dmEfNHb51IYJMXp2f7l4byoCmZilqMaj
em94DsLAE+AZaz00zucJpX8HG4UsqOvL+eZWn81AQKlMLM0OyiALCZwxNoXgYaaJ
6UZh7t3YMkQeK7V3Z+B98QP4hfAfCDhaO1K8femu1zfVq517ceab9oICXcKQ/TvO
ntrKSBLXywWVwlBZIXqLM4k5XhZyVBUXEEUl+F8FQkEkxiewYA2WRFN7oOyvE3uZ
l7NejRPGxUaQZ46Irtl6yhpqhgZAQ/dA+gk5RdaT6LdT8MF1GDkwS6Rh7rDOx6jg
GBZ1l1A3b4/BX90LVTRIUnOnUkHLNRS4Fz4GQfpl0sBdSO+9ELyruJezhcZCza9M
sIlyqNoKFDTvhby5xwDLJf78Dn6Ocft58BKMPl2IAaBvGem6pRdWmc8P6qSE7edv
CixfGmSloPhZtFtN9gI6ME1SxKPCu/z8Yji5nRtNFbbXkVId8PDawO9mawf/GYeU
KehtekzlDsr21by4bgXSqq6TLiXVgEzHy4aQp2t8fWJct/K9seFLLiPE8Ajrl6ce
h9Zj3T3Frw==
=iNR6
-----END PGP SIGNATURE-----
Merge tag 'memory-controller-drv-pl353-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers
Memory controller drivers for v5.14 - PL353
Bigger work around ARM Primecell PL35x SMC memory controller driver by
Miquel Raynal built on previous series from Naga Sureshkumar Relli.
This includes bindings cleanup and correction, converting these to
dtschema and several cleanyps in pl353-smc driver.
* tag 'memory-controller-drv-pl353-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
dt-binding: memory: pl353-smc: Convert to yaml
MAINTAINERS: Add PL353 SMC entry
memory: pl353-smc: Declare variables following a reverse christmas tree order
memory: pl353-smc: Avoid useless acronyms in descriptions
memory: pl353-smc: Let lower level controller drivers handle inits
memory: pl353-smc: Rename goto labels
memory: pl353-smc: Fix style
dt-binding: memory: pl353-smc: Fix the NAND controller node in the example
dt-binding: memory: pl353-smc: Drop unsupported nodes from the example
dt-binding: memory: pl353-smc: Fix the example syntax and style
dt-binding: memory: pl353-smc: Describe the child reg property
dt-binding: memory: pl353-smc: Drop the partitioning section
dt-binding: memory: pl353-smc: Document the range property
dt-binding: memory: pl353-smc: Rephrase the binding
Link: https://lore.kernel.org/r/20210611140659.61980-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Several small fixes and cleanups for stm32, atmel, pl353, renesas-rpc,
TI emif and fsl_ifc.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmDDbCEQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD1w8SD/9NL4uKzXbKMjwfjzBK89Pxe8DA2hJXUOQ7
vEe2Qj+xbUZSsukmA0+02x6OIUfMUxqWbb0tBVPa3OTqDGQF5ghqHN2U2+wzbMDU
BRvouEoRwlevzRFrz4pu0DRojDqWLzpros4HJ6qn/5/7sGtMdYMvzpjCSzQV1OUU
8TSDAa4NcRlBqt/PXB9wHjObSFiI/XhXPG++DNP1Pht5H4KMBVAi6rmQzxj3Hdgr
5uZ6GzkxRoVNeUPyQc1wohmBzLjHtJgIYeRUs8eLF7WL9jiyEu8S4LGB5HqbYkhh
0px9r2HTP1nEQkLWXGXIjVYHUn9sEao9CbqO9YgFFQ8nv9ov6/v309iSjUMPP2Qp
5NUP+Cveb7Z+5yXPKY9dqFpQ9DM2iNHyqrdusi169euIixT3lVWBKgU5e+LgvyGv
r7EjjJc6XvU3ITiHylneOGICUzrtpr7gq/bt2mous6JuLhobekW8PeDgenfs9YRa
G993ZcdnXgcrsw0tYMB5Y46XsL2+Rf46oPsRKQ2S8GqElznbUUYxfcRvb+iZBBaQ
58X1oT/uqy2DgabUFhY453p3XqFrxXHLJPMb1W/7nqgVLAvYvajSxuWKr2XHybmg
XR36V3paVXSZZ3uOgnT3I5R4Pyz4PAAtxZln3Lb/Gh0XfFTbhljV+ZaBYBMEu9Hf
2Ub78fuR7Q==
=yg0A
-----END PGP SIGNATURE-----
Merge tag 'memory-controller-drv-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers
Memory controller drivers for v5.14
Several small fixes and cleanups for stm32, atmel, pl353, renesas-rpc,
TI emif and fsl_ifc.
* tag 'memory-controller-drv-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
memory: emif: remove unused frequency and voltage notifiers
memory: fsl_ifc: fix leak of private memory on probe failure
memory: fsl_ifc: fix leak of IO mapping on probe failure
MAINTAINERS: memory: cover also header file
memory: renesas-rpc-if: correct whitespace
memory: pl353: Fix error return code in pl353_smc_probe()
memory: atmel-ebi: add missing of_node_put for loop iteration
memory: stm32-fmc2-ebi: add missing of_node_put for loop iteration
Link: https://lore.kernel.org/r/20210611140659.61980-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Olof Johansson <olof@lixom.net>
- add missing MODULE_DEVICE_TABLE to fix modalias
mkt-pm-domains:
- register smi node as regmap and not as syscon
- prepare-enable and unprepare-disable dependent clocks
pwrap:
- add support for MT8195
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmDDQO0XHG1hdHRoaWFz
LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH6zqg//XIB9++ubi4du81+DeGuenl4R
OeD3YsDlrGAGtKzqOgdsmmRXJSj+6wiQAVb9RaGyOr1T62Te5xK8l6OfFAmpUr8J
9bnLiuSMdl9MQm29Q/yTWTYuYXblM3dIXHvYLWF7pNy2eM8rJn9My/qCd5OxrjA2
xKD7SvvnFNi8LAB83J8s2kqF02TdbNN1qzxQUlfYXwpT6yfbssNM6PenXHcv0BcI
P+wX6TXhcFITCugs0E/tGHJ4ArlMOgJLcdOGOVtD4zfFwCBgV0skVTnrv0jZOAQP
92XWCKL60yqH4B/pIB9iSe+FYH319gCV7dPSuSyO2Gl5Bby/GuGtmuFroYyD77VB
zpVcybUH6WEKnL4TYwPFkJHVYXFmjQacR4sc0BLywH/y/93atpCKb7lmkgxxbrRp
OkNIqRLRqdgz31cHxd3sbvWgI7trQLDzXjU1RZQk+dzvAjH1GG2c+e1Xz7Fm26Fy
Rmhh2up4YQnkgnewwcnBYgWCIOdQS99IHRLpHqj5qK1Pivorb3O2ZmCXdKef61yD
EZiWugyzSU3Fqhpc9yDngqe7iX3be0xIrEWomqmJhO/p5GtyttzoVI9WnfgjnlPW
do/eZICM8kRHBnp1wVF8nAj5QJGX08Yi40EVDLlG5TgnpC9Yp1oFEAsWE7l3xzVf
SYtnmqKCdEGH78AIhLs=
=ydya
-----END PGP SIGNATURE-----
Merge tag 'v5.13-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers
devapc:
- add missing MODULE_DEVICE_TABLE to fix modalias
mkt-pm-domains:
- register smi node as regmap and not as syscon
- prepare-enable and unprepare-disable dependent clocks
pwrap:
- add support for MT8195
* tag 'v5.13-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
soc: mediatek: pwrap: add pwrap driver for MT8195 SoC
dt-bindings: mediatek: add compatible for MT8195 pwrap
soc: mtk-pm-domains: Fix the clock prepared issue
soc: mtk-pm-domains: do not register smi node as syscon
soc: mediatek: add missing MODULE_DEVICE_TABLE
Link: https://lore.kernel.org/r/479ec9ad-95d3-ce91-8243-63596c4c6676@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
- Initial support for the new RZ/G2L SoC variants.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYMMn3gAKCRCKwlD9ZEnx
cBUTAP9rhZwEVXsYWcaJrPOFntSFpQMnVmG5u38DtUaY3oW+dgD/YY3pxO9QR7Ce
ovQblKGAMR0RDf0sOa4z5FPCSNCLcwU=
=sQ07
-----END PGP SIGNATURE-----
Merge tag 'renesas-drivers-for-v5.14-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers
Renesas driver updates for v5.14
- Initial support for the new RZ/G2L SoC variants.
* tag 'renesas-drivers-for-v5.14-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's
soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's
Link: https://lore.kernel.org/r/cover.1623403800.git.geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
- Support for SCMI clocks from the SCMI power domains
- Addition of checks for correct compatibles for shmem devicetree nodes
that were found missing in the process of YAML schema conversion
- Kconfig and associated build fix found when optee transport are being
worked on
- Couple of fixes and cleanups found as with work-in-progress virtio
transport support
The new transports(optee and virtio) themselves are still being worked on
with ongoing reviews, they are not part of this yet
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEunHlEgbzHrJD3ZPhAEG6vDF+4pgFAmDDFrUACgkQAEG6vDF+
4pj3fQ//U6nmdP6paXL4B6jg3OlJcvd15E1vJjxSHdQ6pTE+pWN0JYGDgLOU5/hp
RTWGLHX1L2IV53Jl7UUM0fSLhqNQG94seVUYFH/fY1YKYDHbFEv/L6t2ivlyEYdf
Op7W1ti/EQf9SydCprOeY37C725I0CloNMqYh7DHTzQ/eioQq505HYSGaVhH+4ec
bkZgUPundLnoT4mWrMEXpwT9L+NjcDcyeW1O8ldWXeLgV+maS7a4ScWkz7802PYW
UGiYQWLSyaZjwL2r4hAVxBUSRH/8suKWXk0K42d1546QduuzC5rUqs2Di/MCxW8z
2q6LR8OkxSy1waT/MxCY7d9tspiFgJb87153SB+ChXKpVs/RutJyfHaXNueB8amt
6rqwq2l2/k4yTnOG3U36NuBWfDsiCzJ2L3WzPGSikUz2vM6QCtUgCgKiEphKwytO
AYtE4m7PikVOZaK1b/8RGBOIWjAB239ZexbnZtxXChLSTisa/K7aQevG99/s0hzk
ucP85gSzYfazIQEbBeRLieksiCnvL609wW0c7ngIWye++fsmcz7ptNIjxrosgjXG
pq+FMiSUrBn8QJ1nuwiUJt6U0pkgg1N51TyZ+6uHHSy8n5sB8PN6y2l99UHI6YPD
EbehYioujCepG82CNK3DbSP2yeMt6unlZXWtazZC8vm0uKeeuuA=
=0YWr
-----END PGP SIGNATURE-----
Merge tag 'scmi-updates-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/drivers
ARM SCMI updates for v5.14
- Support for SCMI clocks from the SCMI power domains
- Addition of checks for correct compatibles for shmem devicetree nodes
that were found missing in the process of YAML schema conversion
- Kconfig and associated build fix found when optee transport are being
worked on
- Couple of fixes and cleanups found as with work-in-progress virtio
transport support
The new transports(optee and virtio) themselves are still being worked on
with ongoing reviews, they are not part of this yet
* tag 'scmi-updates-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
firmware: arm_scmi: Avoid multiple initialisations of hdr->protocol_id
firmware: arm_scmi: Move reinit_completion from scmi_xfer_get to do_xfer
firmware: arm_scmi: Add delayed response status check
firmware: arm_scmi: Add compatibility checks for shmem node
firmware: arm_scpi: Add compatibility checks for shmem node
firmware: arm_scmi: Fix the build when CONFIG_MAILBOX is not selected
firmware: arm_scmi: Reset Rx buffer to max size during async commands
firmware: arm_scmi: Add SMCCC discovery dependency in Kconfig
firmware: arm_scmi: Add clock management to the SCMI power domain
Link: https://lore.kernel.org/r/20210611075722.2813550-1-sudeep.holla@arm.com
Signed-off-by: Olof Johansson <olof@lixom.net>
This tag adds support for the Microchip Sparx5 Switch Reset controller
and contains some small fixes and cleanups in core and various drivers.
-----BEGIN PGP SIGNATURE-----
iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCYJvZbRcccC56YWJlbEBw
ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwLVVAP0Wr2d8eQ7BPHIau4ewshPnjqLC
6hNy34HKbne5w6Ex9QEAnTmokTIibu++m8hs2BYMaouNcjck3CR8EuXKbyY8DQk=
=5CsH
-----END PGP SIGNATURE-----
Merge tag 'reset-for-v5.14' of git://git.pengutronix.de/pza/linux into arm/drivers
Reset controller updates for v5.14
This tag adds support for the Microchip Sparx5 Switch Reset controller
and contains some small fixes and cleanups in core and various drivers.
* tag 'reset-for-v5.14' of git://git.pengutronix.de/pza/linux:
reset: brcmstb: Add missing MODULE_DEVICE_TABLE
reset: a10sr: add missing of_match_table reference
reset: RESET_INTEL_GW should depend on X86
reset: RESET_BRCMSTB_RESCAL should depend on ARCH_BRCMSTB
reset: uniphier: enclose UNIPHIER_RESET_ID_END value in parentheses
reset: sti/syscfg: replace comma with semicolon
reset: ti-syscon: fix to_ti_syscon_reset_data macro
reset: berlin: replace unsigned with unsigned int
reset: whitespace fixes
reset: mchp: sparx5: add switch reset driver
dt-bindings: reset: microchip sparx5 reset driver bindings
reset: oxnas: replace file name with short description
reset: zynqmp: replace spaces with tabs
reset: bcm6345: Make reset_control_ops const
Link: https://lore.kernel.org/r/418cf3a460cfe1d0f91f87e10baaf478bd41f1d5.camel@pengutronix.de
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds support for the power domains founds on i.MX8MN. The Nano
has fewer domains than the Mini, and the access to some of these domains
is different than that of the Mini, the Mini power domains cannot be
reused.
Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The i.MX8M Nano has a similar power domain controller to that of the
mini, but it isn't fully compatible, so it needs a separate binding
and power domain tables.
Add the bindings and tables.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Tegra186 requires the same SID override programming as Tegra194 in order
to seamlessly transition from the firmware framebuffer to the Linux
framebuffer, so the Tegra implementation needs to be used on Tegra186
devices as well.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210603164632.1000458-7-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
The secure firmware keeps some SID override registers set as passthrough
in order to allow devices such as the display controller to operate with
no knowledge of SMMU translations until an operating system driver takes
over. This is needed in order to seamlessly transition from the firmware
framebuffer to the OS framebuffer.
Upon successfully attaching a device to the SMMU and in the process
creating identity mappings for memory regions that are being accessed,
the Tegra implementation will call into the memory controller driver to
program the override SIDs appropriately.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210603164632.1000458-6-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Parse the reg property in device tree and detect the number of instances
represented by a device tree node. This is subsequently needed in order
to support single-instance SMMUs with the Tegra implementation because
additional programming is needed to properly configure the SID override
registers in the memory controller.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210603164632.1000458-5-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
The ARM SMMU instantiations found on Tegra186 and later need inter-
operation with the memory controller in order to correctly program
stream ID overrides.
Furthermore, on Tegra194 multiple instances of the SMMU can gang up
to achieve higher throughput. In order to do this, they have to be
programmed identically so that the memory controller can interleave
memory accesses between them.
Add the Tegra186 compatible string to make sure the interoperation
with the memory controller can be enabled on that SoC generation.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210603164632.1000458-3-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Pull ARM SMMU driver change from Will Deacon to resolve dependencies
between memory controllers, Tegra ARM SoC and ARM SMMU drivers trees.
Further ARM SMMU changes for Tegra depend on the change in Will's tree
and on Tegra memory controllers drivers work done before by Thierry
Reding. Pulling Will's tree allows to apply the rest of this ARM SMMU
Tegra work via memory controllers drivers tree.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Add a compatible for MDM9607. It uses the "legacy" calling
convention.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013058.54299-1-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This SoC while being from 8916 era, makes use of the
newer-style, floor-level management, instead of the older
floor-corner.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013233.54666-1-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Add Naga from Xilinx and myself responsible of this driver.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-16-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
APER does not mean anything, while it seems legitimate to call this
clock the AXI peripheral clock.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-14-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
There is no point in having all these definitions at the SMC bus level,
these are extremely tight to the NAND controller driver implementation,
are not particularly generic, imply more boilerplate than needed, do
not really follow the device model by receiving no argument and some of
them are actually buggy.
Let's get rid of these right now as there is no current user and keep
this driver at a simple level: only the SMC bare initializations.
The NAND controller driver which I am going to introduce will take care
of redefining properly all these helpers and using them directly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-13-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
A goto label is better named
do_something:
than
out_something_to_do:
Use the former wording and really describe what the jump involves.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-12-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
To be fully valid, the NAND controller node in the example should be
named nand-controller instead of flash, should be at the address @0,0
instead of @e1000000 and should have a couple of:
- #address-cells
- #size-cells
properties.
The label is being renamed nfc0 as well which is more usual than nand_0.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-8-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
These nodes are given as examples and are not described nor used
anywhere else. There is also no hardware of my knowledge compatible with
these yet. If we want to be backward compatible, then we should avoid
partially describing nodes and their content while there are no users.
Plus, the examples are wrong (the addresses should be updated) so
let's drop them before converting this file to yaml (only the NAND node,
which will be fixed in the example and described somewhere else is
kept).
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-7-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Each chil node should have a reg property, no matter the type of
controller (NAND, NOR, SRAM). This should be part of the bindings.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-5-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
This sentence does not belong to this file as this file describes the
bus on which various controllers are wired to.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-4-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
The ranges property is missing in the description while actually used in
the example. This property is actually needed, so mention it.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-3-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Add support for reading the LSI DEVID register which is present in
SYSC block of RZ/G2{L,LC} SoC's.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210609163717.3083-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add ARCH_R9A07G044 as a configuration symbol for the new Renesas
RZ/G2L SoC variants.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210609153230.6967-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
The driver defined several functions related to handling of frequency
and voltage changes:
- freq_post_notify_handling
- freq_pre_notify_handling
- volt_notify_handling
All these are static, not used inside or outside of driver, and marked
as unused with comment: "TODO: voltage notify handling should be hooked
up to regulator framework as soon as the necessary support is available
in mainline kernel. This function is un-used right now.".
These have been added with commit a93de288aad3 ("memory: emif: handle
frequency and voltage change events") in 2012 and are unused since then.
Additionally mentioned regulator and clock hooking did not happen since
then. If it did not happen for nine years, let's assume it will not
happen suddenly now.
Remove all unused functions which also allows removal of "t_ck" static
variable "t_ck" and "addressing" member of private structure.
No functionality is lost.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210527154101.80556-1-krzysztof.kozlowski@canonical.com
On probe error the driver should free the memory allocated for private
structure. Fix this by using resource-managed allocation.
Fixes: a20cbdeffce2 ("powerpc/fsl: Add support for Integrated Flash Controller")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210527154322.81253-2-krzysztof.kozlowski@canonical.com
