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1. Basic support for SCMI v3.2 pincontrol protocol
SCMI v3.2 introduces pincontrol protocol which is intended for
controlling pins and their configuration. The pin control protocol
provides commands to:
- List the pins, groups of pins, available functions, and their
association with each other.
- Set the parameter configuration and multiplexing of the pins or
groups of pins
- Optionally request exclusive access to a pin or group of pins.
- Optionally configure the permissions of an agent to access a pin
or group of pins.
These changes adds basic support for the same in the SCMI core layer
and an implementation of the generic scmi-pinctrl driver with associated
DT bindings.
2. Framework support for multiple vendors custom protocols
With the fixed space for vendor protocols, the possibility of having
multiple vendors implementing distinct SCMI vendor protocols with
the same overlapping protocol number is very high and with the need
to support them all in a single kernel image or a module is also high.
In order to implement the same we assume:
- vendor protocols has to be tagged at build time with a vendor_id
- vendor protocols could also optionally be tagged at build time with
sub_vendor_id and implementation version
At the initialisation all the built vendor protocols are registered
with the SCMI core using a key derived from the above tags
3. Logging and tracing improvements
This includes using dev_err_probe() to bail out from probe, adding
message dump traces for bad and unexpected replies and widening of
the tag buffer in trace_scmi_dump_msg to allow diverse tag names
4. Miscellaneous updates or improvements
This includes adding the accessor function get_max_msg_size() used
in pinctl protocol, updation of dt-bindings examples for protocol@13
to promote new bindings and simplification of scmi_devm_notifier_unregister
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Merge tag 'scmi-updates-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers
Arm SCMI updates for v6.10
1. Basic support for SCMI v3.2 pincontrol protocol
SCMI v3.2 introduces pincontrol protocol which is intended for
controlling pins and their configuration. The pin control protocol
provides commands to:
- List the pins, groups of pins, available functions, and their
association with each other.
- Set the parameter configuration and multiplexing of the pins or
groups of pins
- Optionally request exclusive access to a pin or group of pins.
- Optionally configure the permissions of an agent to access a pin
or group of pins.
These changes adds basic support for the same in the SCMI core layer
and an implementation of the generic scmi-pinctrl driver with associated
DT bindings.
2. Framework support for multiple vendors custom protocols
With the fixed space for vendor protocols, the possibility of having
multiple vendors implementing distinct SCMI vendor protocols with
the same overlapping protocol number is very high and with the need
to support them all in a single kernel image or a module is also high.
In order to implement the same we assume:
- vendor protocols has to be tagged at build time with a vendor_id
- vendor protocols could also optionally be tagged at build time with
sub_vendor_id and implementation version
At the initialisation all the built vendor protocols are registered
with the SCMI core using a key derived from the above tags
3. Logging and tracing improvements
This includes using dev_err_probe() to bail out from probe, adding
message dump traces for bad and unexpected replies and widening of
the tag buffer in trace_scmi_dump_msg to allow diverse tag names
4. Miscellaneous updates or improvements
This includes adding the accessor function get_max_msg_size() used
in pinctl protocol, updation of dt-bindings examples for protocol@13
to promote new bindings and simplification of scmi_devm_notifier_unregister
* tag 'scmi-updates-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
pinctrl: Implementation of the generic scmi-pinctrl driver
firmware: arm_scmi: Add basic support for SCMI v3.2 pincontrol protocol
dt-bindings: firmware: Support SCMI pinctrl protocol
firmware: arm_scmi: Introduce get_max_msg_size() helper/accessor
firmware: arm_scmi: Add support for multiple vendors custom protocols
dt-bindings: firmware: arm,scmi: Update examples for protocol@13
firmware: arm_scmi: Avoid non-constant printk format strings
firmware: arm_scmi: Use dev_err_probe to bail out
firmware: arm_scmi: Simplify scmi_devm_notifier_unregister
firmware: arm_scmi: Add message dump traces for bad and unexpected replies
firmware: arm_scmi: Add helper to trace bad messages
include: trace: Widen the tag buffer in trace_scmi_dump_msg
firmware: arm_scmi: Log the perf domain names in the error paths
Link: https://lore.kernel.org/r/20240426105031.1526987-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This introduces a TEE driver for Trusted Services [1].
Trusted Services is a TrustedFirmware.org project that provides a
framework for developing and deploying device Root of Trust services in
FF-A [2] Secure Partitions. The project hosts the reference
implementation of Arm Platform Security Architecture [3] for Arm
A-profile devices.
The FF-A Secure Partitions are accessible through the FF-A driver in
Linux. However, the FF-A driver doesn't have a user space interface so
user space clients currently cannot access Trusted Services. The goal of
this TEE driver is to bridge this gap and make Trusted Services
functionality accessible from user space.
[1] https://www.trustedfirmware.org/projects/trusted-services/
[2] https://developer.arm.com/documentation/den0077/
[3] https://www.arm.com/architecture/security-features/platform-security
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Merge tag 'tee-ts-for-v6.10' of https://git.linaro.org/people/jens.wiklander/linux-tee into soc/drivers
TEE driver for Trusted Services
This introduces a TEE driver for Trusted Services [1].
Trusted Services is a TrustedFirmware.org project that provides a
framework for developing and deploying device Root of Trust services in
FF-A [2] Secure Partitions. The project hosts the reference
implementation of Arm Platform Security Architecture [3] for Arm
A-profile devices.
The FF-A Secure Partitions are accessible through the FF-A driver in
Linux. However, the FF-A driver doesn't have a user space interface so
user space clients currently cannot access Trusted Services. The goal of
this TEE driver is to bridge this gap and make Trusted Services
functionality accessible from user space.
[1] https://www.trustedfirmware.org/projects/trusted-services/
[2] https://developer.arm.com/documentation/den0077/
[3] https://www.arm.com/architecture/security-features/platform-security
* tag 'tee-ts-for-v6.10' of https://git.linaro.org/people/jens.wiklander/linux-tee:
MAINTAINERS: tee: tstee: Add entry
Documentation: tee: Add TS-TEE driver
tee: tstee: Add Trusted Services TEE driver
tee: optee: Move pool_op helper functions
tee: Refactor TEE subsystem header files
Link: https://lore.kernel.org/r/20240425073119.GA3261080@rayden
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds a much needed cleanup for the MediaTek CMDQ helper driver and
also some more helper functions which will be used in drivers using the
MediaTek Global Command Engine (GCE) HW.
Also adds support for MT8188's VPPSYS mutex for MDP3 support, a new SoC
in the mtk-socinfo driver and changes the marketing name for the pre
existing MT8188 SoC.
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Merge tag 'mtk-soc-for-v6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/drivers
MediaTek driver updates for v6.10
This adds a much needed cleanup for the MediaTek CMDQ helper driver and
also some more helper functions which will be used in drivers using the
MediaTek Global Command Engine (GCE) HW.
Also adds support for MT8188's VPPSYS mutex for MDP3 support, a new SoC
in the mtk-socinfo driver and changes the marketing name for the pre
existing MT8188 SoC.
* tag 'mtk-soc-for-v6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux:
soc: mediatek: mtk-socinfo: Correct the marketing name for MT8188GV
soc: mediatek: mtk-socinfo: Add entry for MT8395AV/ZA Genio 1200
soc: mediatek: mtk-mutex: Add support for MT8188 VPPSYS
soc: mediatek: socinfo: Advertise about unknown MediaTek SoC
soc: mediatek: cmdq: Don't log an error when gce-client-reg is not found
soc: mediatek: mtk-cmdq: Add cmdq_pkt_acquire_event() function
soc: mediatek: mtk-cmdq: Add cmdq_pkt_poll_addr() function
soc: mediatek: mtk-cmdq: Add cmdq_pkt_mem_move() function
soc: mediatek: mtk-cmdq: Add specific purpose register definitions for GCE
soc: mediatek: cmdq: Refine cmdq_pkt_create() and cmdq_pkt_destroy()
soc: mediatek: cmdq: Remove cmdq_pkt_flush_async() helper function
soc: mediatek: cmdq: Add cmdq_pkt_eoc() helper function
soc: mediatek: cmdq: Add cmdq_pkt_jump_rel() helper function
soc: mediatek: cmdq: Rename cmdq_pkt_jump() to cmdq_pkt_jump_abs()
soc: mediatek: cmdq: Add parameter shift_pa to cmdq_pkt_jump()
soc: mediatek: cmdq: Fix typo of CMDQ_JUMP_RELATIVE
Link: https://lore.kernel.org/r/20240429140245.238210-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
A change to update the handling of no-reset-on-init quirk to make it init
time only like it should be. And a change to add the missing copyrights.
Also a series of changes to simplify the driver by dropping the old unused
handling for interconnect targets tagged pm_runtime_irq_safe().
These are all non-urgent changes and can be queued whenever suitable.
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Merge tag 'drivers-ti-sysc-for-v6.10-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/drivers
Driver updates for ti-sysc
A change to update the handling of no-reset-on-init quirk to make it init
time only like it should be. And a change to add the missing copyrights.
Also a series of changes to simplify the driver by dropping the old unused
handling for interconnect targets tagged pm_runtime_irq_safe().
These are all non-urgent changes and can be queued whenever suitable.
* tag 'drivers-ti-sysc-for-v6.10-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
bus: ti-sysc: Drop legacy idle quirk handling
bus: ti-sysc: Drop legacy quirk handling for smartreflex
bus: ti-sysc: Drop legacy quirk handling for uarts
bus: ti-sysc: Add a description and copyrights
bus: ti-sysc: Move check for no-reset-on-init
Link: https://lore.kernel.org/r/pull-1714283210-549557@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Qualcomm SCM driver initialization order is improved, to avoid any
potential for a client to find a half-initialized SCM instance.
The handling of download mode bits is updated to not attempt
QCOM_SCM_BOOT_SET_DLOAD_MODE if a io-address for the update is
specified, and that path is changed to perform a read-modify-write to
avoid updating unrelated bits. Error handling is corrected in the
peripheral authentication service (PAS) functions, to release
interconnect bandwidth votes in the case of an error. An unwanted error
print on allocation error is also removed from this code path.
The QSEECOM allow list is marked __maybe_unused to avoid build warnings
when built with !OF. The error handling related to the interconnect API
is cleaned up to avoid handling the impossible IS_ERR() condition.
initcall level is bumped to "core" for cmd-db and rpmh-rsc, as dependent
drivers like regulators, interconnects and clocks are registered at this
level.
Another attempt is made to remove the strncpy() usage in cmd-db, this
time with strtomem_pad() which has the correct characteristics.
The bwmon regmap cache is changed to maple tree.
After an attempt to add missing MODULE_DEVICE_TABLEs to debug drivers,
the intention of not having them automatically load is documented.
Operations on the pmic_glink client list is put under mutual exclusion,
to avoid races when clients are being registered. pmic_glink client
registered after the firmware notification arrived was not informed that
the firmware was up, this is resolved.
More DSPs and the apss subsystem is added to the Qualcomm sleep stats driver.
Checks for in-flight regulator requests in the RPMh RSC driver is
improved to deal with the fact that these occupy multiple registers, so
it's insufficient to just to direct address comparison.
The socinfo drivers learns about X1 Elite and SMB2360 PMIC.
The maintainers entry is split between the linux-arm-msm list and
subset that is maintained in the qcom-soc tree, to avoid some confusion
about maintainership.
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Merge tag 'qcom-drivers-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers
Qualcomm driver updates for v6.10
The Qualcomm SCM driver initialization order is improved, to avoid any
potential for a client to find a half-initialized SCM instance.
The handling of download mode bits is updated to not attempt
QCOM_SCM_BOOT_SET_DLOAD_MODE if a io-address for the update is
specified, and that path is changed to perform a read-modify-write to
avoid updating unrelated bits. Error handling is corrected in the
peripheral authentication service (PAS) functions, to release
interconnect bandwidth votes in the case of an error. An unwanted error
print on allocation error is also removed from this code path.
The QSEECOM allow list is marked __maybe_unused to avoid build warnings
when built with !OF. The error handling related to the interconnect API
is cleaned up to avoid handling the impossible IS_ERR() condition.
initcall level is bumped to "core" for cmd-db and rpmh-rsc, as dependent
drivers like regulators, interconnects and clocks are registered at this
level.
Another attempt is made to remove the strncpy() usage in cmd-db, this
time with strtomem_pad() which has the correct characteristics.
The bwmon regmap cache is changed to maple tree.
After an attempt to add missing MODULE_DEVICE_TABLEs to debug drivers,
the intention of not having them automatically load is documented.
Operations on the pmic_glink client list is put under mutual exclusion,
to avoid races when clients are being registered. pmic_glink client
registered after the firmware notification arrived was not informed that
the firmware was up, this is resolved.
More DSPs and the apss subsystem is added to the Qualcomm sleep stats driver.
Checks for in-flight regulator requests in the RPMh RSC driver is
improved to deal with the fact that these occupy multiple registers, so
it's insufficient to just to direct address comparison.
The socinfo drivers learns about X1 Elite and SMB2360 PMIC.
The maintainers entry is split between the linux-arm-msm list and
subset that is maintained in the qcom-soc tree, to avoid some confusion
about maintainership.
* tag 'qcom-drivers-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (21 commits)
soc: qcom: cmd-db: replace deprecated strncpy with strtomem
soc: qcom: rpmh-rsc: Enhance check for VRM in-flight request
firmware: qcom: scm: Modify only the download bits in TCSR register
firmware: qcom: scm: Fix __scm and waitq completion variable initialization
firmware: qcom: scm: Rework dload mode availability check
firmware: qcom: scm: Remove redundant scm argument from qcom_scm_waitq_wakeup()
firmware: qcom: scm: Remove log reporting memory allocation failure
soc: qcom: pmic_glink: notify clients about the current state
soc: qcom: pmic_glink: don't traverse clients list without a lock
soc: qcom: mention intentionally broken module autoloading
firmware: qcom: qcm: fix unused qcom_scm_qseecom_allowlist
MAINTAINERS: Split Qualcomm SoC and linux-arm-msm entries
soc: qcom: qcom_stats: Add DSPs and apss subsystem stats
dt-bindings: soc: qcom: qcom,pmic-glink: document QCM6490 compatible
soc: qcom: socinfo: Add SMB2360 PMIC
soc: qcom: socinfo: Add X1E80100 SoC ID table entry
dt-bindings: arm: qcom,ids: Add SoC ID for X1E80100
soc: qcom: Update init level to core_initcall() for cmd-db and rpmh-rsc
soc: qcom: icc-bwmon: Convert to use maple tree register cache
firmware: qcom_scm: remove IS_ERR() checks from qcom_scm_bw_{en,dis}able()
...
Link: https://lore.kernel.org/r/20240427160917.1431354-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This contains a single commit that adds a wake event for Ethernet for
some devices.
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Merge tag 'tegra-for-6.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers
soc/tegra: Changes for v6.10-rc1
This contains a single commit that adds a wake event for Ethernet for
some devices.
* tag 'tegra-for-6.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Add EQOS wake event for Tegra194 and Tegra234
Link: https://lore.kernel.org/r/20240426180519.3972626-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Highlights:
---------
Introduce STM32 Firewall framework for STM32MP1x and STM32MP2x
platforms. STM32MP1x(ETZPC) and STM32MP2x(RIFSC) Firewall controllers
register to the framework to offer firewall services such as access
granting.
This series of patches is a new approach on the previous STM32 system
bus, history is available here:
https://lore.kernel.org/lkml/20230127164040.1047583/
The need for such framework arises from the fact that there are now
multiple hardware firewalls implemented across multiple products.
Drivers are shared between different products, using the same code.
When it comes to firewalls, the purpose mostly stays the same: Protect
hardware resources. But the implementation differs, and there are
multiple types of firewalls: peripheral, memory, ...
Some hardware firewall controllers such as the RIFSC implemented on
STM32MP2x platforms may require to take ownership of a resource before
being able to use it, hence the requirement for firewall services to
take/release the ownership of such resources.
On the other hand, hardware firewall configurations are becoming
more and more complex. These mecanisms prevent platform crashes
or other firewall-related incoveniences by denying access to some
resources.
The stm32 firewall framework offers an API that is defined in
firewall controllers drivers to best fit the specificity of each
firewall.
For every peripherals protected by either the ETZPC or the RIFSC, the
firewall framework checks the firewall controlelr registers to see if
the peripheral's access is granted to the Linux kernel. If not, the
peripheral is configured as secure, the node is marked populated,
so that the driver is not probed for that device.
The firewall framework relies on the access-controller device tree
binding. It is used by peripherals to reference a domain access
controller. In this case a firewall controller. The bus uses the ID
referenced by the access-controller property to know where to look
in the firewall to get the security configuration for the peripheral.
This allows a device tree description rather than a hardcoded peripheral
table in the bus driver.
The STM32 ETZPC device is responsible for filtering accesses based on
security level, or co-processor isolation for any resource connected
to it.
The RIFSC is responsible for filtering accesses based on Compartment
ID / security level / privilege level for any resource connected to
it.
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Merge tag 'stm32-bus-firewall-for-v6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/drivers
STM32 Firewall bus for v6.10, round 1
Highlights:
---------
Introduce STM32 Firewall framework for STM32MP1x and STM32MP2x
platforms. STM32MP1x(ETZPC) and STM32MP2x(RIFSC) Firewall controllers
register to the framework to offer firewall services such as access
granting.
This series of patches is a new approach on the previous STM32 system
bus, history is available here:
https://lore.kernel.org/lkml/20230127164040.1047583/
The need for such framework arises from the fact that there are now
multiple hardware firewalls implemented across multiple products.
Drivers are shared between different products, using the same code.
When it comes to firewalls, the purpose mostly stays the same: Protect
hardware resources. But the implementation differs, and there are
multiple types of firewalls: peripheral, memory, ...
Some hardware firewall controllers such as the RIFSC implemented on
STM32MP2x platforms may require to take ownership of a resource before
being able to use it, hence the requirement for firewall services to
take/release the ownership of such resources.
On the other hand, hardware firewall configurations are becoming
more and more complex. These mecanisms prevent platform crashes
or other firewall-related incoveniences by denying access to some
resources.
The stm32 firewall framework offers an API that is defined in
firewall controllers drivers to best fit the specificity of each
firewall.
For every peripherals protected by either the ETZPC or the RIFSC, the
firewall framework checks the firewall controlelr registers to see if
the peripheral's access is granted to the Linux kernel. If not, the
peripheral is configured as secure, the node is marked populated,
so that the driver is not probed for that device.
The firewall framework relies on the access-controller device tree
binding. It is used by peripherals to reference a domain access
controller. In this case a firewall controller. The bus uses the ID
referenced by the access-controller property to know where to look
in the firewall to get the security configuration for the peripheral.
This allows a device tree description rather than a hardcoded peripheral
table in the bus driver.
The STM32 ETZPC device is responsible for filtering accesses based on
security level, or co-processor isolation for any resource connected
to it.
The RIFSC is responsible for filtering accesses based on Compartment
ID / security level / privilege level for any resource connected to
it.
* tag 'stm32-bus-firewall-for-v6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
bus: stm32_firewall: fix off by one in stm32_firewall_get_firewall()
bus: etzpc: introduce ETZPC firewall controller driver
bus: rifsc: introduce RIFSC firewall controller driver
of: property: fw_devlink: Add support for "access-controller"
firewall: introduce stm32_firewall framework
dt-bindings: bus: document ETZPC
dt-bindings: bus: document RIFSC
dt-bindings: treewide: add access-controllers description
dt-bindings: document generic access controllers
Link: https://lore.kernel.org/r/7dc64226-5429-4ab7-a8c8-6053b12e3cf5@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add the check for obtaining complete port attribute in the HCCS driver
- Replace MAILBOX dependency with PCC for the HCCS driver
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Merge tag 'hisi-drivers-for-6.10' of https://github.com/hisilicon/linux-hisi into soc/drivers
HiSilicon driver updates for v6.10
- Add the check for obtaining complete port attribute in the HCCS driver
- Replace MAILBOX dependency with PCC for the HCCS driver
* tag 'hisi-drivers-for-6.10' of https://github.com/hisilicon/linux-hisi:
soc: hisilicon: kunpeng_hccs: replace MAILBOX dependency with PCC
soc: hisilicon: kunpeng_hccs: Add the check for obtaining complete port attribute
Link: https://lore.kernel.org/r/662A3EDE.5070708@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Identify the new RZ/V2H (R9A09G057) SoC,
- Enable support for the TMU (Timer Unit) on R-Car Gen2 SoCs.
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Merge tag 'renesas-drivers-for-v6.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/drivers
Renesas driver updates for v6.10
- Identify the new RZ/V2H (R9A09G057) SoC,
- Enable support for the TMU (Timer Unit) on R-Car Gen2 SoCs.
* tag 'renesas-drivers-for-v6.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
soc: renesas: Enable TMU support on R-Car Gen2
soc: renesas: Add identification support for RZ/V2H SoC
Link: https://lore.kernel.org/r/cover.1712915532.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add the wake event for the EQOS ethernet controller on Tegra194 and
Tegra234 devices, so that system can be woken up by an event from this
ethernet controller.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The "nb_firewall" variable is the number of elements in the firewall[]
array, which is allocated in stm32_firewall_populate_bus(). So change
this > comparison to >= to prevent an out of bound access.
Fixes: 5c9668cfc6d7 ("firewall: introduce stm32_firewall framework")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
ETZPC is a peripheral and memory firewall controller that filter accesses
based on Arm TrustZone secure state and Arm CPU privilege execution level.
It handles MCU isolation as well.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
There are no more users that need the legacy idle quirk so let's drop
the legacy idle quirk handling. This simplifies the PM code to just
sysc_pm_ops with unified handling for all the interconnect targets.
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
With the smartreflex driver no longer relying on the use of
pm_runtime_irq_safe(), we can finally drop the related legacy quirk
handling.
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
With the 8250_omap and omap-serial drivers no longer relying on the use
of pm_runtime_irq_safe(), we can finally drop the related legacy quirk
handling for uarts.
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We are wrongly checking SYSC_QUIRK_NO_RESET_ON_INIT flag in sysc_reset(),
it can be called also after init from sysc_reinit_module(). Let's move
the check to the init code in preparation for adding reset control support
in the future.
Note that this change is not needed as a fix as there are no known issues
caused by it currently.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The kunpeng_hccs driver depends on the Platform Communication Channel
Driver. If the PCC driver is not enabled, this driver will be failed
to probe. And since the PCC driver depends on the MAILBOX, replace
the MAILBOX dependency with the PCC.
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The hccs_get_all_port_attr() is used to obtain the attribute of all the
ports on a specified DIE from the firmware. However this interface doesn't
ensure whether the firmware reports the complete attribute of all the ports
or not. So this patch adds the check for this.
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
RIFSC is a peripheral firewall controller that filter accesses based on
Arm TrustZone secure state, Arm CPU privilege execution level and
Compartment IDentification of the STM32 SoC subsystems.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add an entry for the MT8395 SoC with commercial name Genio 1200.
Reviewed-by: Christopher Obbard <chris.obbard@collabora.com>
Tested-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
Link: https://lore.kernel.org/r/20240404082056.93454-1-angelogioacchino.delregno@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
In case we're running on a MediaTek SoC that is not declared in the
socinfo_data_table, print a message stating that and, with it, also
print out the read eFuse data: this allows to easily add a new SoC
in the table, granted that its actual soc/segment/marketing names
are already previously known.
This is especially useful when booting an already known SoC that
already has socinfo support, but has a different silicon version
and/or revision, hence different model information in the eFuses.
Link: https://lore.kernel.org/r/20240314113015.121940-1-angelogioacchino.delregno@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Most of the callers to this function do not require CMDQ support, it is
optional, so the missing property shouldn't cause an error message.
However, it could result on degraded performance, so the fact that it's
missing should still be alerted. Furthermore, the callers that do
require CMDQ support already log at the error level when an error is
returned.
Change the log message in this helper to be printed at the warning level
instead.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240229-gce-client-reg-log-dbg-v2-1-4975077173d0@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Add cmdq_pkt_acquire_event() function to support CMDQ user making
an instruction for acquiring event.
CMDQ users can use cmdq_pkt_acquire_event() as `mutex_lock`
and cmdq_pkt_clear_event() as `mutex_unlock` to protect the global
resource modified instructions between them.
cmdq_pkt_acquire_event() would wait for event to be cleared.
After event is cleared by cmdq_pkt_clear_event() in other GCE threads,
cmdq_pkt_acquire_event() would set event and keep executing next
instruction. So the mutex would work like this:
cmdq_pkt_acquire_event() /* mutex lock */
/* critical secton instructions that modified global resource */
cmdq_pkt_clear_event() /* mutex unlock */
Prevent the critical section instructions from being affected by other
GCE threads.
Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240307013458.23550-5-jason-jh.lin@mediatek.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Add cmdq_pkt_poll_addr function to support CMDQ user making
an instruction for polling a specific address of hardware rigster
to check the value with or without mask.
POLL is a legacy operation in GCE, so it does not support SPR and
CMDQ_CODE_LOGIC. To support polling the register address which doesn't
have the subsys id, CMDQ users need to make an instruction with GPR and
CMDQ_CODE_MASK operation to move the register address to be poll into GPR.
Then users can make an POLL instruction with GPR to poll the register
address assigned in previous instruction.
Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240307013458.23550-4-jason-jh.lin@mediatek.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Add cmdq_pkt_mem_move() function to support CMDQ user making
an instruction for moving a value from a source address to a
destination address.
Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240307013458.23550-3-jason-jh.lin@mediatek.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Add specific purpose register definitions for GCE, so CMDQ users can
use them as a buffer to store data.
Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240307013458.23550-2-jason-jh.lin@mediatek.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
cmdq_pkt_create() and cmdq_pkt_destroy() is not suitable for
client drivers so each client driver has implement its own
function. This refinement would pass struct cmdq_pkt pointer into
cmdq_pkt_create(). In addition, client driver has the struct
cmdq_client information, so it's not necessary to store this
information in struct cmdq_pkt. After this refinement, client
drivers could use these helper funciton instead of implementing
its own version.
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20240222154120.16959-8-chunkuang.hu@kernel.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
cmdq_pkt_flush_async() is not used by all client drivers (MediaTek
drm driver and MediaTek mdp3 driver), so remove it.
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20240222154120.16959-7-chunkuang.hu@kernel.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
cmdq_pkt_eoc() append eoc command to CMDQ packet. eoc command
would ask GCE to generate IRQ. It's usually appended to the end
of packet to notify all command in the packet is done.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20240222154120.16959-6-chunkuang.hu@kernel.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
cmdq_pkt_jump_rel() append relative jump command to the packet.
Relative jump change PC to the target address with offset from
current PC.
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240222154120.16959-5-chunkuang.hu@kernel.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
In order to distinguish absolute jump and relative jump,
cmdq_pkt_jump() append absolute jump command, so rename it to
cmdq_pkt_jump_abs().
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240222154120.16959-4-chunkuang.hu@kernel.org
[Angelo: Added temporary wrapper to avoid build breakage]
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
In original design, cmdq_pkt_jump() call cmdq_get_shift_pa() every
time to get shift_pa. But the shift_pa is constant value for each
SoC, so client driver just need to call cmdq_get_shift_pa() once
and pass shift_pa to cmdq_pkt_jump() to prevent frequent function
call.
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20240222154120.16959-3-chunkuang.hu@kernel.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
For cmdq jump command, offset 0 means relative jump and offset 1
means absolute jump. cmdq_pkt_jump() is absolute jump, so fix the
typo of CMDQ_JUMP_RELATIVE in cmdq_pkt_jump().
Fixes: 946f1792d3d7 ("soc: mediatek: cmdq: add jump function")
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240222154120.16959-2-chunkuang.hu@kernel.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Each RPMh VRM accelerator resource has 3 or 4 contiguous 4-byte aligned
addresses associated with it. These control voltage, enable state, mode,
and in legacy targets, voltage headroom. The current in-flight request
checking logic looks for exact address matches. Requests for different
addresses of the same RPMh resource as thus not detected as in-flight.
Add new cmd-db API cmd_db_match_resource_addr() to enhance the in-flight
request check for VRM requests by ignoring the address offset.
This ensures that only one request is allowed to be in-flight for a given
VRM resource. This is needed to avoid scenarios where request commands are
carried out by RPMh hardware out-of-order leading to LDO regulator
over-current protection triggering.
Fixes: 658628e7ef78 ("drivers: qcom: rpmh-rsc: add RPMH controller for QCOM SoCs")
Cc: stable@vger.kernel.org
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Elliot Berman <quic_eberman@quicinc.com> # sm8650-qrd
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
Link: https://lore.kernel.org/r/20240215-rpmh-rsc-fixes-v4-1-9cbddfcba05b@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Crashdump collection is done based on DLOAD bits of TCSR register.
To retain other bits, scm driver need to read the register and
modify only the DLOAD bits, as other bits in TCSR may have their
own significance.
Co-developed-by: Poovendhan Selvaraj <quic_poovendh@quicinc.com>
Signed-off-by: Poovendhan Selvaraj <quic_poovendh@quicinc.com>
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Tested-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> # IPQ9574 and IPQ5332
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Elliot Berman <quic_eberman@quicinc.com>
Link: https://lore.kernel.org/r/1711042655-31948-1-git-send-email-quic_mojha@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
It is possible qcom_scm_is_available() gives wrong indication that
if __scm is initialized while __scm->dev is not and similar issue
is also possible with __scm->waitq_comp.
Fix this appropriately by the use of release barrier and read barrier
that will make sure if __scm is initialized so, is all of its field
variable.
Fixes: d0f6fa7ba2d6 ("firmware: qcom: scm: Convert SCM to platform driver")
Fixes: 6bf325992236 ("firmware: qcom: scm: Add wait-queue handling logic")
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Link: https://lore.kernel.org/r/1711034642-22860-4-git-send-email-quic_mojha@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
QCOM_SCM_BOOT_SET_DLOAD_MODE scm command is applicable for very
older SoCs where this command is supported from firmware and
for newer SoCs, dload mode tcsr registers is used for setting
the download mode.
Currently, qcom_scm_set_download_mode() checks for availability
of QCOM_SCM_BOOT_SET_DLOAD_MODE command even for SoCs where this
is not used. Fix this by switching the condition to keep the
command availability check only if dload mode registers are not
available.
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Reviewed-by: Elliot Berman <quic_eberman@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/1711034642-22860-3-git-send-email-quic_mojha@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
In case the client is registered after the pmic-glink recived a response
from the Protection Domain mapper, it is going to miss the notification
about the state. Notify clients about the current state upon
registration.
Fixes: 58ef4ece1e41 ("soc: qcom: pmic_glink: Introduce base PMIC GLINK driver")
Reviewed-by: Andrew Halaney <ahalaney@redhat.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Mukesh Ojha <quic_mojha@quicinc.com>
Tested-by: Xilin Wu <wuxilin123@gmail.com> # on QCS8550 AYN Odin 2
Link: https://lore.kernel.org/r/20240403-pmic-glink-fix-clients-v2-2-aed4e02baacc@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Take the client_lock before traversing the clients list at the
pmic_glink_state_notify_clients() function. This is required to keep the
list traversal safe from concurrent modification.
Fixes: 58ef4ece1e41 ("soc: qcom: pmic_glink: Introduce base PMIC GLINK driver")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Andrew Halaney <ahalaney@redhat.com>
Reviewed-by: Mukesh Ojha <quic_mojha@quicinc.com>
Tested-by: Xilin Wu <wuxilin123@gmail.com> # on QCS8550 AYN Odin 2
Link: https://lore.kernel.org/r/20240403-pmic-glink-fix-clients-v2-1-aed4e02baacc@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Qualcomm PMIC ChargerPD ULOG and RPM Master Statistics drivers are
solely for debugging purposes and should not be autoloaded as modules.
Add comments to annotate missing MODULE_DEVICE_TABLE.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20240410184522.271889-1-krzk@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
