75000 Commits

Author SHA1 Message Date
Joseph Lo
29a0e7beab ARM: tegra: retain L2 content over CPU suspend/resume
The L2 RAM is in different power domain from the CPU cluster. So the
L2 content can be retained over CPU suspend/resume. To do that, we
need to disable L2 after the MMU is disabled, and enable L2 before
the MMU is enabled. But the L2 controller is in the same power domain
with the CPU cluster. We need to restore it's settings and re-enable
it after the power be resumed.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:09:22 -07:00
Joseph Lo
d552920a02 ARM: tegra30: cpuidle: add powered-down state for CPU0
This is a power gating idle mode. It support power gating vdd_cpu rail
after all cpu cores in "powered-down" status. For Tegra30, the CPU0 can
enter this state only when all secondary CPU is offline. We need to take
care and make sure whole secondary CPUs were offline and checking the
CPU power gate status. After that, the CPU0 can go into "powered-down"
state safely. Then shut off the CPU rail.

Be aware of that, you may see the legacy power state "LP2" in the code
which is exactly the same meaning of "CPU power down".

Base on the work by:
Scott Williams <scwilliams@nvidia.com>

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:09:22 -07:00
Joseph Lo
01459c69dd ARM: tegra30: flowctrl: add cpu_suspend_exter/exit function
The flow controller can help CPU to go into suspend mode (powered-down
state). When CPU go into powered-down state, it needs some careful
settings before getting into and after leaving. The enter and exit
functions do that by configuring appropriate mode for flow controller.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:09:21 -07:00
Joseph Lo
a6e293eef2 ARM: tegra30: clocks: add CPU low-power function into tegra_cpu_car_ops
Add suspend, resume and rail_off_ready API into tegra_cpu_car_ops. These
functions were used for CPU powered-down state maintenance. One thing
needs to notice the rail_off_ready API only availalbe for cpu_g cluster
not cpu_lp cluster.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:09:21 -07:00
Joseph Lo
fe508d7769 ARM: tegra30: common: enable csite clock
Enable csite (debug and trace controller) clock at init to prevent it
be disabled. And this also the necessary clock for CPU be brought up or
resumed from a power-gating low power state.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:09:21 -07:00
Joseph Lo
d457ef358f ARM: tegra30: cpuidle: add powered-down state for secondary CPUs
This supports power-gated idle on secondary CPUs for Tegra30. The
secondary CPUs can go into powered-down state independently. When
CPU goes into this state, it saves it's contexts and puts itself
to flow controlled WFI state. After that, it will been power gated.

Be aware of that, you may see the legacy power state "LP2" in the
code which is exactly the same meaning of "CPU power down".

Based on the work by:
Scott Williams <scwilliams@nvidia.com>

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:09:21 -07:00
Joseph Lo
d3f293656c ARM: tegra: cpuidle: add CPU resume function
The CPU suspending on Tegra means CPU power gating. We add a resume
function for taking care the CPUs that resume from power gating status.
This function was been hooked to the reset handler. We take care
everything here before go into kernel.

Be aware of that, you may see the legacy power status "LP2" in the code
which is exactly the same meaning of "CPU power down".

Based on the work by:
Scott Williams <scwilliams@nvidia.com>
Colin Cross <ccross@android.com>
Gary King <gking@nvidia.com>

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:09:21 -07:00
Joseph Lo
0b25e25bef ARM: tegra: cpuidle: separate cpuidle driver for different chips
The different Tegra chips may have different CPU idle states and data.
Individual CPU idle driver make it more easy to maintain.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:09:20 -07:00
Joseph Lo
641b4ef8f1 ARM: tegra: rename the file of "sleep-tXX" to "sleep-tegraXX"
For the naming consistency under the mach-tegra, we re-name the file of
"sleep-tXX" to "sleep-tegraXX" (e.g., sleep-t30 to sleep-tegra30).

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:09:01 -07:00
Joseph Lo
d5db9a4422 ARM: tegra: cpuidle: replace LP3 with ARM_CPUIDLE_WFI_STATE
The Tegra CPU idle LP3 state is doing ARM WFI only. So it's same with
the common ARM_CPUIDLE_WFI_STATE. Using it to replace LP3 now.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:08:28 -07:00
Thierry Reding
d1d3b978f6 ARM: tegra: Add Tegra30 host1x clock support
Setup the clock parents for the two display controllers and HDMI.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 14:46:29 -07:00
Thierry Reding
2acc1fc282 ARM: tegra: Add AUXDATA for Tegra30 host1x
Add the OF_DEV_AUXDATA table entries required to associate the proper
names with host1x and its children. In turn, this allows the devices to
find the required clocks.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 14:46:28 -07:00
Thierry Reding
5f10778370 ARM: tegra: Add Tegra20 host1x clock support
Extend the pll_d frequency table with a few entries to support common
HDMI and LVDS display modes and setup the clock parents for the two
display controllers and HDMI.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 14:46:26 -07:00
Thierry Reding
35de7bfe91 ARM: tegra: Add AUXDATA for Tegra20 host1x
Add the OF_DEV_AUXDATA table entries required to associate the proper
names with host1x and its children. In turn, this allows the devices to
find the required clocks.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 14:46:23 -07:00
Danny Huang
f8ddda713b ARM: tegra: Tegra30 speedo-based process identification
This patch adds speedo-based process identification support for Tegra30.

Signed-off-by: Danny Huang <dahuang@nvidia.com>
[swarren s/Tegra3/Tegra30/ in log print,
s/T30/Tegra30/ in commit description]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 14:36:59 -07:00
Danny Huang
25cd5a3914 ARM: tegra: Add speedo-based process identification
Detect CPU and core process ID by checking speedo corner tables.
This can provide a more accurate process ID.

Signed-off-by: Danny Huang <dahuang@nvidia.com>
[swarren s/Tegra2/Tegra20/ in log print]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 14:34:20 -07:00
Danny Huang
1f851a262b ARM: tegra: flexible spare fuse read function
Change the spare fuse base from a definition to a variable.
It provides flexibilty to read spare fuse on different chip.

Signed-off-by: Danny Huang <dahuang@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 14:16:46 -07:00
Peter De Schrijver
fd072a86bd ARM: tegra: Implement 6395/1 for Tegra
This patch implements ARM linux patch 6395/1 for Tegra. See commit
1a8e41c "ARM: 6395/1: VExpress: Set bit 22 in the PL310 (cache
controller) AuxCtlr register" for details.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
[swarren: added commit subject for referenced patch]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-14 13:30:06 -07:00
Laxman Dewangan
e245f54a06 ARM: tegra: Add OF_DEV_AUXDATA for sflash driver in board dt
Add OF_DEV_AUXDATA for sflash controller driver for Tegra20
board dt files.
Set the parent clock of sflash controller to PLLP and configure
clock to 20MHz.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-13 11:42:39 -07:00
Joseph Lo
ca3d241cb2 ARM: tegra: enable data prefetch on L2
Enable the data prefetch on L2. The bit28 in aux ctrl register.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2012-11-09 14:58:40 -07:00
Laxman Dewangan
ffa05e450c ARM: tegra: Add OF_DEV_AUXDATA for SLINK driver in board dt
Add OF_DEV_AUXDATA for slink driver for Tegra20 and Tegra30
board dt files.
Set the parent clock of slink controller to PLLP and configure
clock to 100MHz.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05 11:36:23 -07:00
Joseph Lo
d065ab7189 ARM: tegra: common: using OF api for L2 cache init
Moving L2 cache init to DT support.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05 11:36:23 -07:00
Joseph Lo
5ab134ad09 ARM: tegra: dt: add L2 cache controller
Add L2 cache controller binding into DT for Tegra.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05 11:36:23 -07:00
Joseph Lo
d534b5d4a5 ARM: tegra30: clocks: add AHB and APB clocks
Adding the AHB and APB bus clock for Tegra30.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05 11:36:22 -07:00
Wei Ni
25804d8123 ARM: tegra: set up wlan clocks for tegra dt
Set up the wlan clock tree for Tegra20 and Tegra30.

Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05 11:36:22 -07:00
Stephen Warren
bb1de8877c ARM: tegra: move irammap.h to mach-tegra
Nothing outside mach-tegra uses this file, so there's no need for it to
be in <mach/>.

Since uncompress.h and debug-macro.S remain in include/mach, they need
to include "../../irammap.h" becaue of this change. Both these usages
will be removed shortly, when Tegra's DEBUG_LL implementation is updated
not to pass information through IRAM.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05 11:36:06 -07:00
Stephen Warren
2be39c079d ARM: tegra: move iomap.h to mach-tegra
Nothing outside mach-tegra uses this file, so there's no need for it to
be in <mach/>.

Since uncompress.h and debug-macro.S remain in include/mach, they need
to include "../../iomap.h" becaue of this change. uncompress.h will soon
be deleted in later multi-platform/single-zImage patches. debug-macro.S
will need to continue to include this header using an explicit relative
path, to avoid duplicating the physical->virtual address mapping that
iomap.h dictates.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05 11:36:06 -07:00
Stephen Warren
8a5d51fda0 ARM: tegra: remove <mach/dma.h>
Remove includes of <mach/dma.h> from sound/soc; nothing from it is used.

Remove include of <mach/dma.h> from mach-tegra/apbio.c; since the DMA
transfers made by this file don't need flow-control with any peripheral,
there's no need to set any slave ID.

Once those changes are made, there are no remaining users of <mach/dma.h>
so remove it. Drivers should get this information from device tree. This
removal is necessary for single zImage.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-11-05 11:36:06 -07:00
Stephen Warren
cc95e347cb ARM: tegra: move tegra-ahb.h out of arch/arm/mach-tegra/
We wish to empty arch/arm/mach-tegra/include/mach/ as much as possible
to enable single zImage. Move tegra-ahb.h to a more central location
(suggested by Arnd, OK'd by Greg KH), and actually make tegra-ahb.c
include the header to ensure client and provider agree on the prototype.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05 11:36:06 -07:00
Stephen Warren
a25186eb03 ARM: tegra: remove unnecessary includes of <mach/*.h>
This should make it easier to delete or move <mach/*.h>; something that
is useful for single-zImage.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05 11:36:05 -07:00
Stephen Warren
b9c665d75b ARM: tegra: update *.dts for regulator-compatible deprecation
Commit 13511de "regulator: deprecate regulator-compatible DT property"
now allows for simpler content within the regulators node within a PMIC.
Modify all the Tegra device tree files to take advantage of this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Thierry Reding <thierry.reding@avionic-design.de>
2012-11-05 11:36:04 -07:00
Linus Torvalds
b987a834f6 FRV fixes for 3.7
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Merge tag 'frv-fixes-20121102' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-frv

Pull FRV fixes from David Howells:
 "A collection of small fixes for the FRV architecture."

* tag 'frv-fixes-20121102' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-frv:
  frv: fix the broken preempt
  frv: switch to saner kernel_execve() semantics
  FRV: Fix the new-style kernel_thread() stuff
  FRV: Fix the preemption handling
  FRV: gcc-4.1.2 also inlines weak functions
  FRV: Don't objcopy the GNU build_id note
  FRV: Add missing linux/export.h #inclusions
2012-11-02 13:27:01 -07:00
Linus Torvalds
66b6a0c979 Bug-fixes:
* Use appropriate macros instead of hand-rolling our own (ARM).
  * Fixes if FB/KBD closed unexpectedly.
  * Fix memory leak in /dev/gntdev ioctl calls.
  * Fix overflow check in xenbus_file_write.
  * Document cleanup.
  * Performance optimization when migrating guests.
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Merge tag 'stable/for-linus-3.7-rc4-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen

Pull Xen bugfixes from Konrad Rzeszutek Wilk:
 - Use appropriate macros instead of hand-rolling our own (ARM).
 - Fixes if FB/KBD closed unexpectedly.
 - Fix memory leak in /dev/gntdev ioctl calls.
 - Fix overflow check in xenbus_file_write.
 - Document cleanup.
 - Performance optimization when migrating guests.

* tag 'stable/for-linus-3.7-rc4-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen:
  xen/mmu: Use Xen specific TLB flush instead of the generic one.
  xen/arm: use the __HVC macro
  xen/xenbus: fix overflow check in xenbus_file_write()
  xen-kbdfront: handle backend CLOSED without CLOSING
  xen-fbfront: handle backend CLOSED without CLOSING
  xen/gntdev: don't leak memory from IOCTL_GNTDEV_MAP_GRANT_REF
  x86: remove obsolete comment from asm/xen/hypervisor.h
2012-11-02 13:26:11 -07:00
Al Viro
1d72d9f83d frv: fix the broken preempt
Just get %icc2 into the state we would have after local_irq_disable()
and physical IRQ having happened since then.  Then we can simply
use preempt_schedule_irq() and be done with the whole mess.

Acked-by: David Howells <dhowells@redhat.com>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-11-02 12:08:25 -04:00
Al Viro
7b7ade1179 frv: switch to saner kernel_execve() semantics
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-11-02 12:05:04 -04:00
David Howells
e7aa51b2e5 FRV: Fix the new-style kernel_thread() stuff
The kernel_thread() changes for FRV don't work, and FRV fails to boot,
starting with:

	commit 02ce496f152df87be081a64796498942c433a2fd
	Author: Al Viro <viro@zeniv.linux.org.uk>
	Date:   Tue Sep 18 22:18:51 2012 -0400
	Subject: frv: split ret_from_fork, simplify kernel_thread() a lot

The problem is that the userspace registers are completely cleared when a
kernel thread is created and all subsequent user threads are then copied from
that.  Unfortunately, however, the TBR and PSR registers are restored from the
pt_regs and the values they should be set to are clobbered by the memset.

Instead, copy across the old user registers as normal, and then merely alter
GR8 and GR9 in it if we're going to execute a kernel thread.

Signed-off-by: David Howells <dhowells@redhat.com>
2012-11-02 13:20:43 +00:00
David Howells
1ee6f5669a FRV: Fix the preemption handling
Fix the preemption handling in FRV code where the PREEMPT_ACTIVE value is
incorrectly loaded into the threadinfo flags rather than the threadinfo
preemption count.

Unfortunately, the code cannot be simply converted to use
preempt_schedule_irq() as is because FRV uses virtual interrupt disablement to
cut down on the cost of actually disabling interrupts and thus
local_irq_enable() doesn't actually enable interrupts.

Reported-by: Al Viro <viro@ZenIV.linux.org.uk>
Signed-off-by: David Howells <dhowells@redhat.com>
cc: Al Viro <viro@ZenIV.linux.org.uk>
2012-11-02 13:20:42 +00:00
David Howells
5f0231d97b FRV: Don't objcopy the GNU build_id note
Don't let objcopy transfer the GNU build_id note into the loadable image as it
is located at address 0 and the image ends up >3G in size.

Signed-off-by: David Howells <dhowells@redhat.com>
2012-11-02 13:20:42 +00:00
David Howells
a5788caa26 FRV: Add missing linux/export.h #inclusions
Add missing linux/export.h #inclusions to the FRV arch.

Signed-off-by: David Howells <dhowells@redhat.com>
2012-11-02 13:20:42 +00:00
Linus Torvalds
c660b8f944 Xtensa patchset for 3.7-rc4
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Merge tag 'xtensa-next-20121101' of git://github.com/czankel/xtensa-linux

Pull Xtensa fixes from Chris Zankel:
 "Some important bug fixes.

  With the change to uapi, there was a bug introduced that results in an
  empty syscall table (mult-inclusion bug).  Switching to the generic
  thread/execve allowed us to fix a bug we had in vfork()."

* tag 'xtensa-next-20121101' of git://github.com/czankel/xtensa-linux:
  xtensa: switch to generic sys_execve()
  xtensa: switch to generic kernel_execve()
  xtensa: switch to generic kernel_thread()
  xtensa: reset windowbase/windowstart when cloning the VM
  xtensa: use physical addresses for bus addresses
  xtensa: allow multi-inclusion for uapi/unistd.h
2012-11-01 17:48:19 -07:00
Xiao Guangrong
87da7e66a4 KVM: x86: fix vcpu->mmio_fragments overflow
After commit b3356bf0dbb349 (KVM: emulator: optimize "rep ins" handling),
the pieces of io data can be collected and write them to the guest memory
or MMIO together

Unfortunately, kvm splits the mmio access into 8 bytes and store them to
vcpu->mmio_fragments. If the guest uses "rep ins" to move large data, it
will cause vcpu->mmio_fragments overflow

The bug can be exposed by isapc (-M isapc):

[23154.818733] general protection fault: 0000 [] SMP DEBUG_PAGEALLOC
[ ......]
[23154.858083] Call Trace:
[23154.859874]  [<ffffffffa04f0e17>] kvm_get_cr8+0x1d/0x28 [kvm]
[23154.861677]  [<ffffffffa04fa6d4>] kvm_arch_vcpu_ioctl_run+0xcda/0xe45 [kvm]
[23154.863604]  [<ffffffffa04f5a1a>] ? kvm_arch_vcpu_load+0x17b/0x180 [kvm]

Actually, we can use one mmio_fragment to store a large mmio access then
split it when we pass the mmio-exit-info to userspace. After that, we only
need two entries to store mmio info for the cross-mmio pages access

Signed-off-by: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-10-31 20:36:30 -02:00
Konrad Rzeszutek Wilk
95a7d76897 xen/mmu: Use Xen specific TLB flush instead of the generic one.
As Mukesh explained it, the MMUEXT_TLB_FLUSH_ALL allows the
hypervisor to do a TLB flush on all active vCPUs. If instead
we were using the generic one (which ends up being xen_flush_tlb)
we end up making the MMUEXT_TLB_FLUSH_LOCAL hypercall. But
before we make that hypercall the kernel will IPI all of the
vCPUs (even those that were asleep from the hypervisor
perspective). The end result is that we needlessly wake them
up and do a TLB flush when we can just let the hypervisor
do it correctly.

This patch gives around 50% speed improvement when migrating
idle guest's from one host to another.

Oracle-bug: 14630170

CC: stable@vger.kernel.org
Tested-by:  Jingjie Jiang <jingjie.jiang@oracle.com>
Suggested-by:  Mukesh Rathor <mukesh.rathor@oracle.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2012-10-31 12:38:31 -04:00
Stefano Stabellini
c8d258a7b2 xen/arm: use the __HVC macro
Use the new __HVC macro in hypercall.S.

Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2012-10-30 10:41:19 -04:00
Olaf Hering
b6514633bd x86: remove obsolete comment from asm/xen/hypervisor.h
Signed-off-by: Olaf Hering <olaf@aepfle.de>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2012-10-30 09:27:32 -04:00
Linus Torvalds
065c8012b2 arm-soc: fixes for v3.7-rc3
Bug fixes for a number of ARM platforms, mostly OMAP, imx and at91.
 These come a little later than I had hoped but unfortunately we
 had a few of these patches cause regressions themselves and had to
 work out how to deal with those in the meantime.
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Merge tag 'fixes-for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull arm-soc fixes from Arnd Bergmann:
 "Bug fixes for a number of ARM platforms, mostly OMAP, imx and at91.

  These come a little later than I had hoped but unfortunately we had a
  few of these patches cause regressions themselves and had to work out
  how to deal with those in the meantime."

* tag 'fixes-for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (38 commits)
  Revert "ARM i.MX25: Fix PWM per clock lookups"
  ARM: versatile: fix versatile_defconfig
  ARM: mvebu: update defconfig with 3.7 changes
  ARM: at91: fix at91x40 build
  ARM: socfpga: Fix socfpga compilation with early_printk() enabled
  ARM: SPEAr: Remove unused empty files
  MAINTAINERS: Add arm-soc tree entry
  ARM: dts: mxs: add the "clock-names" for gpmi-nand
  ARM: ux500: Correct SDI5 address and add some format changes
  ARM: ux500: Specify AMBA Primecell IDs for Nomadik I2C in DT
  ARM: ux500: Fix build error relating to IRQCHIP_SKIP_SET_WAKE
  ARM: at91: drop duplicated config SOC_AT91SAM9 entry
  ARM: at91/i2c: change id to let i2c-at91 work
  ARM: at91/i2c: change id to let i2c-gpio work
  ARM: at91/dts: at91sam9g20ek_common: Fix typos in buttons labels.
  ARM: at91: fix external interrupt specification in board code
  ARM: at91: fix external interrupts in non-DT case
  ARM: at91: at91sam9g10: fix SOC type detection
  ARM: at91/tc: fix typo in the DT document
  ARM: AM33XX: Fix configuration of dmtimer parent clock by dmtimer driverDate:Wed, 17 Oct 2012 13:55:55 -0500
  ...
2012-10-28 11:12:38 -07:00
Arnd Bergmann
943bb48755 Revert "ARM i.MX25: Fix PWM per clock lookups"
This reverts commit 92063cee118655d25b50d04eb77b012f3287357a, it
was applied prematurely, causing this build error for
imx_v4_v5_defconfig:

arch/arm/mach-imx/clk-imx25.c: In function 'mx25_clocks_init':
arch/arm/mach-imx/clk-imx25.c:206:26: error: 'pwm_ipg_per' undeclared (first use in this function)
arch/arm/mach-imx/clk-imx25.c:206:26: note: each undeclared identifier is reported only once for each function it appears in

Sascha Hauer explains:
> There are several gates missing in clk-imx25.c. I have a patch which
> adds support for them and I seem to have missed that the above depends
> on it.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-10-27 17:46:56 +02:00
Arnd Bergmann
5b627ba0f5 ARM: versatile: fix versatile_defconfig
With the introduction of CONFIG_ARCH_MULTIPLATFORM, versatile is
no longer the default platform, so we need to enable
CONFIG_ARCH_VERSATILE explicitly in order for that to be selected
rather than the multiplatform configuration.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-10-27 17:46:56 +02:00
Thomas Petazzoni
e09348c757 ARM: mvebu: update defconfig with 3.7 changes
The split of 370 and XP into two Kconfig options and the multiplatform
kernel support has changed a few Kconfig symbols, so let's update the
mvebu_defconfig file with the latest changes.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-10-27 17:46:55 +02:00
Arnd Bergmann
0654f4ab2b ARM: at91: fix at91x40 build
patch 738a0fd7 "ARM: at91: fix external interrupts in non-DT case"
fixed a run-time error on some at91 platforms but did not apply
the same change to at91x40, which now doesn't build.

This changes at91x40 in the same way that the other platforms
were changed.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-10-27 17:46:48 +02:00
Linus Torvalds
6ad2c73d11 Serial fix for 3.7-rc3
Here is one patch, a revert of a omap serial driver patch that was causing
 problems, for your 3.7-rc tree.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'tty-3.7-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty

Pull serial fix from Greg Kroah-Hartman:
 "Here is one patch, a revert of a omap serial driver patch that was
  causing problems, for your 3.7-rc tree.

  Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>"

* tag 'tty-3.7-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty:
  Revert "serial: omap: fix software flow control"
2012-10-26 10:26:08 -07:00