03f9016ed8
drm/amdgpu: Remap all page faults to per process dummy page.
...
On device removal reroute all CPU mappings to dummy page
per drm_file instance or imported GEM object.
v4:
Update for modified ttm_bo_vm_dummy_page
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20210512142648.666476-7-andrey.grodzovsky@amd.com
2021-05-19 23:50:27 -04:00
d10d0daa20
drm/amdgpu: Handle IOMMU enabled case.
...
Problem:
Handle all DMA IOMMU group related dependencies before the
group is removed. Those manifest themself in that when IOMMU
enabled DMA map/unmap is dependent on the presence of IOMMU
group the device belongs to but, this group is released once
the device is removed from PCI topology.
Fix:
Expedite all such unmap operations to pci remove driver callback.
v5: Drop IOMMU notifier and switch to lockless call to ttm_tt_unpopulate
v6: Drop the BO unamp list
v7:
Drop amdgpu_gart_fini
In amdgpu_ih_ring_fini do uncinditional check (!ih->ring)
to avoid freeing uniniitalized rings.
Call amdgpu_ih_ring_fini unconditionally.
v8: Add deatiled explanation
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com >
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20210517143851.475058-1-andrey.grodzovsky@amd.com
2021-05-19 23:50:27 -04:00
e9669fb782
drm/amdgpu: Add early fini callback
...
Use it to call disply code dependent on device->drv_data
before it's set to NULL on device unplug
v5:
Move HW finilization into this callback to prevent MMIO accesses
post cpi remove.
v7:
Split kfd suspend from device exit to expdite HW related
stuff to amdgpu_pci_remove
v8:
Squash previous KFD commit into this commit to avoid compile break.
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20210520032057.497334-1-andrey.grodzovsky@amd.com
2021-05-19 23:48:50 -04:00
72c8c97b15
drm/amdgpu: Split amdgpu_device_fini into early and late
...
Some of the stuff in amdgpu_device_fini such as HW interrupts
disable and pending fences finilization must be done right away on
pci_remove while most of the stuff which relates to finilizing and
releasing driver data structures can be kept until
drm_driver.release hook is called, i.e. when the last device
reference is dropped.
v4: Change functions prefix early->hw and late->sw
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20210512142648.666476-3-andrey.grodzovsky@amd.com
2021-05-19 23:45:49 -04:00
ae25ec2fc6
Merge tag 'drm-misc-next-2021-05-17' of git://anongit.freedesktop.org/drm/drm-misc into drm-next
...
drm-misc-next for 5.14:
UAPI Changes:
Cross-subsystem Changes:
Core Changes:
* aperture: Fix unlocking on errors
* legacy: Fix some doc comments
Driver Changes:
* drm/amdgpu: Free resource on fence usage query; Fix fence calculation;
* drm/bridge: Lt9611: Add missing MODULE_DEVICE_TABLE
* drm/i915: Print formats with %p4cc
* drm/ingenic: IPU planes are now always of type OVERLAY
* drm/nouveau: Remove left-over reference to struct drm_device.pdev
* drm/panfrost: Disable devfreq if num_supplies > 1; Add Mediatek MT8183 +
DT bindings; Cleanups
* drm/simpledrm: Print resources with %pr; Fix use-after-free errors;
Fix NULL deref; Fix MAINTAINERS entry
* drm/vmwgfx: Fix memory allocation and leak in FIFO allocation; Fix
return value in PCI resource setup
Signed-off-by: Dave Airlie <airlied@redhat.com >
From: Thomas Zimmermann <tzimmermann@suse.de >
Link: https://patchwork.freedesktop.org/patch/msgid/YKJs2IfwSYvuGPU7@linux-uq9g.fritz.box
2021-05-20 13:31:12 +10:00
81db370c88
drm/amdgpu: stop touching sched.ready in the backend
...
This unfortunately comes up in regular intervals and breaks
GPU reset for the engine in question.
The sched.ready flag controls if an engine can't get working
during hw_init, but should never be set to false during hw_fini.
v2: squash in unused variable fix (Alex)
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:45:00 -04:00
6e8bcdd63a
drm/amd/amdgpu: fix a potential deadlock in gpu reset
...
When amdgpu_ib_ring_tests failed, the reset logic called
amdgpu_device_ip_suspend twice, then deadlock occurred.
Deadlock log:
[ 805.655192] amdgpu 0000:04:00.0: amdgpu: ib ring test failed (-110).
[ 806.290952] [drm] free PSP TMR buffer
[ 806.319406] ============================================
[ 806.320315] WARNING: possible recursive locking detected
[ 806.321225] 5.11.0-custom #1 Tainted: G W OEL
[ 806.322135] --------------------------------------------
[ 806.323043] cat/2593 is trying to acquire lock:
[ 806.323825] ffff888136b1cdc8 (&adev->dm.dc_lock){+.+.}-{3:3}, at: dm_suspend+0xb8/0x1d0 [amdgpu]
[ 806.325668]
but task is already holding lock:
[ 806.326664] ffff888136b1cdc8 (&adev->dm.dc_lock){+.+.}-{3:3}, at: dm_suspend+0xb8/0x1d0 [amdgpu]
[ 806.328430]
other info that might help us debug this:
[ 806.329539] Possible unsafe locking scenario:
[ 806.330549] CPU0
[ 806.330983] ----
[ 806.331416] lock(&adev->dm.dc_lock);
[ 806.332086] lock(&adev->dm.dc_lock);
[ 806.332738]
*** DEADLOCK ***
[ 806.333747] May be due to missing lock nesting notation
[ 806.334899] 3 locks held by cat/2593:
[ 806.335537] #0 : ffff888100d3f1b8 (&attr->mutex){+.+.}-{3:3}, at: simple_attr_read+0x4e/0x110
[ 806.337009] #1 : ffff888136b1fd78 (&adev->reset_sem){++++}-{3:3}, at: amdgpu_device_lock_adev+0x42/0x94 [amdgpu]
[ 806.339018] #2 : ffff888136b1cdc8 (&adev->dm.dc_lock){+.+.}-{3:3}, at: dm_suspend+0xb8/0x1d0 [amdgpu]
[ 806.340869]
stack backtrace:
[ 806.341621] CPU: 6 PID: 2593 Comm: cat Tainted: G W OEL 5.11.0-custom #1
[ 806.342921] Hardware name: AMD Celadon-CZN/Celadon-CZN, BIOS WLD0C23N_Weekly_20_12_2 12/23/2020
[ 806.344413] Call Trace:
[ 806.344849] dump_stack+0x93/0xbd
[ 806.345435] __lock_acquire.cold+0x18a/0x2cf
[ 806.346179] lock_acquire+0xca/0x390
[ 806.346807] ? dm_suspend+0xb8/0x1d0 [amdgpu]
[ 806.347813] __mutex_lock+0x9b/0x930
[ 806.348454] ? dm_suspend+0xb8/0x1d0 [amdgpu]
[ 806.349434] ? amdgpu_device_indirect_rreg+0x58/0x70 [amdgpu]
[ 806.350581] ? _raw_spin_unlock_irqrestore+0x47/0x50
[ 806.351437] ? dm_suspend+0xb8/0x1d0 [amdgpu]
[ 806.352437] ? rcu_read_lock_sched_held+0x4f/0x80
[ 806.353252] ? rcu_read_lock_sched_held+0x4f/0x80
[ 806.354064] mutex_lock_nested+0x1b/0x20
[ 806.354747] ? mutex_lock_nested+0x1b/0x20
[ 806.355457] dm_suspend+0xb8/0x1d0 [amdgpu]
[ 806.356427] ? soc15_common_set_clockgating_state+0x17d/0x19 [amdgpu]
[ 806.357736] amdgpu_device_ip_suspend_phase1+0x78/0xd0 [amdgpu]
[ 806.360394] amdgpu_device_ip_suspend+0x21/0x70 [amdgpu]
[ 806.362926] amdgpu_device_pre_asic_reset+0xb3/0x270 [amdgpu]
[ 806.365560] amdgpu_device_gpu_recover.cold+0x679/0x8eb [amdgpu]
Signed-off-by: Lang Yu <Lang.Yu@amd.com >
Acked-by: Christian KÃnig <christian.koenig@amd.com >
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:44:50 -04:00
9a530062d5
drm/amdgpu: modify system reference clock source for navi+ (V2)
...
Starting from Navi+, the rlc reference clock is used for system clock
from vbios gfx_info table. It is incorrect to use core_refclk_10khz of
vbios smu_info table as system clock.
Signed-off-by: Aaron Liu <aaron.liu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Huang Rui <ray.huang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:44:48 -04:00
87476d12c5
drm/amdgpu: update sdma golden setting for Navi12
...
Current golden setting is out of date.
Signed-off-by: Guchun Chen <guchun.chen@amd.com >
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:44:45 -04:00
6c65d8678c
drm/amdgpu: update gc golden setting for Navi12
...
Current golden setting is out of date.
Signed-off-by: Guchun Chen <guchun.chen@amd.com >
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:44:43 -04:00
a8e56b80df
drm/amdgpu: Fix a use-after-free
...
looks like we forget to set ttm->sg to NULL.
Hit panic below
[ 1235.844104] general protection fault, probably for non-canonical address 0x6b6b6b6b6b6b7b4b: 0000 [#1 ] SMP DEBUG_PAGEALLOC NOPTI
[ 1235.989074] Call Trace:
[ 1235.991751] sg_free_table+0x17/0x20
[ 1235.995667] amdgpu_ttm_backend_unbind.cold+0x4d/0xf7 [amdgpu]
[ 1236.002288] amdgpu_ttm_backend_destroy+0x29/0x130 [amdgpu]
[ 1236.008464] ttm_tt_destroy+0x1e/0x30 [ttm]
[ 1236.013066] ttm_bo_cleanup_memtype_use+0x51/0xa0 [ttm]
[ 1236.018783] ttm_bo_release+0x262/0xa50 [ttm]
[ 1236.023547] ttm_bo_put+0x82/0xd0 [ttm]
[ 1236.027766] amdgpu_bo_unref+0x26/0x50 [amdgpu]
[ 1236.032809] amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu+0x7aa/0xd90 [amdgpu]
[ 1236.040400] kfd_ioctl_alloc_memory_of_gpu+0xe2/0x330 [amdgpu]
[ 1236.046912] kfd_ioctl+0x463/0x690 [amdgpu]
Signed-off-by: xinhui pan <xinhui.pan@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:44:39 -04:00
1f6256590c
drm/amdgpu: Query correct register for DF hashing on Aldebaran
...
For Aldebaran, driver needs to query DramMegaBaseAddress to
check if DF hashing is enabled.
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com >
Acked-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:44:19 -04:00
295c4f513f
drm/amdgpu: add video_codecs query support for aldebaran
...
Add video_codecs query support for aldebaran.
Signed-off-by: James Zhu <James.Zhu@amd.com >
Reviewed-by: Leo Liu <leo.liu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:44:16 -04:00
e552ee40b0
drm/amdgpu: Move dmabuf attach/detach to backend_(un)bind
...
The dmabuf attachment should be updated by moving the SG BO to DOMAIN_CPU
and back to DOMAIN_GTT. This does not necessarily invoke the
populate/unpopulate callbacks. Do this in backend_bind/unbind instead.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Acked-by: Oak Zeng <Oak.Zeng@amd.com >
Acked-by: Ramesh Errabolu <Ramesh.Errabolu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:44:10 -04:00
5ac3c3e45f
drm/amdgpu: Add DMA mapping of GTT BOs
...
Use DMABufs with dynamic attachment to DMA-map GTT BOs on other GPUs.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com >
Acked-by: Oak Zeng <Oak.Zeng@amd.com >
Acked-by: Ramesh Errabolu <Ramesh.Errabolu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:44:06 -04:00
9e5d275319
drm/amdgpu: Move kfd_mem_attach outside reservation
...
This is needed to avoid deadlocks with DMA buf import in the next patch.
Also move PT/PD validation out of kfd_mem_attach, that way the caller
can bo this unconditionally.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com >
Acked-by: Oak Zeng <Oak.Zeng@amd.com >
Acked-by: Ramesh Errabolu <Ramesh.Errabolu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:44:03 -04:00
b72ed8a2de
drm/amdgpu: DMA map/unmap when updating GPU mappings
...
DMA map kfd_mem_attachments in update_gpuvm_pte. This function is called
with the BO and page tables reserved, so we can safely update the DMA
mapping.
DMA unmap when a BO is unmapped from a GPU and before updating mappings
in restore workers.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com >
Acked-by: Oak Zeng <Oak.Zeng@amd.com >
Acked-by: Ramesh Errabolu <Ramesh.Errabolu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:43:59 -04:00
264fb4d332
drm/amdgpu: Add multi-GPU DMA mapping helpers
...
Add BO-type specific helpers functions to DMA-map and unmap
kfd_mem_attachments. Implement this functionality for userptrs by creating
one SG BO per GPU and filling it with a DMA mapping of the pages from the
original mem->bo.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com >
Acked-by: Oak Zeng <Oak.Zeng@amd.com >
Acked-by: Ramesh Errabolu <Ramesh.Errabolu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:43:56 -04:00
7141394edc
drm/amdgpu: Simplify AQL queue mapping
...
Do AQL queue double-mapping with a single attach call. That will make it
easier to create per-GPU BOs later, to be shared between the two BO VA
mappings on the same GPU.
Freeing the attachments is not necessary if map_to_gpu fails. These will be
cleaned up when the kdg_mem object is destroyed in
amdgpu_amdkfd_gpuvm_free_memory_of_gpu.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com >
Acked-by: Oak Zeng <Oak.Zeng@amd.com >
Acked-by: Ramesh Errabolu <Ramesh.Errabolu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:43:52 -04:00
4e94272f8a
drm/amdgpu: Keep a bo-reference per-attachment
...
For now they all reference the same BO. For correct DMA mappings they will
refer to different BOs per-GPU.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com >
Acked-by: Oak Zeng <Oak.Zeng@amd.com >
Acked-by: Ramesh Errabolu <Ramesh.Errabolu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:43:49 -04:00
c780b2eedb
drm/amdgpu: Rename kfd_bo_va_list to kfd_mem_attachment
...
This name is more fitting, especially for the changes coming next to
support multi-GPU systems with proper DMA mappings. Cleaned up the code
and renamed some related functions and variables to improve readability.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com >
Acked-by: Oak Zeng <Oak.Zeng@amd.com >
Acked-by: Ramesh Errabolu <Ramesh.Errabolu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:43:46 -04:00
0a6fb50286
drm/amd/amdgpu: fix refcount leak
...
[Why]
the gem object rfb->base.obj[0] is get according to num_planes
in amdgpufb_create, but is not put according to num_planes
[How]
put rfb->base.obj[0] in amdgpu_fbdev_destroy according to num_planes
Signed-off-by: Jingwen Chen <Jingwen.Chen2@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:43:43 -04:00
4aa7e6e07b
drm/amd/amdgpu: psp program IH_RB_CTRL on sienna_cichlid
...
[Why]
IH_RB_CNTL is blocked by PSP so we need to ask psp to help config it.
[How]
Move psp ip block before ih, and use psp to program IH_RB_CNTL under sriov.
Reviewed-by: Chen, Horace <Horace.Chen@amd.com >
Signed-off-by: YuBiao Wang <YuBiao.Wang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:43:40 -04:00
ac87f94294
drm/amd/display: Enable HDCP for Beige Goby
...
[Why&How]
Add beige_goby_ta.bin to module firmware table and call psp init for TA
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com >
Acked-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:43:32 -04:00
ddaed58b57
drm/amd/amdgpu: Enable DCN IP init for Beige Goby
...
[Why&How]
Adds DCN IP block initialization for Beige Goby
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com >
Acked-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:42:13 -04:00
2db8378f09
drm/amdgpu: fix GCR_GENERAL_CNTL offset for beige_goby
...
beige_goby has similar gc_10_3 ip with sienna_cichlid,
so follow its registers offset setting.
Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com >
Reviewed-by: Jack Gui <Jack.Gui@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:41:53 -04:00
ece3cbadb4
drm/amd/amdgpu: Enable gfxoff for beige_goby
...
Enable gfxoff in driver side based on SMC#73.3
v2: fix typo 'Eanble' --> 'Enable'
Signed-off-by: Chengming Gui <Jack.Gui@amd.com >
Reviewed-by: Tao Zhou <tao.zhou1@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:41:50 -04:00
d69d278fc7
drm/amdgpu: add cgls for beige_goby
...
Enable cgls to improve the runtime power efficiency.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com >
Reviewed-by: Jack Gui <Jack.Gui@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:41:45 -04:00
e47e4c0e4f
drm/amdgpu: enabled VCN3.0 CG for BEIGE GOBY
...
Enable VCN CG for BEIGE GOBY
Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com >
Reviewed-by: Leo Liu <leo.liu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:41:33 -04:00
a764bef36d
drm/amdgpu: enable ih CG for beige_goby
...
Enable ih clock gating for beige_goby.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com >
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:41:30 -04:00
170c193ffd
drm/amdgpu: enable hdp CG and LS for beige_goby
...
Enable hdp MGCG and LS for beige_goby.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com >
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:41:28 -04:00
5d36b865e4
drm/amdgpu: enable mc CG and LS for beige_goby
...
Enable mc CG and LS for beige_goby.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com >
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:41:25 -04:00
147de218c2
drm/amdgpu: enable athub/mmhub PG for beige_goby
...
Enable athub/mmhub power gating for beige_goby.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com >
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:41:22 -04:00
d75caec8a4
drm/amdgpu: support athub cg setting for beige_goby
...
Enable athub cg for beige_goby.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com >
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:41:19 -04:00
bc6bd46bc3
drm/amdgpu: enable GFX clock gating for beige_goby
...
Enable GFX MGCG, CGCG and 3DCG for beige_goby.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com >
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:41:15 -04:00
5ed7715dbb
drm/amd/pm: add mode1 support for beige_goby
...
Add mode1 reset as the default reset method for beige_goby
Signed-off-by: Chengming Gui <Jack.Gui@amd.com >
Reviewed-by: Tao Zhou <tao.zhou1@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:41:04 -04:00
09c31c778d
drm/amd/amdgpu: update golden_setting_10_3_5 for beige_goby
...
add mmCGTT_SPI_{RA0/RA1}_CLK_CTRL setting
Signed-off-by: Chengming Gui <Jack.Gui@amd.com >
Reviewed-by: Tao Zhou <tao.zhou1@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:41:01 -04:00
f703d4b6f2
drm/amdgpu: Enable VCN for Beige Goby
...
Enabled VCN support for Beige Goby chip
Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com >
Reviewed-by: Leo Liu <leo.liu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:40:58 -04:00
3df8ecc8a1
drm/amdgpu: add gc_10_3_5 golden setting for beige_goby
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execute gc_10_3_5 golden registers one-time initialization
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com >
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com >
Reviewed-by: Guchun Chen <guchun.chen@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:40:53 -04:00
77a3e25102
drm/amdgpu: add mmhub client support for beige goby
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For decoding GPUVM page faults.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:40:50 -04:00
c072981910
drm/amd/amdgpu: add psp support for beige_goby
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add general PSP support for beige_goby
Signed-off-by: Chengming Gui <Jack.Gui@amd.com >
Reviewed-by: Tao Zhou <tao.zhou1@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:40:47 -04:00
4d3526690a
drm/amd/amdgpu: add smu support for beige_goby
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Use soft-pptable for beige_goby
v2: fix format
Signed-off-by: Chengming Gui <Jack.Gui@amd.com >
Reviewed-by: Tao Zhou <tao.zhou1@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:40:44 -04:00
0e5f4b0988
drm/amd/amdgpu: Use IP discovery table for beige goby
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Rather than gpu info firmware.
Signed-off-by: Chengming Gui <Jack.Gui@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Reviewed-by: Tao Zhou <tao.zhou1@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:40:36 -04:00
afee60e4c5
drm/amd/amdgpu: support cp_fw_write_wait for beige_goby
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Same as dimgrey_cavefish to support WAIT_REG_MEM packet.
Signed-off-by: Chengming Gui <Jack.Gui@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Reviewed-by: Tao Zhou <tao.zhou1@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:40:34 -04:00
5663da86c9
drm/amd/amdgpu: add virtual display support for beige_goby
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Add virtual ip block for beige_goby
Signed-off-by: Chengming Gui <Jack.Gui@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Reviewed-by: Tao Zhou <tao.zhou1@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:40:30 -04:00
67b35b08e7
drm/amd/amdgpu: configure beige_goby gfx according to gfx 10.3's definition
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The gfx version of beige_goby is 10.3,
identical to sienna_cichlid,
follow the way of sienna_cichlid
Signed-off-by: Chengming Gui <Jack.Gui@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Reviewed-by: Tao Zhou <tao.zhou1@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:40:28 -04:00
8760403e19
drm/amd/amdgpu: add sdma ip block for beige_goby
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Enable sdma block for beige_goby, same as sienna_cichlid
v2: share the same setting of sdma instance num with vangogh
Signed-off-by: Chengming Gui <Jack.Gui@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Suggested-by: Alexander Deucher <Alexander.Deucher@amd.com >
Reviewed-by: Tao Zhou <tao.zhou1@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:40:26 -04:00
898319ca1e
drm/amd/amdgpu: add gfx ip block for beige_goby
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Enable gfx block for beige_goby, same as dimgrey_cavefish
Signed-off-by: Chengming Gui <Jack.Gui@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Reviewed-by: Tao Zhou <tao.zhou1@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:40:23 -04:00
a1dede364b
drm/amd/amdgpu: add ih ip block for beige_goby
...
Enable ih block for beige_goby, same as dimgrey_cavefish
Signed-off-by: Chengming Gui <Jack.Gui@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Reviewed-by: Tao Zhou <tao.zhou1@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:40:19 -04:00
2d527ea6fd
drm/amd/amdgpu: add gmc ip block for beige_goby
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Enable gmc block for beige_goby, same as sienna_cichlid
Signed-off-by: Chengming Gui <Jack.Gui@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Reviewed-by: Tao Zhou <tao.zhou1@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2021-05-19 22:40:17 -04:00
