1043429 Commits

Author SHA1 Message Date
Arnd Bergmann
4a47ce1fab i.MX drivers update for 5.16:
- Select REGMAP_MMIO for i.MX GPCv2 driver to avoid build issue.
 - A couple of i.MX GPCv2 driver changes from Marek Vasut to turn
   domain->pgc into bitfield for i.MX8MM GPU domain support.
 - A series from Lucas Stach adding support of i.MX8MM nested power
   domains like VPUMIX and DISPMIX which contains the ADB and BLK_CTRL.
 - An off-by-one fix on Lucas' i.MX8M blk-ctrl driver code.
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Merge tag 'imx-drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers

i.MX drivers update for 5.16:

- Select REGMAP_MMIO for i.MX GPCv2 driver to avoid build issue.
- A couple of i.MX GPCv2 driver changes from Marek Vasut to turn
  domain->pgc into bitfield for i.MX8MM GPU domain support.
- A series from Lucas Stach adding support of i.MX8MM nested power
  domains like VPUMIX and DISPMIX which contains the ADB and BLK_CTRL.
- An off-by-one fix on Lucas' i.MX8M blk-ctrl driver code.

* tag 'imx-drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: imx8m-blk-ctrl: off by one in imx8m_blk_ctrl_xlate()
  soc: imx: imx8m-blk-ctrl: add DISP blk-ctrl
  soc: imx: add i.MX8M blk-ctrl driver
  soc: imx: gpcv2: support system suspend/resume
  soc: imx: gpcv2: keep i.MX8M* bus clocks enabled
  soc: imx: gpcv2: add domain option to keep domain clocks enabled
  soc: imx: gpcv2: add lockdep annotation
  Revert "soc: imx: gpcv2: move reset assert after requesting domain power up"
  soc: imx: gpcv2: allow to disable individual power domains
  imx: soc: Select REGMAP_MMIO
  soc: imx: gpcv2: Set both GPC_PGC_nCTRL(GPU_2D|GPU_3D) for MX8MM GPU domain
  soc: imx: gpcv2: Turn domain->pgc into bitfield

Link: https://lore.kernel.org/r/20211016140138.1603-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20 16:53:34 +02:00
Dan Carpenter
72949f7656 soc: imx: imx8m-blk-ctrl: off by one in imx8m_blk_ctrl_xlate()
The > comparison should be >= to prevent reading one element beyond the
end of the array.  The onecell_data->domains[] array is allocated in
imx8m_blk_ctrl_probe() and it has "onecell_data->num_domains" elements.

Fixes: 5b340e7813d4 ("soc: imx: add i.MX8M blk-ctrl driver")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-15 11:10:05 +08:00
Arnd Bergmann
790f42a61e This pull request contains Broadcom ARM/ARM64 SoC drivers changes for
5.16, please pull the following:
 
 - Cai updates the bcm-pmb and bcm63xx-power drivers to use the
   devm_platform_ioremap_resource() helper
 
 - Florian updates the Bus Interface Unit code to tune the 72116 and
   72113 chips according to their existing counterparts. The GISB driver is
   updated to be built as a non-removable module
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Merge tag 'arm-soc/for-5.16/drivers' of https://github.com/Broadcom/stblinux into arm/drivers

This pull request contains Broadcom ARM/ARM64 SoC drivers changes for
5.16, please pull the following:

- Cai updates the bcm-pmb and bcm63xx-power drivers to use the
  devm_platform_ioremap_resource() helper

- Florian updates the Bus Interface Unit code to tune the 72116 and
  72113 chips according to their existing counterparts. The GISB driver is
  updated to be built as a non-removable module

* tag 'arm-soc/for-5.16/drivers' of https://github.com/Broadcom/stblinux:
  bus: brcmstb_gisb: Allow building as module
  soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72116
  soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72113
  soc: bcm63xx-power: Make use of the helper function devm_platform_ioremap_resource()
  soc: bcm: bcm-pmb: Make use of the helper function devm_platform_ioremap_resource()

Link: https://lore.kernel.org/r/20211013174016.831348-3-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-13 23:01:40 +02:00
Arnd Bergmann
936fc53f3d Qualcomm driver updates for v5.16
This drops the use of power-domains for exposing the load_state from the
 QMP driver to clients, to avoid issues related to system suspend.
 
 SMP2P becomes wakeup capable, to allow dying remoteprocs to wake up
 Linux from suspend to perform recovery.
 
 It adds RPM power-domain support for SM6350 and MSM8953 and base RPM
 support for MSM8953 and QCM2290.
 
 It adds support for MSM8996, SDM630 and SDM660 in the SPM driver, which
 will enable the introduction of proper voltage scaling of the CPU
 subsystem.
 
 Support for releasing secondary CPUs on MSM8226 is introduced.
 
 The Asynchronous Packet Router (APR) driver is extended to support the
 new Generic Packet Router (GPR) variant, which is used to communicate
 with the firmware in the new AudioReach audio driver.
 
 Lastly it transitions a number of drivers to safer string functions, as
 well as switching things to use devm_platform_ioremap_resource().
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Merge tag 'qcom-drivers-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for v5.16

This drops the use of power-domains for exposing the load_state from the
QMP driver to clients, to avoid issues related to system suspend.

SMP2P becomes wakeup capable, to allow dying remoteprocs to wake up
Linux from suspend to perform recovery.

It adds RPM power-domain support for SM6350 and MSM8953 and base RPM
support for MSM8953 and QCM2290.

It adds support for MSM8996, SDM630 and SDM660 in the SPM driver, which
will enable the introduction of proper voltage scaling of the CPU
subsystem.

Support for releasing secondary CPUs on MSM8226 is introduced.

The Asynchronous Packet Router (APR) driver is extended to support the
new Generic Packet Router (GPR) variant, which is used to communicate
with the firmware in the new AudioReach audio driver.

Lastly it transitions a number of drivers to safer string functions, as
well as switching things to use devm_platform_ioremap_resource().

* tag 'qcom-drivers-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (40 commits)
  soc: qcom: apr: Add GPR support
  soc: dt-bindings: qcom: add gpr bindings
  soc: qcom: apr: make code more reuseable
  soc: dt-bindings: qcom: apr: deprecate qcom,apr-domain property
  soc: dt-bindings: qcom: apr: convert to yaml
  dt-bindings: soc: qcom: aoss: Delete unused power-domain definitions
  dt-bindings: msm/dp: Remove aoss-qmp header
  soc: qcom: aoss: Drop power domain support
  dt-bindings: soc: qcom: aoss: Drop the load state power-domain
  soc: qcom: smp2p: Add wakeup capability to SMP2P IRQ
  dt-bindings: power: rpmpd: Add SM6350 to rpmpd binding
  dt-bindings: soc: qcom: aoss: Add SM6350 compatible
  soc: qcom: llcc: Disable MMUHWT retention
  soc: qcom: smd-rpm: Add QCM2290 compatible
  dt-bindings: soc: qcom: smd-rpm: Add QCM2290 compatible
  firmware: qcom_scm: Add compatible for MSM8953 SoC
  dt-bindings: firmware: qcom-scm: Document msm8953 bindings
  soc: qcom: pdr: Prefer strscpy over strcpy
  soc: qcom: rpmh-rsc: Make use of the helper function devm_platform_ioremap_resource_byname()
  soc: qcom: gsbi: Make use of the helper function devm_platform_ioremap_resource()
  ...

Link: https://lore.kernel.org/r/20211012173442.1017010-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-13 22:34:43 +02:00
Arnd Bergmann
030f4e72aa Driver changes for ti-sysc for v5.16
Changes for ti-sysc driver for improved system suspend and resume
 support as some drivers need to be reinitialized on resume. Also
 a non-urgent resume warning fix, and dropping of legacy flags for
 gpio and sham:
 
 - Fix timekeeping suspended warning on resume. Probably no need to merge
   this into fixes as it's gone unnoticed for a while.
 
 - Check for context loss for reinit of a module
 
 - Add add quirk handling to reinit on context loss, and also fix a
   build warning it caused
 
 - Add quirk handling to reset on reinit
 
 - Use context loss quirk for gpmc and otg
 
 - Handle otg force-idle quirk even if no driver is loaded
 
 - Drop legacy flags for gpio and sham
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Merge tag 'omap-for-v5.16/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/drivers

Driver changes for ti-sysc for v5.16

Changes for ti-sysc driver for improved system suspend and resume
support as some drivers need to be reinitialized on resume. Also
a non-urgent resume warning fix, and dropping of legacy flags for
gpio and sham:

- Fix timekeeping suspended warning on resume. Probably no need to merge
  this into fixes as it's gone unnoticed for a while.

- Check for context loss for reinit of a module

- Add add quirk handling to reinit on context loss, and also fix a
  build warning it caused

- Add quirk handling to reset on reinit

- Use context loss quirk for gpmc and otg

- Handle otg force-idle quirk even if no driver is loaded

- Drop legacy flags for gpio and sham

* tag 'omap-for-v5.16/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  bus: ti-sysc: Fix variable set but not used warning for reinit_modules
  bus: ti-sysc: Drop legacy quirk flag for sham
  bus: ti-sysc: Drop legacy quirk flag for gpio
  bus: ti-sysc: Handle otg force idle quirk
  bus: ti-sysc: Use context lost quirk for otg
  bus: ti-sysc: Use context lost quirks for gpmc
  bus: ti-sysc: Add quirk handling for reset on re-init
  bus: ti-sysc: Add quirk handling for reinit on context lost
  bus: ti-sysc: Check for lost context in sysc_reinit_module()
  bus: ti-sysc: Fix timekeeping_suspended warning on resume

Link: https://lore.kernel.org/r/pull-1633950030-501948@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11 16:55:34 +02:00
Arnd Bergmann
24e18b0f45 - mt8192: add mutex support
- mmsys:
   add more components
   add routing table for mt8192
   add reset controller support
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Merge tag 'v5.15-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers

- mt8192: add mutex support
- mmsys:
  add more components
  add routing table for mt8192
  add reset controller support

* tag 'v5.15-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  drm/mediatek: mtk_dsi: Reset the dsi0 hardware
  soc: mediatek: mmsys: Add reset controller support
  soc: mediatek: add mtk mutex support for MT8192
  soc: mediatek: mmsys: Add mt8192 mmsys routing table
  soc: mediatek: mmsys: add comp OVL_2L2/POSTMASK/RDMA4

Link: https://lore.kernel.org/r/b1d364d0-f2ae-488b-b3f7-c694049c20d3@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11 12:09:08 +02:00
Arnd Bergmann
16667625da Memory controller drivers for v5.16
1. Renesas RPC: fix unaligned bus access and QSPI data transfers in
    manual modes.
 2. Renesas RPC: select RESET_CONTROLLER as it is necessary for
    operation.
 3. FSL IFC: fix error paths.
 4. Broadcom: allow building as module.
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Merge tag 'memory-controller-drv-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers

Memory controller drivers for v5.16

1. Renesas RPC: fix unaligned bus access and QSPI data transfers in
   manual modes.
2. Renesas RPC: select RESET_CONTROLLER as it is necessary for
   operation.
3. FSL IFC: fix error paths.
4. Broadcom: allow building as module.

* tag 'memory-controller-drv-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  memory: fsl_ifc: fix leak of irq and nand_irq in fsl_ifc_ctrl_probe
  memory: renesas-rpc-if: RENESAS_RPCIF should select RESET_CONTROLLER
  memory: brcmstb_dpfe: Allow building Broadcom STB DPFE as module
  memory: samsung: describe drivers in KConfig
  memory: renesas-rpc-if: Avoid unaligned bus access for HyperFlash
  memory: renesas-rpc-if: Correct QSPI data transfer in Manual mode
  dt-bindings: rpc: renesas-rpc-if: Add support for the R8A779A0 RPC-IF

Link: https://lore.kernel.org/r/20211010175836.13302-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11 12:07:57 +02:00
Arnd Bergmann
f47794f5fa Memory controller drivers for v5.14 - Mediatek
Add MT8195 support to the Mediatek SMI memory controller driver.  This
 brings also several cleanups and minor enhancements before adding actual
 new device support.
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Merge tag 'memory-controller-drv-mtk-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers

Memory controller drivers for v5.14 - Mediatek

Add MT8195 support to the Mediatek SMI memory controller driver.  This
brings also several cleanups and minor enhancements before adding actual
new device support.

* tag 'memory-controller-drv-mtk-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  MAINTAINERS: Add entry for MediaTek SMI
  memory: mtk-smi: mt8195: Add initial setting for smi-larb
  memory: mtk-smi: mt8195: Add initial setting for smi-common
  memory: mtk-smi: mt8195: Add smi support
  memory: mtk-smi: Use devm_platform_ioremap_resource
  memory: mtk-smi: Add clocks for smi-sub-common
  memory: mtk-smi: Add device link for smi-sub-common
  memory: mtk-smi: Add error handle for smi_probe
  memory: mtk-smi: Adjust some code position
  memory: mtk-smi: Rename smi_gen to smi_type
  memory: mtk-smi: Use clk_bulk clock ops
  dt-bindings: memory: mediatek: Add mt8195 smi sub common
  dt-bindings: memory: mediatek: Add mt8195 smi binding

Link: https://lore.kernel.org/r/20211010175836.13302-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11 12:06:46 +02:00
Arnd Bergmann
14a7b467a6 Memory controller drivers for v5.16 - Tegra SoC
1. Several minor improvements.
 2. Handle errors in BPMP response of Tegra186 EMC.
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Merge tag 'memory-controller-drv-tegra-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers

Memory controller drivers for v5.16 - Tegra SoC

1. Several minor improvements.
2. Handle errors in BPMP response of Tegra186 EMC.

* tag 'memory-controller-drv-tegra-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  memory: tegra210-emc: replace DEFINE_SIMPLE_ATTRIBUTE with
  memory: tegra186-emc: Fix error return code in tegra186_emc_probe()
  memory: tegra: Make use of the helper function devm_add_action_or_reset()
  memory: tegra186-emc: Handle errors in BPMP response
  memory: tegra: Remove interconnect state syncing hack
  memory: tegra210-emc: replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE
  memory: tegra30-emc: replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE
  memory: tegra: make the array list static const, makes object smaller

Link: https://lore.kernel.org/r/20211010175836.13302-3-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11 12:05:30 +02:00
Arnd Bergmann
55ab594231 cpuidle: tegra: Changes for v5.16-rc1
This pulls in the for-5.16/clk and for-5.16/soc branches and uses the
 stubs added in them to enable compile testing of the cpuidle driver.
 While at it, this also fixes a potential driver probe order race
 condition between the PMC and the cpuidle driver.
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Merge tag 'tegra-for-5.16-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

cpuidle: tegra: Changes for v5.16-rc1

This pulls in the for-5.16/clk and for-5.16/soc branches and uses the
stubs added in them to enable compile testing of the cpuidle driver.
While at it, this also fixes a potential driver probe order race
condition between the PMC and the cpuidle driver.

* tag 'tegra-for-5.16-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  cpuidle: tegra: Check whether PMC is ready
  cpuidle: tegra: Enable compile testing
  clk: tegra: Add stubs needed for compile testing

Link: https://lore.kernel.org/r/20211008201132.1678814-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11 11:24:06 +02:00
Arnd Bergmann
94b847c766 soc/tegra: Changes for v5.16-rc1
This set consists of stub additions to enable compile testing for more
 drivers, exposes the PMC's USB regmap on all SoC generations, removes a
 state synchronization workaround that is no longer needed and adds an
 error reporting driver that can help troubleshoot crashes.
 
 To top it all off, an error handling path in the powergating code is
 fixed and the devm_platform_ioremap_resource() function is used to
 remove some boilerplate code.
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Merge tag 'tegra-for-5.16-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

soc/tegra: Changes for v5.16-rc1

This set consists of stub additions to enable compile testing for more
drivers, exposes the PMC's USB regmap on all SoC generations, removes a
state synchronization workaround that is no longer needed and adds an
error reporting driver that can help troubleshoot crashes.

To top it all off, an error handling path in the powergating code is
fixed and the devm_platform_ioremap_resource() function is used to
remove some boilerplate code.

* tag 'tegra-for-5.16-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: pmc: Use devm_platform_ioremap_resource()
  soc/tegra: Add Tegra186 ARI driver
  soc/tegra: Fix an error handling path in tegra_powergate_power_up()
  soc/tegra: pmc: Expose USB regmap to all SoCs
  soc/tegra: pmc: Disable PMC state syncing
  soc/tegra: pm: Make stubs usable for compile testing
  soc/tegra: irq: Add stubs needed for compile testing
  soc/tegra: fuse: Add stubs needed for compile testing

Link: https://lore.kernel.org/r/20211008201132.1678814-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11 11:11:02 +02:00
Arnd Bergmann
e4fb7b4411 firmware: tegra: Changes for v5.16-rc1
This contains a fix for a stack usage problem that was causing build
 failures on 32-bit ARM and a minor janitorial cleanup.
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Merge tag 'tegra-for-5.16-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

firmware: tegra: Changes for v5.16-rc1

This contains a fix for a stack usage problem that was causing build
failures on 32-bit ARM and a minor janitorial cleanup.

* tag 'tegra-for-5.16-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  firmware: tegra: bpmp: Use devm_platform_ioremap_resource()
  firmware: tegra: Reduce stack usage

Link: https://lore.kernel.org/r/20211008201132.1678814-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11 11:00:32 +02:00
Arnd Bergmann
8855761890 Amlogic Drivers updates for v5.16:
- soc: amlogic: meson-gx-socinfo: Add the SOC ID for the S905Y2 used in the Radxa Zero
 - soc: amlogic: meson-clk-measure/canvas: Make use of devm_platform_ioremap_resource()
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Merge tag 'amlogic-drivers-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/drivers

Amlogic Drivers updates for v5.16:

Minor cleanups, and the addition of the S905Y2 SoC ID

* tag 'amlogic-drivers-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  soc: amlogic: meson-clk-measure: Make use of the helper function devm_platform_ioremap_resource()
  soc: amlogic: canvas: Make use of the helper function devm_platform_ioremap_resource()
  soc: amlogic: meson-gx-socinfo: Add S905Y2 ID for Radxa Zero

Link: https://lore.kernel.org/r/f8e020d3-29f7-0745-3864-01975edd20f7@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11 10:36:16 +02:00
Krzysztof Kozlowski
d611d7ea12 Merge branch 'for-v5.16/renesas-rpc' into mem-ctrl-next 2021-10-10 19:45:00 +02:00
Cai Huoqing
76d8947431 soc/tegra: pmc: Use devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of calling
platform_get_resource() and devm_ioremap_resource() separately.

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-08 21:42:41 +02:00
Mikko Perttunen
29962197e6 soc/tegra: Add Tegra186 ARI driver
Add a driver to hook into panic notifiers and print machine check
status for debugging. Status information is retrieved via SMC. This
is supported by upstream ARM Trusted Firmware.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-08 21:42:38 +02:00
Enric Balletbo i Serra
605c83753d drm/mediatek: mtk_dsi: Reset the dsi0 hardware
Reset dsi0 HW to default when power on. This prevents to have different
settingis between the bootloader and the kernel.

As not all Mediatek boards have the reset consumer configured in their
board description, also is not needed on all of them, the reset is optional,
so the change is compatible with all boards.

Cc: Jitao Shi <jitao.shi@mediatek.com>
Suggested-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20210930103105.v4.7.Idbb4727ddf00ba2fe796b630906baff10d994d89@changeid
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-10-08 15:15:26 +02:00
Enric Balletbo i Serra
f27ef28563 soc: mediatek: mmsys: Add reset controller support
Among other features the mmsys driver should implement a reset
controller to be able to reset different bits from their space.

Cc: Jitao Shi <jitao.shi@mediatek.com>
Suggested-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20210930103105.v4.6.I15e2419141a69b2e5c7e700c34d92a69df47e04d@changeid
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-10-08 15:15:26 +02:00
Yongqiang Niu
13d9624da4 soc: mediatek: add mtk mutex support for MT8192
Add mtk mutex support for MT8192 SoC.

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Link: https://lore.kernel.org/r/20210930155222.5861-5-yongqiang.niu@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-10-08 13:25:43 +02:00
Cai Huoqing
f11c34bddf firmware: tegra: bpmp: Use devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of calling
platform_get_resource() and devm_ioremap_resource() separately.

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-07 20:52:24 +02:00
Arnd Bergmann
06c2d9a078 firmware: tegra: Reduce stack usage
Building the bpmp-debugfs driver for Arm results in a warning for stack usage:

drivers/firmware/tegra/bpmp-debugfs.c:321:16: error: stack frame size of 1224 bytes in function 'bpmp_debug_store' [-Werror,-Wframe-larger-than=]
static ssize_t bpmp_debug_store(struct file *file, const char __user *buf,

It should be possible to rearrange the code to not require two separate
buffers for the file name, but the easiest workaround is to use dynamic
allocation.

Fixes: 5e37b9c137ee ("firmware: tegra: Add support for in-band debug")
Link: https://lore.kernel.org/all/20201204193714.3134651-1-arnd@kernel.org/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[treding@nvidia.com: consistently return NULL on failure]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-07 20:52:17 +02:00
Dongliang Mu
4ed2f3545c memory: fsl_ifc: fix leak of irq and nand_irq in fsl_ifc_ctrl_probe
The error handling code of fsl_ifc_ctrl_probe is problematic. When
fsl_ifc_ctrl_init fails or request_irq of fsl_ifc_ctrl_dev->irq fails,
it forgets to free the irq and nand_irq. Meanwhile, if request_irq of
fsl_ifc_ctrl_dev->nand_irq fails, it will still free nand_irq even if
the request_irq is not successful.

Fix this by refactoring the error handling code.

Fixes: d2ae2e20fbdd ("driver/memory:Move Freescale IFC driver to a common driver")
Signed-off-by: Dongliang Mu <mudongliangabcd@gmail.com>
Link: https://lore.kernel.org/r/20210925151434.8170-1-mudongliangabcd@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-07 20:39:17 +02:00
Kai Song
31b88d85f0 memory: tegra210-emc: replace DEFINE_SIMPLE_ATTRIBUTE with
fix debugfs_simple_attr.cocci warning:
drivers/memory/tegra/tegra210-emc-core.c:1665:0-23: WARNING:tegra210_emc_debug_min_rate_fops
should be defined with DEFINE_DEBUGFS_ATTRIBUTE

Commit 6fc5f1adf5a1 ("memory: tegra210-emc: replace
DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE") fixed the same
warning, but didn't fix all matches in this file at once.

Signed-off-by: Kai Song <songkai01@inspur.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20211005043514.9650-1-songkai01@inspur.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-07 20:37:33 +02:00
Geert Uytterhoeven
4a26df8e60 memory: renesas-rpc-if: RENESAS_RPCIF should select RESET_CONTROLLER
The Renesas RPC-IF driver calls devm_reset_control_get_exclusive(),
which returns -ENOTSUPP if CONFIG_RESET_CONTROLLER is not enabled.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/e443aa66d146da5646b7ebece8876545b8621063.1633447756.git.geert+renesas@glider.be
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-07 20:36:12 +02:00
Yang Yingliang
982ca19a09 memory: tegra186-emc: Fix error return code in tegra186_emc_probe()
Return the error code when command fails.

Fixes: 13324edbe926 ("memory: tegra186-emc: Handle errors in BPMP response")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Link: https://lore.kernel.org/r/20210928021545.3774677-1-yangyingliang@huawei.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-07 20:32:33 +02:00
Christophe JAILLET
986b509470 soc/tegra: Fix an error handling path in tegra_powergate_power_up()
If an error occurs after a successful tegra_powergate_enable_clocks()
call, it must be undone by a tegra_powergate_disable_clocks() call, as
already done in the below and above error handling paths of this function.

Update the 'goto' to branch at the correct place of the error handling
path.

Fixes: a38045121bf4 ("soc/tegra: pmc: Add generic PM domain support")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-07 20:01:54 +02:00
Lucas Stach
926e57c065 soc: imx: imx8m-blk-ctrl: add DISP blk-ctrl
This adds the description for the i.MX8MM disp blk-ctrl.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06 20:13:51 +08:00
Lucas Stach
2684ac05a8 soc: imx: add i.MX8M blk-ctrl driver
This adds a driver for the blk-ctrl blocks found in the i.MX8M* line of
SoCs. The blk-ctrl is a top-level peripheral located in the various *MIX
power domains and interacts with the GPC power controller to provide the
peripherals in the power domain access to the NoC and ensures that those
peripherals are properly reset when their respective power domain is
brought back to life.

Software needs to do different things to make the bus handshake happen
after the GPC *MIX domain is powered up and before it is powered down.
As the requirements are quite different between the various blk-ctrls
there is a callback function provided to hook in the proper sequence.

The peripheral domains are quite uniform, they handle the soft clock
enables and resets in the blk-ctrl address space and sequencing with the
upstream GPC power domains.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06 20:13:47 +08:00
Lucas Stach
da4112230f soc: imx: gpcv2: support system suspend/resume
Our usage of runtime PM to control the hierarchy of power domains is
slightly unusual and means that powering up a domain may fail in early
system resume, as runtime PM is still disallowed at this stage.

However the system suspend/resume path takes care of powering down/up
the power domains in the order defined by the device parent/child and
power-domain provider/consumer hierarachy. So we can just runtime
resume all our power-domain devices to allow the power-up to work
properly in the resume path. System suspend will still disable all
domains as intended.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06 20:13:45 +08:00
Lucas Stach
656ade7aa4 soc: imx: gpcv2: keep i.MX8M* bus clocks enabled
Annotate the domains with bus clocks to keep those clocks enabled
as long as the domain is active.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06 20:13:42 +08:00
Lucas Stach
18c98573a4 soc: imx: gpcv2: add domain option to keep domain clocks enabled
Some of the MIX domains are using clocks to drive the bus bridges. Those
must be enabled at all times, as long as the domain is powered up and
they don't have any other consumer than the power domain. Add an option
to keep the clocks attached to a domain enabled as long as the domain
is power up and only disable them after the domain is powered down.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06 20:13:39 +08:00
Lucas Stach
fadf79a07b soc: imx: gpcv2: add lockdep annotation
Some of the GPCv2 power domains are nested inside each other without
visibility to lockdep at the genpd level, as they are in separate
driver instances and don't have a parent/child power-domain relationship.

Add a subclass annotation to the nested domains to let lockdep know that
it is okay to take the genpd lock in a nested fashion.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06 20:13:23 +08:00
Tony Lindgren
1b1da99b84 bus: ti-sysc: Fix variable set but not used warning for reinit_modules
Fix drivers/bus/ti-sysc.c:2494:13: error: variable 'error' set but not
used introduced by commit 9d881361206e ("bus: ti-sysc: Add quirk handling
for reinit on context lost").

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-10-06 08:38:09 +03:00
Dmitry Osipenko
bdb1ffdad3 cpuidle: tegra: Check whether PMC is ready
Check whether PMC is ready before proceeding with the cpuidle registration.
This fixes racing with the PMC driver probe order, which results in a
disabled deepest CC6 idling state if cpuidle driver is probed before the
PMC.

Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-05 19:11:40 +02:00
Dmitry Osipenko
faae6c9f2e cpuidle: tegra: Enable compile testing
Enable compile testing of tegra-cpuidle driver.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-05 19:11:40 +02:00
Thierry Reding
a602affa13 Merge branch 'for-5.16/soc' into for-5.16/cpuidle 2021-10-05 19:11:21 +02:00
Thierry Reding
f083c4b1f8 Merge branch 'for-5.16/clk' into for-5.16/cpuidle 2021-10-05 19:10:57 +02:00
Thierry Reding
4ad81f6ef8 clk: tegra: Add stubs needed for compile testing
These stubs are needed to allow the tegra-cpuidle driver to be
compile-tested.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-05 19:08:11 +02:00
Arnd Bergmann
61259f9ea0 Renesas driver updates for v5.16
- Initial support for the new R-Car H3e, M3e, M3Ne(-2G), D3e, E3e, and
     H3Ne SoCs.
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Merge tag 'renesas-drivers-for-v5.16-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers

Renesas driver updates for v5.16

  - Initial support for the new R-Car H3e, M3e, M3Ne(-2G), D3e, E3e, and
    H3Ne SoCs.

* tag 'renesas-drivers-for-v5.16-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: Identify more R-Car Gen3e SoCs

Link: https://lore.kernel.org/r/cover.1633081156.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-05 16:33:27 +02:00
Lucas Stach
2b2f106eb5 Revert "soc: imx: gpcv2: move reset assert after requesting domain power up"
This reverts commit a77ebdd9f553. It turns out that the VPU domain has no
different requirements, even though the downstream ATF implementation seems
to suggest otherwise. Powering on the domain with the reset asserted works
fine. As the changed sequence has caused sporadic issues with the GPU
domains, just revert the change to go back to the working sequence.

Cc: <stable@vger.kernel.org> # 5.14
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mm-beacon
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-05 14:29:19 +08:00
Lucas Stach
8da8bd5399 soc: imx: gpcv2: allow to disable individual power domains
Some board designs don't supply power to all of the power domains,
as they are not used anyways. In that case we must make sure to
not touch those power domains at all, as trying to power up a
domain that has no power supplied to it will obviously end in a
system crash. Allow to disable those domains via the standard DT
status property.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-By: Tim Harvey <tharvey@gateworks.com>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-05 14:27:52 +08:00
Ezequiel Garcia
f617a87176 imx: soc: Select REGMAP_MMIO
The imx-gpcv2 driver needs Regmap MMIO. Select it, and fix:

drivers/soc/imx/gpcv2.c:420:34: error: array type has incomplete element type ‘struct regmap_range’
  420 | static const struct regmap_range imx7_yes_ranges[] = {
      |                                  ^~~~~~~~~~~~~~~
drivers/soc/imx/gpcv2.c:421:17: error: implicit declaration of function ‘regmap_reg_range’; did you mean ‘remap_pfn_range’? [-Werror=implicit-function-declaration]
  421 |                 regmap_reg_range(GPC_LPCR_A_CORE_BSC,
      |                 ^~~~~~~~~~~~~~~~
      |                 remap_pfn_range

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-05 13:54:44 +08:00
Dmitry Osipenko
ceba814b37 soc/tegra: pmc: Expose USB regmap to all SoCs
All Tegra SoCs prior to Tegra186 have USB power controls within the Power
Management controller. These controls need to be configured by USB driver.
Expose the regmap to these SoCs.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-04 23:11:09 +02:00
Dmitry Osipenko
33110589a3 soc/tegra: pmc: Disable PMC state syncing
Disable PMC state syncing in order to ensure that we won't break older
kernels once device-trees will be updated with the addition of the power
domains. This also allows to apply device-tree PM patches independently
from the driver patches.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-04 22:10:54 +02:00
Dmitry Osipenko
0d7281b27a soc/tegra: pm: Make stubs usable for compile testing
The PM stubs need to depend on ARCH_TEGRA in order to be usable for
compile-testing of tegra-cpuidle driver. Add the dependency.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-04 21:27:40 +02:00
Dmitry Osipenko
aa54686e28 soc/tegra: irq: Add stubs needed for compile testing
Add stubs needed for compile-testing of tegra-cpuidle driver.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-04 21:27:21 +02:00
Dmitry Osipenko
45e934407b soc/tegra: fuse: Add stubs needed for compile testing
Add stubs needed for compile-testing of tegra-cpuidle driver.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-04 21:27:04 +02:00
Marek Vasut
19791f518f soc: imx: gpcv2: Set both GPC_PGC_nCTRL(GPU_2D|GPU_3D) for MX8MM GPU domain
To bring up the MX8MM GPU domain, it is necessary to configure both
GPC_PGC_nCTRL(GPU_2D) and GPC_PGC_nCTRL(GPU_3D) registers. Without
this configuration, the system might hang on boot when bringing up
the GPU power domain. This is sporadically observed on multiple
disparate systems.

Add the GPU3D bit into MX8MM GPU domain pgc bitfield, so that both
GPC_PGC_nCTRL(GPU_2D) and GPC_PGC_nCTRL(GPU_3D) registers are
configured when bringing up the GPU domain. This fixes the sporadic
hang.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-04 15:53:57 +08:00
Marek Vasut
34a01d9ea7 soc: imx: gpcv2: Turn domain->pgc into bitfield
There is currently the MX8MM GPU domain, which is in fact a composite domain
for both GPU2D and GPU3D. To correctly configure this domain, it is necessary
to control both GPC_PGC_nCTRL(GPU_2D) and GPC_PGC_nCTRL(GPU_3D) at the same
time. This is currently not possible.

Turn the domain->pgc from value into bitfield and use for_each_set_bit() to
iterate over all bits set in domain->pgc when configuring GPC_PGC_nCTRL
register array. This way it is possible to configure all GPC_PGC_nCTRL
registers required in a particular domain.

This is a preparatory patch, no functional change.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-04 15:53:01 +08:00
Florian Fainelli
13f995ceb4 memory: brcmstb_dpfe: Allow building Broadcom STB DPFE as module
Allow building the Broadcom STB DPFE driver as a module, it is already a
platform driver proper with all of the resource releasing device
managed.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Markus Mayer <mmayer@broadcom.com>
Link: https://lore.kernel.org/r/20210924031459.8911-1-f.fainelli@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-30 13:49:01 +02:00