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Define connection bindings (external PHY connections and internal links)
for the ENETC on-chip ethernet controllers.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
useful to investigate performance issues. By Kimberly Brown.
2. Switching to the new generic UUID API, by Andy Shevchenko.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEE4n5dijQDou9mhzu83qZv95d3LNwFAlx5S9AACgkQ3qZv95d3
LNwZ3Q//Z4LbaJf8WQjym1N5/akdhw3q9WL6RDn2o8tqNcaQ5OTpUoiYLjpMdtkr
pr7YV3/7K0IJS2AnExQ937e+OJ0FyFeXBIGKbaMgj4Z99k0ZwL90aUobj9/4En4P
9HsKR1nqpYr/cetp9MquO8b8J/kocfU4CJm50RnzxgURgsULmAXY+HsfVMAyPVjJ
VLbXxPgcuRPTurUzhi5QvDNYHI3pmKJMK17TmeWxKeamLDBDvkfuFqo/U7c/k+cw
H66gY1Nni+PiYGAvS42COtEexpnhGn3xVZKxSpak9ZlP40DotQc1T9TLM45j3T8/
paGv20vI9c4yt9NDnTyEoTTdNBmnzq8+/rGJRv5aIeCeQfD3mL+c48fJrdhduK2l
3253nUfDGRR8KI/rLsLnN80Iey33/YUCy5LuxZy7eRY6xuf9zhzwvP4rKRaWbrqc
VbC4kNiwcOYcwqMnkfayDrmtc6M3HEoHAmXvtTzvOI7dntPTf2oDMszTzHzxtAHl
A6bEGXxaMTM/3AjvalThZbjEofyJ26HeZVxcDFApdjrJD//3Puo3XRL8iTLP06rN
iV6z21NcCjrCP5hmN691Jlg3mhvZsn1SKhPfnnv9IVJ9hc+KheGE2n1bcSYOVpig
eaFwn7GQnvYdS9KLZ2vKBhGWNwcJqmoTAk6toC80gdxe4Zeny3A=
=hDVS
-----END PGP SIGNATURE-----
Merge tag 'hyperv-next-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux into char-misc-next
Sasha writes:
1. Exopsing counters for state changes of channel ring buffers; this is
useful to investigate performance issues. By Kimberly Brown.
2. Switching to the new generic UUID API, by Andy Shevchenko.
* tag 'hyperv-next-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux:
Drivers: hv: vmbus: Expose counters for interrupts and full conditions
vmbus: Switch to use new generic UUID API
Use codespell to fix lots of typos over frontends.
Manually verified to avoid false-positives.
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Sugaya Taichi <sugaya.taichi@socionext.com> explains:
Here is the series of patches the initial support for SC2000(M10V) of
Milbeaut SoCs. "M10V" is the internal name of SC2000, so commonly used in
source code.
SC2000 is a SoC of the Milbeaut series. equipped with a DSP optimized for
computer vision. It also features advanced functionalities such as 360-degree,
real-time spherical stitching with multi cameras, image stabilization for
without mechanical gimbals, and rolling shutter correction. More detail is
below:
https://www.socionext.com/en/products/assp/milbeaut/SC2000.html
Specifications for developers are below:
- Quad-core 32bit Cortex-A7 on ARMv7-A architecture
- NEON support
- DSP
- GPU
- MAX 3GB DDR3
- Cortex-M0 for power control
- NAND Flash Interface
- SD UHS-I
- SD UHS-II
- SDIO
- USB2.0 HOST / Device
- USB3.0 HOST / Device
- PCI express Gen2
- Ethernet Engine
- I2C
- UART
- SPI
- PWM
Support is quite minimal for now, since it only includes timer, clock,
pictrl and serial controller drivers, so we can only boot to userspace
through initramfs. Support for the other peripherals will come eventually.
* milbeaut/newsoc:
ARM: multi_v7_defconfig: add ARCH_MILBEAUT and ARCH_MILBEAUT_M10V
ARM: configs: Add Milbeaut M10V defconfig
ARM: dts: milbeaut: Add device tree set for the Milbeaut M10V board
clocksource/drivers/timer-milbeaut: Introduce timer for Milbeaut SoCs
dt-bindings: timer: Add Milbeaut M10V timer description
ARM: milbeaut: Add basic support for Milbeaut m10v SoC
dt-bindings: Add documentation for Milbeaut SoCs
dt-bindings: arm: Add SMP enable-method for Milbeaut
dt-bindings: sram: milbeaut: Add binding for Milbeaut smp-sram
Link: https://lore.kernel.org/linux-arm-kernel/1551243056-10521-1-git-send-email-sugaya.taichi@socionext.com/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds a DT binding documentation for the M10V and its evaluation
board.
Signed-off-by: Sugaya Taichi <sugaya.taichi@socionext.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds a compatible string "socionext,milbeaut-m10v-smp"
for Milbeaut M10V to the 32 bit ARM CPU device tree binding.
Signed-off-by: Sugaya Taichi <sugaya.taichi@socionext.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Milbeaut M10V SoC needs a part of sram for smp, so this adds the
M10V sram compatible and binding.
Signed-off-by: Sugaya Taichi <sugaya.taichi@socionext.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add vendor prefix for feiyang, known as
Shenzhen Fly Young Technology Co.,LTD. a known producer for LCD modules.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Add vendor prefix for techstar, known as
Shenzhen Techstar Electronics Co., Ltd. a known producer for LCD modules.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Add missing semicolon in example for Sitronix ST7735R display panels.
Cc: Rob Herring <robh@kernel.org>
Cc: Noralf Trønnes <noralf@tronnes.org>
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Reviewed-by: Noralf Trønnes <noralf@tronnes.org>
Signed-off-by: Rob Herring <robh@kernel.org>
On the Fujitsu-A64FX cores ver(1.0, 1.1), memory access may cause
an undefined fault (Data abort, DFSC=0b111111). This fault occurs under
a specific hardware condition when a load/store instruction performs an
address translation. Any load/store instruction, except non-fault access
including Armv8 and SVE might cause this undefined fault.
The TCR_ELx.NFD1 bit is used by the kernel when CONFIG_RANDOMIZE_BASE
is enabled to mitigate timing attacks against KASLR where the kernel
address space could be probed using the FFR and suppressed fault on
SVE loads.
Since this erratum causes spurious exceptions, which may corrupt
the exception registers, we clear the TCR_ELx.NFDx=1 bits when
booting on an affected CPU.
Signed-off-by: Zhang Lei <zhang.lei@jp.fujitsu.com>
[Generated MIDR value/mask for __cpu_setup(), removed spurious-fault handler
and always disabled the NFDx bits on affected CPUs]
Signed-off-by: James Morse <james.morse@arm.com>
Tested-by: zhang.lei <zhang.lei@jp.fujitsu.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Another batch of changes for ASoC, no big core changes - it's mainly
small fixes and improvements for individual drivers.
- A big refresh and cleanup of the Samsung drivers, fixing a number of
issues which allow the driver to be used with a wider range of
userspaces.
- Fixes for the Intel drivers to make them more standard so less likely
to get bitten by core issues.
- New driver for Cirrus Logic CS35L26.
-----BEGIN PGP SIGNATURE-----
iQFHBAABCgAxFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAlx3z7ETHGJyb29uaWVA
a2VybmVsLm9yZwAKCRAk1otyXVSH0H5QB/9jwKEwOdk6ynoFUpQwXPPkQl7CGkIh
P8J3OMTt+U4FNOrVG2S7xgUl69ZoaLm9rS/PHVrMV5krSLqY//2CTvF068qDBBlj
haBxgeRbe4pwLZPfFUnWvn6v1rdvNCXzDG/be9jGPJjDcm6wK44VJQWkPbqTsh6O
ZORqvKn48D89W0DegG1B+4jvbietPkhA0+nHQXwsWZ+sfMcEV/AWWsE5FIQ7ucCC
bundBBncUFKMMp9whuhj2W9FO62LUd8OAM7ejis3hfKk9MsQWUy6vrcN1XgRCq47
4I0doB5o+WhsOGMTZMcuhFISCVaCDqbNqGuVbeK0sdonjc1xz0682jLo
=9rq8
-----END PGP SIGNATURE-----
Merge tag 'asoc-v5.1-2' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next
ASoC: More changes for v5.1
Another batch of changes for ASoC, no big core changes - it's mainly
small fixes and improvements for individual drivers.
- A big refresh and cleanup of the Samsung drivers, fixing a number of
issues which allow the driver to be used with a wider range of
userspaces.
- Fixes for the Intel drivers to make them more standard so less likely
to get bitten by core issues.
- New driver for Cirrus Logic CS35L26.
mei driver for the me hdcp client, for use by drm/i915.
Including the following prep work:
- whitelist hdcp client in mei bus
- merge to include char-misc-next
- drm/i915 side of the mei_hdcp/i915 component interface
- component prep work (including one patch touching i915&snd-hda)
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEb4nG6jLu8Y5XI+PfTA9ye/CYqnEFAlx1qssACgkQTA9ye/CY
qnGXwg/9EetBXi/7fqK5DXcaTJvBzlHqizXbImnQ3vj9xM9pJRjuvKHL+zAQCIZ5
R9QA6kKVgtSmEp2MMBLaQHTQC6Vw3/BNZvbeeKXX9SboT4riRap4iXz8OdsXZTuq
m2EWHBCqI+qe9j47HFLqYpgPZ7J9TR071uqZXmvlHgdaiXivDByDtUNszay40sEw
GOq+bqjvMjf1hexS1YgImW7Qraw/s+dVfadxCxOk+ImpEtdH66gtn9Dthpml68VR
Aeb+vG9TW/RFNNh0JE8A+IH9S4s0vlJtlz9bkq8NlJ8mASuiyhr9KN8CvEvS+vX4
Qw3tJ8Fe1D9YRiGzveoIVP3MnuKPCh+RwIkospC0vIC9Lwrf4Xdkxkipu5lg+bD3
53iNdbyAi9SZo/TNJn7Agu2XqnO4G8y3nGyAO6jPH74oEfVpZV4OhE5w01M/2Qy0
gWDivKWP3EC1i9W7HA8LtxqE6NwhajHd6goHrshEPf2A5FL8f7IlYF+mwDv4GYUt
/MNr3+iiSJLJUT48kk6iFQrxyk+8TfyMZx/k2MzxGKcHCERjdne+fSa3yW6d0Pv4
Cod8qCNHy8zuKX3ZZx6Qh3xekwEAtFs9T+StYtBM0ua/PZpdCDSSIDbEG6XtrVI2
nQaUYuWfVH+xYmQSwsnQNhzGZOPzAkM6KkuhWM0eE3b3RDlFZb8=
=IvjR
-----END PGP SIGNATURE-----
Merge tag 'topic/mei-hdcp-2019-02-26' of git://anongit.freedesktop.org/drm/drm-intel into char-misc-next
Daniel writes:
mei-hdcp driver
mei driver for the me hdcp client, for use by drm/i915.
Including the following prep work:
- whitelist hdcp client in mei bus
- merge to include char-misc-next
- drm/i915 side of the mei_hdcp/i915 component interface
- component prep work (including one patch touching i915&snd-hda)
* tag 'topic/mei-hdcp-2019-02-26' of git://anongit.freedesktop.org/drm/drm-intel: (23 commits)
misc/mei/hdcp: Component framework for I915 Interface
misc/mei/hdcp: Closing wired HDCP2.2 Tx Session
misc/mei/hdcp: Enabling the HDCP authentication
misc/mei/hdcp: Verify M_prime
misc/mei/hdcp: Repeater topology verification and ack
misc/mei/hdcp: Prepare Session Key
misc/mei/hdcp: Verify L_prime
misc/mei/hdcp: Initiate Locality check
misc/mei/hdcp: Store the HDCP Pairing info
misc/mei/hdcp: Verify H_prime
misc/mei/hdcp: Verify Receiver Cert and prepare km
misc/mei/hdcp: Initiate Wired HDCP2.2 Tx Session
misc/mei/hdcp: Define ME FW interface for HDCP2.2
misc/mei/hdcp: Client driver for HDCP application
mei: bus: whitelist hdcp client
drm/audio: declaration of struct device
drm: helper functions for hdcp2 seq_num to from u32
drm/i915: MEI interface definition
drm/i915: header for i915 - MEI_HDCP interface
drm/i915: enum port definition is moved into i915_drm.h
...
When we use the bindings defined in Documentation/devicetree/bindings/mux
to define mdio mux in producer and consumer terms, it results in two
devices. one is mux producer and other is mux consumer.
Add the bindings needed for Mdio mux consumer devices.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The i.MX USB controller may drive the usb power line directly, but the
polarity depends on the board. Reset state of the polarity is low-active so
add this property to allow it to be high-active.
Signed-off-by: Philipp Puschmann <philipp.puschmann@emlix.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add this functionality, placing the descriptor being read in the actual
data buffer in the bio.
That is, for both read and write descriptors query upiu, we are using the
job's request_payload. This in turn, is mapped back in user land to the
applicable sg_io_v4 xferp: dout_xferp for write descriptor, and din_xferp
for read descriptor.
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Bean Huo <beanhuo@micron.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
When we had a write descriptor query upiu, we appended the descriptor right
after the bsg request. This was fine as the bsg driver allows to allocate
whatever buffer we needed in its job request.
Still, the proper way to deliver payload, however small (we only write
config descriptors of 144 bytes), is by using the job request payload data
buffer.
So change this ABI now, while ufs-bsg is still new, and nobody is actually
using it.
Signed-off-by: Avri Altman <avri.altman@wdc.com>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Bean Huo <beanhuo@micron.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
There are two USB PID/VID variations I've seen for this chip, and I want
to utilize the 'interrupts' property defined here already.
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
LS3 has a selectable current limit.
Change units to microamp in the example.
Signed-off-by: Christian Hohnstaedt <Christian.Hohnstaedt@wago.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Document device-tree settings of the load-switch LS2
in the tps65218 device.
Signed-off-by: Christian Hohnstaedt <Christian.Hohnstaedt@wago.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
In addition to MT7603E PCI devices, the driver supports the WLAN core on
MT7628/MT7688, which needs to be defined in DT.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
To avoid potential confusion, explicitly ignore "security=" when "lsm=" is
used on the command line, and report that it is happening.
Suggested-by: Tetsuo Handa <penguin-kernel@i-love.sakura.ne.jp>
Signed-off-by: Kees Cook <keescook@chromium.org>
Acked-by: Casey Schaufler <casey@schaufler-ca.com>
Acked-by: John Johansen <john.johansen@canonical.com>
Signed-off-by: James Morris <james.morris@microsoft.com>
Added an FAQ section in Documentation/networking/af_xdp.rst to help
first time users with common problems. As problems are getting
identified, entries will be added to the FAQ.
Signed-off-by: Magnus Karlsson <magnus.karlsson@intel.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
The separate GPHY Firmware loader driver is not used any more, the GPHY
firmware is now loaded by the GSWIP switch driver which also makes use
of the GPHY.
Remove the old unused GPHY firmware loader driver.
The GPHY firmware is useless without an Ethernet and switch driver, it
should not harm if loading this does not work for system using an old
device tree.
I am not aware of any vendor separating the device tree from the kernel
binary, it should be ok to remove this.
The code and the functionality form this separate GPHY firmware loader
was added to the gswip driver in commit 14fceff4771e ("net: dsa: Add
Lantiq / Intel DSA driver for vrx200")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: john@phrozen.org
Cc: netdev@vger.kernel.org
This adds device tree bindings for Analog Devices AD741x
as found in Gateway routers.
Cc: devicetree@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
- Fourth batch of fixes/cleanup to the raw NAND core impacting various
controller drivers (Sunxi, Marvell, MTK, TMIO, OMAP2).
- Checking the return code of nand_reset() and nand_readid_op().
- Removing ->legacy.erase and single_erase().
- Simplifying the locking.
- Several implicit fall through annotations.
Raw NAND controllers drivers changes:
- Fixing various possible object reference leaks (MTK, JZ4780, Atmel).
- ST:
* Adding support for STM32 FMC2 NAND flash controller.
- Meson:
* Adding support for Amlogic NAND flash controller.
- Denali:
* Several cleanup patches.
- Sunxi:
* Several cleanup patches.
- FSMC:
* Disabling NAND on remove().
* Resetting NAND timings on resume().
SPI-NAND drivers changes:
- Toshiba:
* Adding support for all Toshiba products.
- Macronix:
* Fixing ECC status read.
- Gigadevice:
* Adding support for GD5F1GQ4UExxG.
-----BEGIN PGP SIGNATURE-----
iQEzBAABCgAdFiEE9HuaYnbmDhq/XIDIJWrqGEe9VoQFAlxwE4kACgkQJWrqGEe9
VoRQVQf+OOkScM6ZbsO2GbMRe0ybMOCOyBXfojPEGtVv80gHHrAPRocLqWMB1Xdb
MSfm7j+lyZU1I8eYVvdYXby7s5FlVWbrh8NSnnwox1QusdmyBm7vcxc6st15Poy/
/WtjE+Cry49eIx5L/pmmNH3AIqMdvSRTJD7NgOYjo/SIq4GLR+KQEgt1VLp/KyO0
TGeMDIT3Q3+MXVwvUh3YlHUwNJ2jOpjpPW94QxD0mef/b9doUlkvrOdHs3JeGQzX
aiiqWI1nRBmjNs34wp7Dyf3G/feplKyi+IS/ghTiijAgwbWdRI7KxrPtyCUYiint
3XqVgZAF/sfFaKFMIiJBMzoLQB15dQ==
=VbaE
-----END PGP SIGNATURE-----
Merge tag 'nand/for-5.1' of git://git.infradead.org/linux-mtd into mtd/next
NAND core changes:
- Fourth batch of fixes/cleanup to the raw NAND core impacting various
controller drivers (Sunxi, Marvell, MTK, TMIO, OMAP2).
- Checking the return code of nand_reset() and nand_readid_op().
- Removing ->legacy.erase and single_erase().
- Simplifying the locking.
- Several implicit fall through annotations.
Raw NAND controllers drivers changes:
- Fixing various possible object reference leaks (MTK, JZ4780, Atmel).
- ST:
* Adding support for STM32 FMC2 NAND flash controller.
- Meson:
* Adding support for Amlogic NAND flash controller.
- Denali:
* Several cleanup patches.
- Sunxi:
* Several cleanup patches.
- FSMC:
* Disabling NAND on remove().
* Resetting NAND timings on resume().
SPI-NAND drivers changes:
- Toshiba:
* Adding support for all Toshiba products.
- Macronix:
* Fixing ECC status read.
- Gigadevice:
* Adding support for GD5F1GQ4UExxG.
Add supports-cqe optional property for MMC hosts.
This property is used to identify the specific host controller
supporting command queue.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Add pinctrls for 3V3 and 1V8 pad drive strength configuration for
Tegra210 sdmmc.
Tegra210 sdmmc has pad configuration registers in pinmux register
domain and handled thru pinctrl to pinmux device node.
Tegra186 and Tegra194 has pad configuration register with in the
SDMMC register domain itself and are handles thru drive strength
properties in sdmmc device node.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Add a imx6ull compatible string to be able to manage erratum ERR010450 on
i.MX6ULL.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
For Spreadtrum DMA engine, all channels are equal, which means slave can
request any channels with setting a unique slave id to trigger this channel.
Thus we can remove the channel id from device tree to assign the channel
dynamically, moreover we should add the slave id in device tree.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Add some phylink documentation to the networking book detailing how
to convert network drivers from phylib to phylink.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
Three conflicts, one of which, for marvell10g.c is non-trivial and
requires some follow-up from Heiner or someone else.
The issue is that Heiner converted the marvell10g driver over to
use the generic c45 code as much as possible.
However, in 'net' a bug fix appeared which makes sure that a new
local mask (MDIO_AN_10GBT_CTRL_ADV_NBT_MASK) with value 0x01e0
is cleared.
Signed-off-by: David S. Miller <davem@davemloft.net>
Pull networking fixes from David Miller:
"Hopefully the last pull request for this release. Fingers crossed:
1) Only refcount ESP stats on full sockets, from Martin Willi.
2) Missing barriers in AF_UNIX, from Al Viro.
3) RCU protection fixes in ipv6 route code, from Paolo Abeni.
4) Avoid false positives in untrusted GSO validation, from Willem de
Bruijn.
5) Forwarded mesh packets in mac80211 need more tailroom allocated,
from Felix Fietkau.
6) Use operstate consistently for linkup in team driver, from George
Wilkie.
7) ThunderX bug fixes from Vadim Lomovtsev. Mostly races between VF
and PF code paths.
8) Purge ipv6 exceptions during netdevice removal, from Paolo Abeni.
9) nfp eBPF code gen fixes from Jiong Wang.
10) bnxt_en firmware timeout fix from Michael Chan.
11) Use after free in udp/udpv6 error handlers, from Paolo Abeni.
12) Fix a race in x25_bind triggerable by syzbot, from Eric Dumazet"
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (65 commits)
net: phy: realtek: Dummy IRQ calls for RTL8366RB
tcp: repaired skbs must init their tso_segs
net/x25: fix a race in x25_bind()
net: dsa: Remove documentation for port_fdb_prepare
Revert "bridge: do not add port to router list when receives query with source 0.0.0.0"
selftests: fib_tests: sleep after changing carrier. again.
net: set static variable an initial value in atl2_probe()
net: phy: marvell10g: Fix Multi-G advertisement to only advertise 10G
bpf, doc: add bpf list as secondary entry to maintainers file
udp: fix possible user after free in error handler
udpv6: fix possible user after free in error handler
fou6: fix proto error handler argument type
udpv6: add the required annotation to mib type
mdio_bus: Fix use-after-free on device_register fails
net: Set rtm_table to RT_TABLE_COMPAT for ipv6 for tables > 255
bnxt_en: Wait longer for the firmware message response to complete.
bnxt_en: Fix typo in firmware message timeout logic.
nfp: bpf: fix ALU32 high bits clearance bug
nfp: bpf: fix code-gen bug on BPF_ALU | BPF_XOR | BPF_K
Documentation: networking: switchdev: Update port parent ID section
...
This new methods is used to explicitly poll for I/O completion for an
iocb. It must be called for any iocb submitted asynchronously (that
is with a non-null ki_complete) which has the IOCB_HIPRI flag set.
The method is assisted by a new ki_cookie field in struct iocb to store
the polling cookie.
Reviewed-by: Hannes Reinecke <hare@suse.com>
Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
This callback was removed some time ago, also remove the documentation.
Fixes: 1b6dd556c304 ("net: dsa: Remove prepare phase for FDB")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This adds an optional regulator support (e.g. switchable supply) to the
pwm fan binding.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
The Tegra210 timer provides fourteen 29-bit timer counters and one 32-bit
timestamp counter. The TMRs run at either a fixed 1 MHz clock rate derived
from the oscillator clock (TMR0-TMR9) or directly at the oscillator clock
(TMR10-TMR13). Each TMR can be programmed to generate one-shot periodic,
or watchdog interrupts.
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
The i.MX GPT timer driver binding doc is out of date,
update it according to current GPT timer driver.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Update the binding for MT7629 SoC, which uses fallback compatible to
MT6765 SYST, so add more descriptions to distinguish it from the other
SoCs that use GPT.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
