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* Allow SDR timings to be nacked
* Bring support for NV-DDR timings which involved a number of small
preparation changes to bring new helpers, properly introduce NV-DDR
structures, fill them, differenciate them and pick the best timing set.
* Add the necessary infrastructure to parse the new gpio-cs property
which aims at enlarging the number of available CS when a hardware
controller is too constrained.
* Update dead URL
* Silence static checker warning in nand_setup_interface()
* BBT:
- Fix corner case in bad block table handling
* onfi:
- Use more recent ONFI specification wording
- Use the BIT() macro when possible
Raw NAND controller drivers:
* Atmel:
- Ensure the data interface is supported.
* Arasan:
- Finer grain NV-DDR configuration
- Rename the data interface register
- Use the right DMA mask
- Leverage additional GPIO CS
- Ensure proper configuration for the asserted target
- Add support for the NV-DDR interface
- Fix a macro parameter
* brcmnand:
- Convert bindings to json-schema
* OMAP:
- Various fixes and style improvements
- Add larger page NAND chips support
* PL35X:
- New driver
* QCOM:
- Avoid writing to obsolete register
- Delete an unneeded bool conversion
- Allow override of partition parser
* Marvell:
- Minor documentation correction
- Add missing clk_disable_unprepare() on error in marvell_nfc_resume()
* R852:
- Use DEVICE_ATTR_RO() helper macro
* MTK:
- Remove redundant dev_err call in mtk_ecc_probe()
* HISI504:
- Remove redundant dev_err call in probe
SPI-NAND core:
* Light reorganisation for the introduction of a core resume handler
* Fix double counting of ECC stats
SPI-NAND manufacturer drivers:
* Macronix:
- Add support for serial NAND flash
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Merge tag 'nand/for-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux into mtd/next
Raw NAND core:
* Allow SDR timings to be nacked
* Bring support for NV-DDR timings which involved a number of small
preparation changes to bring new helpers, properly introduce NV-DDR
structures, fill them, differenciate them and pick the best timing set.
* Add the necessary infrastructure to parse the new gpio-cs property
which aims at enlarging the number of available CS when a hardware
controller is too constrained.
* Update dead URL
* Silence static checker warning in nand_setup_interface()
* BBT:
- Fix corner case in bad block table handling
* onfi:
- Use more recent ONFI specification wording
- Use the BIT() macro when possible
Raw NAND controller drivers:
* Atmel:
- Ensure the data interface is supported.
* Arasan:
- Finer grain NV-DDR configuration
- Rename the data interface register
- Use the right DMA mask
- Leverage additional GPIO CS
- Ensure proper configuration for the asserted target
- Add support for the NV-DDR interface
- Fix a macro parameter
* brcmnand:
- Convert bindings to json-schema
* OMAP:
- Various fixes and style improvements
- Add larger page NAND chips support
* PL35X:
- New driver
* QCOM:
- Avoid writing to obsolete register
- Delete an unneeded bool conversion
- Allow override of partition parser
* Marvell:
- Minor documentation correction
- Add missing clk_disable_unprepare() on error in marvell_nfc_resume()
* R852:
- Use DEVICE_ATTR_RO() helper macro
* MTK:
- Remove redundant dev_err call in mtk_ecc_probe()
* HISI504:
- Remove redundant dev_err call in probe
SPI-NAND core:
* Light reorganisation for the introduction of a core resume handler
* Fix double counting of ECC stats
SPI-NAND manufacturer drivers:
* Macronix:
- Add support for serial NAND flash
There is no reason to be limited to 4kiB page NAND chips just because
this is the maximum length the ELM is able to handle in one go. Just
call the ELM several times and it will process as many data as needed.
Here we introduce the concept of ECC page (which is at most 4kiB). The
ELM will be sought as many times as there are ECC pages.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Ryan Barnett <ryan.barnett@collins.com>
Link: https://lore.kernel.org/linux-mtd/20210610134906.3503303-6-miquel.raynal@bootlin.com
The macro BADBLOCK_MARKER_LENGTH is pretty long and could be reduced to
BBM_LEN which is more handy to use in the code.
This is a purely cosmetic change and is only done to avoid further
change to contain 100+ char lines just because of this definition.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210610134906.3503303-3-miquel.raynal@bootlin.com
This hardware controller is embedded in XilinX Zynq-7000 SoCs and has
partial support for Hamming ECC correction.
This work is inspired from the original contributions of Punnaiah
Choudary Kalluri and Naga Sureshkumar Relli.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Michael Walle <michael@walle.cc> [on zynq-7000]
Link: https://lore.kernel.org/linux-mtd/20210610082040.2075611-19-miquel.raynal@bootlin.com
After power up, all SPI NAND's blocks are locked. Only read operations
are allowed, write and erase operations are forbidden.
The SPI NAND framework unlocks all the blocks during its initialization.
During a standby low power, the memory is powered down, losing its
configuration.
During the resume, the QSPI driver state is restored but the SPI NAND
framework does not reconfigured the memory.
This patch adds SPI-NAND MTD PM handlers for resume ops.
SPI NAND resume op re-initializes SPI NAND flash to its probed state.
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210602094913.26472-4-patrice.chotard@foss.st.com
There are 2 timing registers:
- "data interface"
- "timings"
So far, the "data interface" register was named "timings" which begins
misleading when bringing support for the "timings" register. Rename it
to "data_iface".
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210527084959.208804-1-miquel.raynal@bootlin.com
Without the use of le16_to_cpu(), these accesses would have been wrong
on a big-endian machine.
Reported-by: kernel test robot <lkp@intel.com>
Fixes: 45606518f961 ("mtd: rawnand: Add onfi_fill_nvddr_interface_config() helper")
Fixes: 9310668fb60a ("mtd: rawnand: Retrieve NV-DDR timing modes from the ONFI parameter page")
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210527084913.208635-1-miquel.raynal@bootlin.com
Xilinx ZynqMP SoC and the Arasan controller support 64-bit DMA
addressing. Define the right mask otherwise the default is 32
and some accesses may overflow the default mask.
Reported-by: Jorge Courett <jorge.courett@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Jorge Courett <jorge.courett@gmail.com>
Link: https://lore.kernel.org/linux-mtd/20210527084548.208429-1-miquel.raynal@bootlin.com
Convert ti,am654-hbmc.txt to YAML schema for better checks and
validations of DT.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Fixes scripts/checkpatch.pl warning:
WARNING: Possible unnecessary 'out of memory' message
Remove it can help us save a bit of memory.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210610022850.15397-1-thunder.leizhen@huawei.com
Fixes scripts/checkpatch.pl warning:
WARNING: Possible unnecessary 'out of memory' message
Remove it can help us save a bit of memory.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210610022631.15344-1-thunder.leizhen@huawei.com
Fixes scripts/checkpatch.pl warning:
WARNING: Possible unnecessary 'out of memory' message
Remove it can help us save a bit of memory.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210610022416.15291-1-thunder.leizhen@huawei.com
Fixes scripts/checkpatch.pl warning:
WARNING: Possible unnecessary 'out of memory' message
Remove it can help us save a bit of memory.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210610022239.15238-1-thunder.leizhen@huawei.com
Fixes scripts/checkpatch.pl warning:
WARNING: Possible unnecessary 'out of memory' message
Remove it can help us save a bit of memory.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210610022100.15185-1-thunder.leizhen@huawei.com
Fixes scripts/checkpatch.pl warning:
WARNING: Possible unnecessary 'out of memory' message
Remove it can help us save a bit of memory.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210610021400.15132-1-thunder.leizhen@huawei.com
Fixes scripts/checkpatch.pl warning:
WARNING: Possible unnecessary 'out of memory' message
Remove it can help us save a bit of memory.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210610021201.15076-1-thunder.leizhen@huawei.com
Fixes scripts/checkpatch.pl warning:
WARNING: Possible unnecessary 'out of memory' message
Remove it can help us save a bit of memory.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210610020958.15023-1-thunder.leizhen@huawei.com
Fixes scripts/checkpatch.pl warning:
WARNING: Possible unnecessary 'out of memory' message
Remove it can help us save a bit of memory.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210610020620.14970-1-thunder.leizhen@huawei.com
Fixes scripts/checkpatch.pl warning:
WARNING: Possible unnecessary 'out of memory' message
Remove it can help us save a bit of memory.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210610020130.14917-1-thunder.leizhen@huawei.com
Fixes scripts/checkpatch.pl warning:
WARNING: Possible unnecessary 'out of memory' message
Remove it can help us save a bit of memory.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210610015052.14864-1-thunder.leizhen@huawei.com
Compared with the definition of DEVICE_ATTR_RO/RW(), the read and write
function names of the sysfs attribute have an additional "mtd_" prefix.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210603125323.12142-2-thunder.leizhen@huawei.com
In the raw NAND world, ECC engines increment ecc_stats and the final
caller is responsible for returning -EBADMSG if the verification
failed.
In the SPI-NAND world it was a bit different until now because there was
only one possible ECC engine: the on-die one. Indeed, the
spinand_mtd_read() call was incrementing the ecc_stats counters
depending on the outcome of spinand_check_ecc_status() directly.
So now let's split the logic like this:
- spinand_check_ecc_status() is specific to the SPI-NAND on-die engine
and is kept very simple: it just returns the ECC status (bonus point:
the content of this helper can be overloaded).
- spinand_ondie_ecc_finish_io_req() is the caller of
spinand_check_ecc_status() and will increment the counters and
eventually return -EBADMSG.
- spinand_mtd_read() is not tied to the on-die ECC implementation and
should be able to handle results coming from other ECC engines: it has
the responsibility of returning the maximum number of bitflips which
happened during the entire operation as this is the only helper that
is aware that several pages may be read in a row.
Fixes: 945845b54c9c ("mtd: spinand: Instantiate a SPI-NAND on-die ECC engine")
Reported-by: YouChing Lin <ycllin@mxic.com.tw>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: YouChing Lin <ycllin@mxic.com.tw>
Link: https://lore.kernel.org/linux-mtd/20210527084345.208215-1-miquel.raynal@bootlin.com
Bigger work around ARM Primecell PL35x SMC memory controller driver by
Miquel Raynal built on previous series from Naga Sureshkumar Relli.
This includes bindings cleanup and correction, converting these to
dtschema and several cleanyps in pl353-smc driver.
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Merge tag 'memory-controller-drv-pl353-5.14' into nand/next
Memory controller drivers for v5.14 - PL353
Bigger work around ARM Primecell PL35x SMC memory controller driver by
Miquel Raynal built on previous series from Naga Sureshkumar Relli.
This includes bindings cleanup and correction, converting these to
dtschema and several cleanyps in pl353-smc driver.
Add Naga from Xilinx and myself responsible of this driver.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-16-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
APER does not mean anything, while it seems legitimate to call this
clock the AXI peripheral clock.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-14-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
There is no point in having all these definitions at the SMC bus level,
these are extremely tight to the NAND controller driver implementation,
are not particularly generic, imply more boilerplate than needed, do
not really follow the device model by receiving no argument and some of
them are actually buggy.
Let's get rid of these right now as there is no current user and keep
this driver at a simple level: only the SMC bare initializations.
The NAND controller driver which I am going to introduce will take care
of redefining properly all these helpers and using them directly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-13-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
A goto label is better named
do_something:
than
out_something_to_do:
Use the former wording and really describe what the jump involves.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-12-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
To be fully valid, the NAND controller node in the example should be
named nand-controller instead of flash, should be at the address @0,0
instead of @e1000000 and should have a couple of:
- #address-cells
- #size-cells
properties.
The label is being renamed nfc0 as well which is more usual than nand_0.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-8-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
These nodes are given as examples and are not described nor used
anywhere else. There is also no hardware of my knowledge compatible with
these yet. If we want to be backward compatible, then we should avoid
partially describing nodes and their content while there are no users.
Plus, the examples are wrong (the addresses should be updated) so
let's drop them before converting this file to yaml (only the NAND node,
which will be fixed in the example and described somewhere else is
kept).
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610082040.2075611-7-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
