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Working on sound support I noticed the Apalis T30 Evaluation board
device tree missing the more generic Apalis T30 compatible string.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Indentation of the clock property used a hodgepodge of tabs and spaces.
Make them more consistent (tabs for indentation followed by spaces for
alignment).
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The GPIO pin connected to card detect was inverted twice: once by
the argument to the GPIO line itself where it was magically marked
as active low by the flag GPIO_ACTIVE_LOW (0x01) in the third cell,
and also marked active low AGAIN by explicitly stating
"cd-inverted" (a deprecated method).
After commit 78f87df2b4f8760954d7d80603d0cfcbd4759683
"mmc: mmci: Use the common mmc DT parser" this results in the
line being inverted twice so it was effectively uninverted, while
the old code would not have this effect, instead disregarding the
flag on the GPIO line altogether, which is a bug. I admit the
semantics may be unclear but inverting twice is as good a
definition as any on how this should work.
So fix up the buggy device tree. Use proper #includes so the DTS
is clear and readable.
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
* Add legacy clocks for SCI for SoCs that do not yet have CCF support.
This is to allow timer devices to be enabled using DT and
will be removed after CCF support is added for each SoC.
This is in keeping with the approach taken for enabling
SCI (serial) devices using DT on these SoCs.
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Merge tag 'renesas-clock3-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Merge "Third Round of Renesas ARM Based SoC Clock Updates for v3.17" from Simon
Horman:
Third Round of Renesas ARM Based SoC Clock Updates for v3.17
* Add legacy clocks for SCI for SoCs that do not yet have CCF support.
This is to allow timer devices to be enabled using DT and
will be removed after CCF support is added for each SoC.
This is in keeping with the approach taken for enabling
SCI (serial) devices using DT on these SoCs.
* tag 'renesas-clock3-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: sh73a0: add CMT1 clock support for DT
ARM: shmobile: r8a7740: add CMT1 clock support for DT
ARM: shmobile: r8a73a4: add CMT1 clock support for DT
ARM: shmobile: r8a7740: add TMU clock support for DT
ARM: shmobile: r8a7778: add TMU clock support for DT
Signed-off-by: Olof Johansson <olof@lixom.net>
Exynos has buggy firmware that puts bad data into the memory node. Commit
1c2f87c2 (ARM: Get rid of meminfo) exposed the bug by dropping the artificial
upper bound on the number of memory banks that can be added. Exynos fails to
boot after that commit. This branch fixes it by splitting the early DT parse
function and inserting a fixup hook. Exynos uses the hook to correct the DT
before parsing memory regions.
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Merge tag 'devicetree-for-linus' of git://git.secretlab.ca/git/linux
Pull Exynos platform DT fix from Grant Likely:
"Device tree Exynos bug fix for v3.16-rc7
This bug fix has been brewing for a while. I hate sending it to you
so late, but I only got confirmation that it solves the problem this
past weekend. The diff looks big for a bug fix, but the majority of
it is only executed in the Exynos quirk case. Unfortunately it
required splitting early_init_dt_scan() in two and adding quirk
handling in the middle of it on ARM.
Exynos has buggy firmware that puts bad data into the memory node.
Commit 1c2f87c22566 ("ARM: Get rid of meminfo") exposed the bug by
dropping the artificial upper bound on the number of memory banks that
can be added. Exynos fails to boot after that commit. This branch
fixes it by splitting the early DT parse function and inserting a
fixup hook. Exynos uses the hook to correct the DT before parsing
memory regions"
* tag 'devicetree-for-linus' of git://git.secretlab.ca/git/linux:
arm: Add devicetree fixup machine function
of: Add memory limiting function for flattened devicetrees
of: Split early_init_dt_scan into two parts
often during boot with Ubuntu 14.04 PV guests.
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Merge tag 'stable/for-linus-3.16-rc7-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip
Pull Xen fix from David Vrabel:
"Fix BUG when trying to expand the grant table. This seems to occur
often during boot with Ubuntu 14.04 PV guests"
* tag 'stable/for-linus-3.16-rc7-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip:
x86/xen: safely map and unmap grant frames when in atomic context
arch_gnttab_map_frames() and arch_gnttab_unmap_frames() are called in
atomic context but were calling alloc_vm_area() which might sleep.
Also, if a driver attempts to allocate a grant ref from an interrupt
and the table needs expanding, then the CPU may already by in lazy MMU
mode and apply_to_page_range() will BUG when it tries to re-enable
lazy MMU mode.
These two functions are only used in PV guests.
Introduce arch_gnttab_init() to allocates the virtual address space in
advance.
Avoid the use of apply_to_page_range() by using saving and using the
array of PTE addresses from the alloc_vm_area() call (which ensures
that the required page tables are pre-allocated).
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Commit 1c2f87c22566cd057bc8cde10c37ae9da1a1bb76
(ARM: 8025/1: Get rid of meminfo) dropped the upper bound on
the number of memory banks that can be added as there was no
technical need in the kernel. It turns out though, some bootloaders
(specifically the arndale-octa exynos boards) may pass invalid memory
information and rely on the kernel to not parse this data. This is a
bug in the bootloader but we still need to work around this.
Work around this by introducing a dt_fixup function. This function
gets called before the flattened devicetree is scanned for memory
and the like. In this fixup function for exynos, limit the maximum
number of memory regions in the devicetree.
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Tested-by: Andreas Färber <afaerber@suse.de>
[glikely: Added a comment and fixed up function name]
Signed-off-by: Grant Likely <grant.likely@linaro.org>
This patch add missing pinctrl for uart0/1 for Exynos3250. The gpio pin (
uart0_data, uart0_fctl, uart1_data) is only used for UART IP.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch removes duplicat 'interrupt-parent' property for Exynos3250
because exynos3250.dtsi already defined 'interrupt-parent' property
as following:
In arch/arm/boot/dts/exynos3250.dtsi:
compatible = "samsung,exynos3250";
interrupt-parent = <&gic>;
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch add TMU (Thermal Management Unit) dt node to monitor the high
temperature for Exynos3250.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The IRQB interrupt pin of MAX77686 PMIC is connected to GPX3[2] pin of
Exynos5250 on the Exynos5250 SMDK board. Specify this connection using
interrupts property for the max77686 pmic node.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Move it from exynos5250-cros-common.dtsi to exynos5250-snow.dts.
Spring does not need it, it uses an Atmel maXTouch instead.
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Move it from exynos5250-cros-common.dtsi to exynos5250-snow.dts.
Spring does not need it, it uses an s5m8767 instead.
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The platforms selecting NEED_MACH_MEMORY_H defined the start address of
their physical memory in the respective <mach/memory.h>. With
ARM_PATCH_PHYS_VIRT=y (which is quite common today) this is useless
though because the definition isn't used but determined dynamically.
So remove the definitions from all <mach/memory.h> and provide the
Kconfig symbol PHYS_OFFSET with the respective defaults in case
ARM_PATCH_PHYS_VIRT isn't enabled.
This allows to drop the dependency of PHYS_OFFSET on !NEED_MACH_MEMORY_H
which prevents compiling an integrator nommu-kernel.
(CONFIG_PAGE_OFFSET which has "default PHYS_OFFSET if !MMU" expanded to
"0x" because CONFIG_PHYS_OFFSET doesn't exist as INTEGRATOR selects
NEED_MACH_MEMORY_H.)
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
A nice small set of bug fixes for arm-soc:
- two incorrect register addresses in DT files on shmobile and hisilicon
- one revert for a regression on omap
- one bug fix for a newly introduced pin controller binding
- one regression fix for the memory controller on omap
- one patch to avoid a harmless WARN_ON
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"A nice small set of bug fixes for arm-soc:
- two incorrect register addresses in DT files on shmobile and hisilicon
- one revert for a regression on omap
- one bug fix for a newly introduced pin controller binding
- one regression fix for the memory controller on omap
- one patch to avoid a harmless WARN_ON"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: dts: Revert enabling of twl configuration for n900
ARM: dts: fix L2 address in Hi3620
ARM: OMAP2+: gpmc: fix gpmc_hwecc_bch_capable()
pinctrl: dra: dt-bindings: Fix pull enable/disable
ARM: shmobile: r8a7791: Fix SD2CKCR register address
ARM: OMAP2+: l2c: squelch warning dump on power control setting
broken legacy code for omap1 and move things towards
device tree.
These patches were posted a while back, but I did not
realize I was supposed to merge the driver related
parts too. So apologies for a late pull request on
these changes.
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Merge tag 'omap-for-v3.17/mailbox-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers
Merge "late omap mailbox clean-up, driver parts" from Tony Lindgren:
Driver specific omap mailbox cleanup. Mostly to remove
broken legacy code for omap1 and move things towards
device tree.
These patches were posted a while back, but I did not
realize I was supposed to merge the driver related
parts too. So apologies for a late pull request on
these changes.
* tag 'omap-for-v3.17/mailbox-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
mailbox/omap: add a parent structure for every IP instance
mailbox/omap: remove the private mailbox structure
mailbox/omap: consolidate OMAP mailbox driver
mailbox/omap: simplify the fifo assignment by using macros
mailbox/omap: remove omap_mbox_type_t from mailbox ops
mailbox/omap: remove OMAP1 mailbox driver
mailbox/omap: use devm_* interfaces
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
On LPAE, each level 1 (pgd) page table entry maps 1GiB, and the level 2
(pmd) entries map 2MiB.
When the identity mapping is created on LPAE, the pgd pointers are copied
from the swapper_pg_dir. If we find that we need to modify the contents
of a pmd, we allocate a new empty pmd table and insert it into the
appropriate 1GB slot, before then filling it with the identity mapping.
However, if the 1GB slot covers the kernel lowmem mappings, we obliterate
those mappings.
When replacing a PMD, first copy the old PMD contents to the new PMD, so
that we preserve the existing mappings, particularly the mappings of the
kernel itself.
[rewrote commit message and added code comment -- rmk]
Fixes: ae2de101739c ("ARM: LPAE: Add identity mapping support for the 3-level page table format")
Signed-off-by: Konstantin Khlebnikov <k.khlebnikov@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
enabling of twl4030 PM features. Turns out more work is needed
before we can enable twl4030 PM on n900.
I did not notice this earlier as I have my n900 in a rack
and the display did not get enabled for device tree based booting
until for v3.16.
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Merge tag 'omap-for-v3.16/n900-regression' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge "omap n900 regression fix for v3.16 rc series" from Tony Lindgren:
Minimal regression fix for n900 display that got broken with
enabling of twl4030 PM features. Turns out more work is needed
before we can enable twl4030 PM on n900.
I did not notice this earlier as I have my n900 in a rack
and the display did not get enabled for device tree based booting
until for v3.16.
* tag 'omap-for-v3.16/n900-regression' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Revert enabling of twl configuration for n900
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
or the next one below it. This is intended to resolve some DSS problems.
Basic build, boot, and PM test results are available here:
http://www.pwsan.com/omap/testlogs/clock-b-v3.17/20140725061121/
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Merge tag 'for-v3.17/omap-clock-b' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.17/soc
Modify OMAP PLL rate rounding function to round to the exact rate requested
or the next one below it. This is intended to resolve some DSS problems.
Basic build, boot, and PM test results are available here:
http://www.pwsan.com/omap/testlogs/clock-b-v3.17/20140725061121/
If init_mm.brk is not section aligned, the LPAE fixup code will miss
updating the final PMD. Fix this by aligning map_end.
Fixes: a77e0c7b2774 ("ARM: mm: Recreate kernel mappings in early_paging_init()")
Cc: <stable@vger.kernel.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The fields are not used by the driver and will be removed from platform
data. Don't set them.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
There are no existing users for OMAP1 mailbox driver
in kernel. Commit ab6f775 "Removing dead OMAP_DSP"
has cleaned up all the dead code related to the only
possible user, including the creation of the mailbox
platform device.
Remove this stale driver so that the OMAP mailbox
driver can be simplified and streamlined better for
converting to mailbox framework.
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit 9188883fd66e9 (ARM: dts: Enable twl4030 off-idle configuration
for selected omaps) allowed n900 to cut off core voltages during
off-idle. This however caused a regression where twl regulator
vaux1 was not getting enabled for the LCD panel as we are not
requesting it for the panel.
Turns out quite a few devices on n900 are using vaux1, and we need
to either stop idling it, or add proper regulator_get calls for all
users. But until we have a proper solution implemented and tested,
let's just disable the twl off-idle configuration for now for n900.
Reported-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Fixes: 9188883fd66e9 (ARM: dts: Enable twl4030 off-idle configuration for selected omaps)
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DMA engine is enabled for all DTs that derive from zynq-7000.dtsi.
There is no need to override the 'status' property in board DTs.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Exynos initialisation code now relies on obtaining the PMU address via
DT, so add the exynos5260 PMU compatible string to DT match table.
Signed-off-by: Vikas Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Exynos initialization code now relies on obtaining the PMU address,
so add the new 5410 value to the list of compatible string matches.
This unbreaks booting on 5410 based boards.
Fixes: fce9e5bb2526 ("ARM: EXYNOS: Add support for mapping PMU base
address via DT")
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Exynos initialization code now relies on obtaining the PMU address,
so prepare a PMU node for Exynos5410.
Fixes: fce9e5bb2526 ("ARM: EXYNOS: Add support for mapping PMU base
address via DT")
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Pull ARM AES crypto fixes from Herbert Xu:
"This push fixes a regression on ARM where odd-sized blocks supplied to
AES may cause crashes"
* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
crypto: arm-aes - fix encryption of unaligned data
crypto: arm64-aes - fix encryption of unaligned data
Update the bindings for touchscreen size.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Update the bindings for touchscreen size.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
- BCM Mobile SMP support
- BRCM STB platform support
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Merge tag 'for-3.17/bcm-soc' of git://github.com/broadcom/mach-bcm into next/soc
Merge "ARM: mach-bcm: soc updates for 3.17" from Matt Porter:
- BCM Mobile SMP support
- BRCM STB platform support
* tag 'for-3.17/bcm-soc' of git://github.com/broadcom/mach-bcm:
MAINTAINERS: add entry for Broadcom ARM STB architecture
ARM: brcmstb: select GISB arbiter and interrupt drivers
ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs
ARM: configs: enable SMP in bcm_defconfig
ARM: add SMP support for Broadcom mobile SoCs
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- BCM Mobile SMP support
- BRCM STB platform support
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Merge tag 'for-3.17/bcm-dt' of git://github.com/broadcom/mach-bcm into next/dt
Merge "ARM: mach-bcm: dt updatees for 3.17" from Matt Porter:
- BCM Mobile SMP support
- BRCM STB platform support
* tag 'for-3.17/bcm-dt' of git://github.com/broadcom/mach-bcm:
ARM: brcmstb: dts: add a reference DTS for Broadcom 7445
ARM: brcmstb: gic: add compatible string for Broadcom Brahma15
ARM: brcmstb: add misc. DT bindings for brcmstb
ARM: brcmstb: add CPU binding for Broadcom Brahma15
ARM: dts: enable SMP support for bcm21664
ARM: dts: enable SMP support for bcm28155
devicetree: bindings: document Broadcom CPU enable method
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'v3.16-rc6' into next/dt
Update to Linux 3.16-rc6 as a dependency for the broadcom changes.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Armada XP
- New board, Lenovo ix4-300d NAS
- Add Lenovo to vendor-prefixes
- Dove
- Add LCD controllers
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Merge tag 'mvebu-dt-3.17-4' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu DT changes for v3.17 (round 4)" from Jason Cooper"
- Armada XP
- New board, Lenovo ix4-300d NAS
- Add Lenovo to vendor-prefixes
- Dove
- Add LCD controllers
* tag 'mvebu-dt-3.17-4' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: Add dts definition for Lenovo Iomega ix4-300d NAS
of: Add Lenovo Group Ltd. to the vendor-prefixes list.
ARM: dts: dove: add DT LCD controllers
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add a sample DTS which will allow bootup of a board populated
with the BCM7445 chip.
Signed-off-by: Marc Carino <marc.ceeeee@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Matt Porter <mporter@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
Fix the same alignment bug as in arm64 - we need to pass residue
unprocessed bytes as the last argument to blkcipher_walk_done.
Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Cc: stable@vger.kernel.org # 3.13+
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
The BCM7xxx series of Broadcom SoCs are used primarily in set-top boxes.
This patch adds machine support for the ARM-based Broadcom SoCs.
Signed-off-by: Marc Carino <marc.ceeeee@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Matt Porter <mporter@linaro.org>
Also explicitly set CONFIG_NR_CPUS to 2, limiting it to the most we
currently need.
Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
This patch adds SMP support for BCM281XX and BCM21664 family SoCs.
This feature is controlled with a distinct config option such that
an SMP-enabled multi-v7 binary can be configured to run these SoCs
in uniprocessor mode. Since this SMP functionality is used for
multiple Broadcom mobile chip families the config option is called
ARCH_BCM_MOBILE_SMP (for lack of a better name).
On SoCs of this type, the secondary core is not held in reset on
power-on. Instead it loops in a ROM-based holding pen. To release
it, one must write into a special register a jump address whose
low-order bits have been replaced with a secondary core's id, then
trigger an event with SEV. On receipt of an event, the ROM code
will examine the register's contents, and if the low-order bits
match its cpu id, it will clear them and write the value back to the
register just prior to jumping to the address specified.
The location of the special register is defined in the device tree
using a "secondary-boot-reg" property in a node whose "enable-method"
matches.
Derived from code originally provided by Ray Jui <rjui@broadcom.com>
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
Define nodes representing the two Cortex A9 CPUs in a bcm21644 SoC.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
