1121534 Commits

Author SHA1 Message Date
Martin Kepplinger
79d38f6b08 arm64: dts: imx8mq-librem5: fix mipi_csi description
Properties are not documented so lead to the following error:
'#address-cells', '#size-cells', 'interrupts' do not match any of the regexes: 'pinctrl-[0-9]+'

Fix this by removing unneeded properties.

Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:27 +08:00
Angus Ainslie
2d43092e32 arm64: dts: imx8mq-librem5: add usb-role-switch property to dwc3
In order to enable (PD and data) role switching on the Librem 5 phone,
add the usb-role-switch property to imx8mq's dwc3 node.

Signed-off-by: Angus Ainslie <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:27 +08:00
Angus Ainslie
6ba73ecff0 arm64: dts: imx8mq-librem5: add USB type-c properties for role switching
Add the connector properties to the USB type-c stanza to enable (PD)
role-switching on the Librem 5 phone.

Signed-off-by: Angus Ainslie <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:26 +08:00
Sebastian Krzyszkowiak
6effe295e1 arm64: dts: imx8mq-librem5: Add bq25895 as max17055's power supply
This allows the userspace to notice that there's not enough
current provided to charge the battery, and also fixes issues
with 0% SOC values being considered invalid.

Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:26 +08:00
Guido Günther
c504745d82 arm64: dts: imx8mq-librem5: add RGB pwm notification leds
Describe the RGB notification leds on the Librem 5 phone.
Use the common defines so we're sure to adhere to the common patterns,
use predefined led colors and functions so we're being warned in case
of deprecations.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:26 +08:00
Martin Kepplinger
f00df2bdb5 arm64: dts: imx8mq-librem5: describe the voice coil motor for focus control
Describe the focus motor that will be used for the rear camera - even
though the rear camera sensor driver is not yet in the mainline. The
focus motor is a separate device and can be controlled already.

Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:26 +08:00
Vladimir Oltean
68ad0821fc arm64: dts: ls1028a: enable swp5 and eno3 for all boards
In order for the LS1028A based boards to benefit from support for
multiple CPU ports, the second DSA master and its associated CPU port
must be enabled in the device trees. This does not change the default
CPU port from the current port 4.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:25 +08:00
Vladimir Oltean
d72e3b4e76 arm64: dts: ls1028a: mark enetc port 3 as a DSA master too
The LS1028A switch has 2 internal links to the ENETC controller.

With DSA's ability to support multiple CPU ports, we should mark both
ENETC ports as DSA masters.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:25 +08:00
Vladimir Oltean
b340ee0263 arm64: dts: ls1028a: move DSA CPU port property to the common SoC dtsi
Since the CPU port 4 of the switch is hardwired inside the SoC to go to
the enetc port 2, this shouldn't be something that the board files need
to set (but whether that CPU port is used or not is another discussion).

So move the DSA "ethernet" property to the common dtsi.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:25 +08:00
Richard Zhu
d506505000 arm64: dts: imx8mp-evk: Add PCIe support
Add PCIe support on i.MX8MP EVK board.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Tested-by: Marek Vasut <marex@denx.de>
Tested-by: Richard Leitner <richard.leitner@skidata.com>
Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:25 +08:00
Richard Zhu
9e65987b95 arm64: dts: imx8mp: Add iMX8MP PCIe support
Add i.MX8MP PCIe support.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Tested-by: Marek Vasut <marex@denx.de>
Tested-by: Richard Leitner <richard.leitner@skidata.com>
Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:24 +08:00
Marcel Ziswiler
7db9905d48 arm64: dts: imx8ulp: no executable source file permission
This fixes the following error:

arch/arm64/boot/dts/freescale/imx8ulp-pinfunc.h: error: do not set
 execute permissions for source files

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:24 +08:00
Marek Vasut
4dcb6c0fef arm64: dts: imx8mp: Add SNVS LPGPR
Add SNVS LPGPR bindings to MX8M Plus, the LPGPR is used to store
e.g. boot counter.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:24 +08:00
Martyn Welch
f703b6026d arm64: dts: imx8mp-msc-sm2s: Add device trees for MSC SM2S-IMX8PLUS SoM and carrier board
Add device trees for one of a number of MSC's (parent company, Avnet)
variants of the SM2S-IMX8PLUS system on module along with the compatible
SM2S-SK-AL-EP1 carrier board. As the name suggests, this family of SoMs use
the NXP i.MX8MP SoC and provide the SMARC module interface.

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:24 +08:00
Jagan Teki
4d50d2bf0e arm64: dts: imx8mm: Fix typo in license text for Engicam boards
Fix the Amarula Solutions typo mistake in license text for Engicam
i.MX8M boards add in below commits.

commit <60ac35268f85b> ("arm64: dts: imx8mm: Add Engicam i.Core MX8M
Mini SoM")
commit <aec8ad34f7f24> ("arm64: dts: imx8mp: Add Engicam i.Core MX8M
Plus EDIMM2.2 Starter Kit")
commit <eefe06b295087> ("arm64: dts: imx8mp: Add Engicam i.Core MX8M
Plus SoM")

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:23 +08:00
Peng Fan
b57f7d2141 arm64: dts: imx8-ss-dma: add IPG clock for i2c
i.MX8 LPI2C requires both PER and IPG clock, so add the missed IPG clk.

Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:23 +08:00
Frieder Schrempf
de9618e84f arm64: dts: Add support for Kontron SL/BL i.MX8MM OSM-S
This adds support for the Kontron Electronics SL i.MX8MM OSM-S SoM
and the matching baseboard BL i.MX8MM OSM-S.

The SoM hardware complies to the Open Standard Module (OSM) 1.0
specification, size S (https://sget.org/standards/osm).

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:23 +08:00
Frieder Schrempf
b63791966e arm64: dts: imx8mm-kontron: Add SPI NOR partition layout
This is the layout used by the bootloader. Add it to the kernel
devicetree to make the same layout available in Linux and have
the devicetrees synced.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:23 +08:00
Frieder Schrempf
9cb41873f8 arm64: dts: imx8mm-kontron: Use voltage rail names from schematic for PMIC regulator-names
Improve the naming of the regulators to contain the voltage rail
names from the schematic.

Suggested-by: Heiko Thiery <heiko.thiery@gmail.com>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:23 +08:00
Frieder Schrempf
3e44946da2 arm64: dts: imx8mm-kontron: Remove low DDRC operating point
For some reason there is a problem with finding a DDR configuration
that works on all operating points and all LPDDR4 types used on the
SoM. Therefore the bootloader currently doesn't configure the lowest
of the three operating points. Let's also skip this in the kernel
devicetree to make sure it isn't used.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:22 +08:00
Frieder Schrempf
eef2c0217e arm64: dts: imx8mm-kontron: Use the VSELECT signal to switch SD card IO voltage
It turns out that it is not necessary to declare the VSELECT signal as
GPIO and let the PMIC driver set it to a fixed high level. This switches
the voltage between 3.3V and 1.8V by setting the PMIC register for LDO5
accordingly.

Instead we can do it like other boards already do and simply mux the
VSELECT signal of the USDHC interface to the pin. This makes sure that
the correct voltage is selected by setting the PMIC's SD_VSEL input
to high or low accordingly.

Reported-by: Heiko Thiery <heiko.thiery@gmail.com>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Heiko Thiery <heiko.thiery@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:22 +08:00
Frieder Schrempf
587c1fed72 arm64: dts: imx8mm-kontron: Adjust compatibles, file names and model strings
The official naming includes "SL" (SoM-Line) or "BL" (Board-Line).
By updating we make sure, that we can maintain this more easily in
future and make sure that the proper devicetree can be selected for
the hardware.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:22 +08:00
Peng Fan
a763d0cf29 arm64: dts: imx8mp: add VPU blk ctrl node
Add i.MX8MP VPU blk ctrl node

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:22 +08:00
Peng Fan
df680992dd arm64: dts: imx8mp: add vpu pgc nodes
Add i.MX8MP PGC nodes for vpu, which are used to supply power for VPU.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:21 +08:00
Max Krummenacher
310dde60dd arm64: dts: imx8mp-verdin: add cpu-supply
Add the cpu-supply property to all CPU nodes to enable the cpufreq
driver.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:21 +08:00
Tim Harvey
8130fa7108 arm64: dts: imx8mm-venice-gw7903: add digital I/O ctl gpios
The GW7903-C revision introduced two additional GPIO's for controlling
the digital I/O direction. Add them.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:21 +08:00
Fabio Estevam
37bbb8b2f9 arm64: dts: imx8mm/n-venice-gw7902: Remove invalid property
The 'oscillator-frequency' property is not documented and it is
not used anywhere. Remove it.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:21 +08:00
Marek Vasut
dcc80ddbc3 arm64: dts: imx8mp: Add SoM compatible to i.MX8M Plus DHCOM PDK2
Add SoM compatible string into i.MX8MP DHCOM PDK2 compatible strings.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:20 +08:00
Marek Vasut
6007e21018 arm64: dts: imx8mp: Drop Atheros PHY header from i.MX8M Plus DHCOM PDK2
This PHY is not used on PDK2, the header was added due to copy-paste
error, drop it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:20 +08:00
Marek Vasut
ceefe3d5f1 arm64: dts: imx8mp: Add HW variant details to i.MX8M Plus DHCOM PDK2
Add information about which exact SoM variant is used on which PDK2 variant.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:20 +08:00
Marcel Ziswiler
7e819a2d92 arm64: dts: mnt-reform2: don't use multiple blank lines
Avoid the following checkpatch warning:

arch/arm/boot/dts/imx8mq-mnt-reform2.dts:213: check: Please don't use
 multiple blank lines

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:20 +08:00
Marcel Ziswiler
6fd44214f5 arm64: dts: imx8mp-verdin: don't use multiple blank lines
Avoid the following checkpatch warning:

arch/arm/boot/dts/imx8mp-verdin.dtsi:281: check: Please don't use
 multiple blank lines

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:19 +08:00
Marcel Ziswiler
7e431a93e8 arm64: dts: imx8mm-venice-gw72xx-0x: blank line at end of file
Avoid the following checkpatch warning:

Found possible blank line(s) at end of file
 'arch/arm/boot/dts/imx8mm-venice-gw72xx-0x.dts'

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:19 +08:00
Wei Fang
1170826e1a arm64: dts: imx8ulp-evk: Add the fec support
Enable the fec on i.MX8ULP EVK board.

Signed-off-by: Wei Fang <wei.fang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:19 +08:00
Wei Fang
683d7ffb7d arm64: dts: imx8ulp: Add the fec support
Add the fec support on i.MX8ULP platforms.

Signed-off-by: Wei Fang <wei.fang@nxp.com>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:19 +08:00
Peng Fan
31da63e132 arm64: dts: imx8mp: add interconnect for hsio blk ctrl
Add interconnect property for hsio blk ctrl

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:18 +08:00
Peng Fan
3175c70686 arm64: dts: imx8mp: add interconnects for media blk ctrl
Add interconnect property for media blk ctrl

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:18 +08:00
Shenwei Wang
64e61a940d dt-bindings: arm: imx: update fsl.yaml for imx8dxl
i.MX8DXL is a device targeting the automotive and industrial market
segments. The chip is designed to achieve both high performance and
low power consumption. It has a dual (2x) Cortex-A35 processor.

Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:25:50 +08:00
Shenwei Wang
c09cc6e528 dt-bindings: firmware: add missing resource IDs for imx8dxl
Add the missing resource IDs for imx8dxl.

Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:25:50 +08:00
Tim Harvey
6128972adb dt-bindings: arm: Add i.MX8M Mini Gateworks GW7904 board
Add DT compatible string for i.MX8M Mini based Gateworks GW7904 board.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:25:50 +08:00
Peng Fan
121494030c dt-bindings: soc: add i.MX93 mediamix blk ctrl
Add DT bindings for i.MX93 MEDIAMIX BLK CTRL.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:25:50 +08:00
Peng Fan
4fed4d20c5 dt-bindings: soc: add i.MX93 SRC
Add bindings for i.MX93 System Reset Controller(SRC). SRC supports
resets and power gating for mixes.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:25:49 +08:00
Peng Fan
7a8a447163 dt-bindings: mfd: syscon: Add i.MX93 blk ctrl system registers
Document i.MX93 BLK CTRL system registers.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:25:49 +08:00
Martyn Welch
b08047d63c dt-bindings: arm: fsl: Add MSC SM2S-IMX8PLUS SoM and SM2-MB-EP1 Carrier
Add DT compatible strings for a combination of the 14N0600E variant of
the Avnet (MSC branded) SM2S-IMX8PLUS SoM on it's own and in combination
with the SM2-MB-EP1 carrier board.

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:25:49 +08:00
Frieder Schrempf
25b1896467 dt-bindings: arm: fsl: Add Kontron BL i.MX8MM OSM-S board
Add bindings for the Kontron BL i.MX8MM OSM-S board.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:25:49 +08:00
Frieder Schrempf
9d820e6581 dt-bindings: arm: fsl: Rename compatibles for Kontron i.MX8MM SoM/board
This updates the bindings in order to use names for the boards that
follow the latest convention used by Kontron marketing.

By updating we make sure, that we can maintain this more easily in
future and make sure that the proper devicetree can be selected for
the hardware.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:25:49 +08:00
Peng Fan
c7ebd54158 dt-bindings: soc: imx: add i.MX8MP vpu blk ctrl
i.MX8MP VPU blk ctrl module has similar design as i.MX8MM, so reuse
the i.MX8MM VPU blk ctrl yaml file. And add description for the items.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:25:49 +08:00
Peng Fan
2345fc8dc2 dt-bindings: soc: imx: add interconnect property for i.MX8MM vpu blk ctrl
i.MX8MM VPU support NoC QoS setting, so add interconnect property
for i.MX8MM VPU blk ctrl

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:25:49 +08:00
Peng Fan
c1d9381ce4 dt-bindings: soc: imx: drop minItems for i.MX8MM vpu blk ctrl
minItems and maxItems are set as the same value. In such case minItems is
not necessary. So drop it.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:25:49 +08:00
Peng Fan
69e43d9e83 dt-bindings: power: imx8mp-power: add HDMI HDCP/HRV
Add i.MX8MP HDMI HDCP and HRV entries.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:25:48 +08:00