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Remove the unnecessary properties #address-cells and #size-cells
of node pinmux as there are no child-nodes with property reg.
Signed-off-by: Felix Brack <fb@ltec.ch>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add interrupt controller properties now that spmi-gpio is a proper
hierarchical IRQ chip. The interrupts property is no longer needed so
remove it.
This change was not tested on any hardware but the same change was
tested on qcom-pm8941.dtsi using a LG Nexus 5 (hammerhead) phone with
no issues.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add interrupt controller properties now that spmi-gpio is a proper
hierarchical IRQ chip. The interrupts property is no longer needed so
remove it. Code was tested on the LG Nexus 5 (hammerhead) phone.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The CSI controller found on the H3 (and H5) is a reduced version of the
one found on the A31. It only has 1 channel, instead of 4 channels for
time-multiplexed BT.656. Since the H3 is a reduced version, it cannot
"fallback" to a compatible that implements more features than it
supports.
Drop the A31 fallback compatible.
Fixes: f89120b6f554 ("ARM: dts: sun8i: Add the H3/H5 CSI controller")
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Commit 83a86fbb5b56 ("irqchip/gic: Loudly complain about the use of
IRQ_TYPE_NONE") started warning about incorrect dts usage for irqs.
ARM GIC only supports active-high interrupts for SPI (Shared Peripheral
Interrupts), and the Palmas PMIC by default is active-low.
Palmas PMIC allows changing the interrupt polarity using register
PALMAS_POLARITY_CTRL_INT_POLARITY, but configuring sys_nirq1 with
a pull-down and setting PALMAS_POLARITY_CTRL_INT_POLARITY made the
Palmas RTC interrupts stop working. This can be easily tested with
kernel tools rtctest.c.
Turns out the SoC inverts the sys_nirq pins for GIC as they do not go
through a peripheral device but go directly to the MPUSS wakeupgen.
I've verified this by muxing the interrupt line temporarily to gpio_wk16
instead of sys_nirq1. with a gpio, the interrupt works fine both
active-low and active-high with the SoC internal pull configured and
palmas polarity configured. But as sys_nirq1, the interrupt only works
when configured ACTIVE_LOW for palmas, and ACTIVE_HIGH for GIC.
Note that there was a similar issue earlier with tegra114 and palmas
interrupt polarity that got fixed by commit df545d1cd01a ("mfd: palmas:
Provide irq flags through DT/platform data"). However, the difference
between omap5 and tegra114 is that tegra inverts the palmas interrupt
twice, once when entering tegra PMC, and again when exiting tegra PMC
to GIC.
Let's fix the issue by adding a custom wakeupgen_irq_set_type() for
wakeupgen and invert any interrupts with wrong polarity. Let's also
warn about any non-sysnirq pins using wrong polarity. Note that we
also need to update the dts for the level as IRQ_TYPE_NONE never
has irq_set_type() called, and let's add some comments and use proper
pin nameing to avoid more confusion later on.
Cc: Belisko Marek <marek.belisko@gmail.com>
Cc: Dmitry Lifshitz <lifshitz@compulab.co.il>
Cc: "Dr. H. Nikolaus Schaller" <hns@goldelico.com>
Cc: Jon Hunter <jonathanh@nvidia.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Laxman Dewangan <ldewangan@nvidia.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Thierry Reding <treding@nvidia.com>
Cc: stable@vger.kernel.org # v4.17+
Reported-by: Belisko Marek <marek.belisko@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
cd pin on mmc1 is GPIO_ACTIVE_LOW not GPIO_ACTIVE_HIGH
Fixes: e63201f19438 ("mmc: omap_hsmmc: Delete platform data GPIO CD and WP")
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We're currently getting a warning with make dtbs:
arch/arm/boot/dts/omap3-gta04.dtsi:720.7-727.4: Warning (graph_port):
/ocp@68000000/dss@48050000/encoder@48050c0 0/port: graph node unit
address error, expected "0"
Tested-by: H. Nikolaus Schaller <hns@goldelico.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Wrong polarity of card detect GPIO pin leads to the system not
booting from external mmc, if the back cover of N900 is closed.
When the cover is open the system boots fine.
This wasn't noticed before, because of a bug, which was fixed
by commit e63201f19 (mmc: omap_hsmmc: Delete platform data GPIO
CD and WP).
Kernels up to 4.19 ignored the card detect GPIO from DT.
Fixes: e63201f19438 ("mmc: omap_hsmmc: Delete platform data GPIO CD and WP")
Signed-off-by: Arthur Demchenkov <spinal.by@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch enable HDMI output on sun8i-h3-nanopi-m1-plus.
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Add support for Renesas RZ/A2M evaluation board.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Basic support for the RZ/A2 (R7S9210) SoC.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The internal LVDS encoder now has DT bindings separate from the DU. Port
the device tree over to the new model.
Fixes: c6a27fa41fab ("drm: rcar-du: Convert LVDS encoder code to bridge driver")
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch is to add external trigger stamp fifo support
for 1588 timer.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
The disassembled DTB are almost the same besides an empty chosen
node being removed and nodes reordered, so it should not have
functional changes.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add the device tree bindings for USB OTG support. Driver was tested
using on a LG Nexus 5 (hammerhead) phone. This patch is based on work
from Jonathan Marek and from the other msm8974 devices.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the gpio-ranges property to pm8941_gpios so that the GPIO
pins are initialized by the GPIO framework and not pinctrl. This fixes
a circular dependency so GPIO hogging can be used on this board.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds WiFi support to the LG Nexus 5 (hammerhead) phone.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
[masneyb@onstation.org: Enabled wlan_regulator_pin and wlan_sleep_clk_pin]
Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
All the GSBI blocks are marking their GIC IRQ lines as
"IRQ_TYPE_NONE" but there is no such thing: all GIC IRQ
lines have a trigger type.
That yields the following warning from the GIC driver:
WARNING: CPU: 0 PID: 1 at ../drivers/irqchip/irq-gic.c:1016
gic_irq_domain_translate+0xdc/0xe4
(...)
Mark all of these IRQ_TYPE_LEVEL_HIGH as is common so this
warning goes away.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The GSBI module complains:
gsbi 16500000.gsbi: missing mode configuration
gsbi: probe of 16500000.gsbi failed with error -22
gsbi 16600000.gsbi: missing mode configuration
gsbi: probe of 16600000.gsbi failed with error -22
gsbi 19800000.gsbi: GSBI port protocol: 2 crci: 0
So we should mark these GSBIs as "disabled" in the SoC
file by default.
If boards appear that make use of them, we can simply
set status = "ok" in the DTS for them.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Vexpress motherboard MMCI requires dedicated interrupts for CMD and PIO,
which obviously should be expressed as a list. Current form uses tuple
and it works fine since interrupt-cells equal to 1.
Reported-by: Vladimir Murzin <vladimir.murzin@arm.com>
Reviewed-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
MPS2 UART requires dedicated interrupts for RX, TX and overflow, which
obviously should be expressed as a list. Current form uses tuple and
it has worked so far because NVIC has interrupt-cells equal to 1.
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The Inspur on5263m5 is an Intel Xeon OCP server that uses the ASPEED
AST2500 BMC.
Signed-off-by: John Wang <wangzqbj@inspur.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
[joel: Rework commit message]
Signed-off-by: Joel Stanley <joel@jms.id.au>
This adds nodes for the Video Engine and the associated reserved memory
for the A10. Up to 96 MiB of memory are dedicated to the CMA pool.
The VPU can only map the first 256 MiB of DRAM, so the reserved memory
pool has to be located in that area. Following Allwinner's decision in
downstream software, the last 96 MiB of the first 256 MiB of RAM are
reserved for this purpose.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This adds support for the C1 SRAM region (to be used with the SRAM
controller driver) for the A10 platform. The region is shared
between the Video Engine and the CPU.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Based on Rev. 1.00 of the R-Car H1 datasheet.
Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The timer interrupts specified in commit 3652e2741f42 ("ARM: dts:
da850: Add clocks") are wrong but since the current timer code
hard-codes them, the bug was never spotted.
This patch must go into stable since, once we introduce a proper
clocksource driver, devices with buggy device tree will stop booting.
Fixes: 3652e2741f42 ("ARM: dts: da850: Add clocks")
Cc: stable@vger.kernel.org
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Added ADC and other sensor devices present in the Facebook Tiogapass
machine.
Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
This adds the description of the four Keyboard Controller Style (KCS)
IPMI communication channels present in the ASPEED BMC. They are disabled
by default.
Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Allows the GPIO controller to be used as an interrupt parent.
of_irq_find_parent() skips interrupt controller nodes that do
not have the #interrupt-cells property.
Signed-off-by: Mark Walton <mark.walton@serialtek.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add Delta Electronics power supply DPS-650-AB.
Signed-off-by: Xiaoting Liu <xiaoting.liu@hxt-semitech.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Device tree binding of Memory Controller has been changed: GART has been
squashed into the MC, there are a new mandatory clock and #iommu-cells
properties, the compatible has been changed to 'tegra20-mc-gart'.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Add reset property for gpio, i2c, sdmmc, nand, qspi, spi, uart, and
watchdog on base socfpga and socfpga_arria10.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
This matches licensing used by other BCM53573 files and BCM5301X.
Signed-off-by: Dan Haab <dan.haab@luxul.com>
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
They are all device tree fixes which also worth being in stable:
- Reserve PSCI area on Armada 7K/8K preventing the kernel accessing
this area and crashing while doing it.
- Use correct PCIe reset signal on MACCHIATOBin (Armada 8040 based)
- Fix polarity of GPIO fan line D-Link DNS NASes(kikwood based)
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Merge tag 'mvebu-fixes-5.0-1' of git://git.infradead.org/linux-mvebu into fixes
mvebu fixes for 5.0
They are all device tree fixes which also worth being in stable:
- Reserve PSCI area on Armada 7K/8K preventing the kernel accessing
this area and crashing while doing it.
- Use correct PCIe reset signal on MACCHIATOBin (Armada 8040 based)
- Fix polarity of GPIO fan line D-Link DNS NASes(kikwood based)
* tag 'mvebu-fixes-5.0-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: kirkwood: Fix polarity of GPIO fan lines
arm64: dts: marvell: mcbin: fix PCIe reset signal
arm64: dts: marvell: armada-ap806: reserve PSCI area
Signed-off-by: Olof Johansson <olof@lixom.net>
i.MX6SX has same GPT type as i.MX6DL, in GPT driver, it uses
below TIMER_OF_DECLARE, so the backward compatible should be
"fsl,imx6dl-gpt", correct it.
TIMER_OF_DECLARE(imx6sx_timer, "fsl,imx6sx-gpt", imx6dl_timer_init_dt);
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
rv1108-elgin-r1 board is based on Rockchip RV1108 SoC.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the pin settings for the SPI pins so they can be used across
multiple boards.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Pass the 'dma-names' property to the SPI ports so that DMA can
be supported.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds the core display subsystem and vop nodes to rk3066.
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Define the required properties to enable I2C bus recovery supported by
the I2C subsystem.
This patch adds GPIO based I2C fault injector for Digi Connectcore SOM.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds definitions for ESDHC1 for Digi Connectore SOM & JSK.
This interface can be used to boot a module.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In fact, the RTC battery can only be connected outside the module,
so this patch moves the PMIC RTC property and its power from SOM dts
to JSK.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The interrupt controller is located at the physical address 0x10040000.
This patch changes the unit name of the controller to reflect the actual
address.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Most of the legacy "gpio-key,wakeup" and "enable-sdio-wakeup" boolean
properties are already replaced with "wakeup-source". However few
occurrences of old property has popped up again, probably from the
remnants in downstream trees. Almost all of those were remove couple
of years back.
Replace the legacy properties with the unified "wakeup-source" property
introduced in the commit 700a38b27eef ("Input: gpio_keys - switch to using
generic device properties") and commit 0dbcdc0622ea ("mmc: core: enable
support for the standard "wakeup-source" property")
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: NXP Linux Team <linux-imx@nxp.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
