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Add compatible for the Qualcomm SM4250/6115 APCS block to the Qualcomm
APCS binding.
Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Add documentation for the mt8192 gce.
Add gce header file defined the gce hardware event,
subsys number and constant for mt8192.
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Convert the TI TSC2004/TSC2005 DT bindings to YAML schema.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210620210708.100147-1-marex@denx.de
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Convert Samsung S5Pv210 Audio SubSystem clock controller bindings to DT
schema format using json-schema.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20210825134251.220098-2-krzysztof.kozlowski@canonical.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Convert Samsung Exynos Audio SubSystem clock controller bindings to DT
schema format using json-schema.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20210825134251.220098-1-krzysztof.kozlowski@canonical.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Document the bindings for Samsung Exynos external to SoC
(oscclk/XXTI/XusbXTI) clock provided on boards. The bindings are
already implemented in most of the Exynos clock drivers and DTS files.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210825134056.219884-3-krzysztof.kozlowski@canonical.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Convert Samsung Exynos5250 clock controller bindings to DT schema format
using json-schema.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20210825134056.219884-2-krzysztof.kozlowski@canonical.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
These properties allow configuring the SD/OE pin as described in the
datasheet.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
Link: https://lore.kernel.org/r/20210809223813.3766204-1-sean.anderson@seco.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
armpll clocks (available on Cygnus and Northstar Plus) are simple clocks
with no cells. Adjust binding props #clock-cells and clock-output-names
to handle them.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20210819052918.6753-1-zajec5@gmail.com
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add bindings and update documentation for clock rpmh driver on SM6350.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210820203243.230157-2-konrad.dybcio@somainline.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add device tree bindings for global clock controller on SM6115 and
SM4250 SoCs (pin and software compatible).
Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Link: https://lore.kernel.org/r/20210805161107.1194521-2-iskren.chernev@gmail.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
These patches fixup or update for rockchip i2s.
Changes in v3:
- Drop property 'rockchip,playback-only', 'rockchip,capture-only'.
Implement it by 'dma-names' of DT instead.
Changes in v2:
- split property trcm into single 'trcm-sync-tx-only' and
'trcm-sync-rx-only' suggested by Nicolas.
- split property trcm into single 'trcm-sync-tx-only' and
'trcm-sync-rx-only' suggested by Nicolas.
- drop change-id
Sugar Zhang (12):
ASoC: rockchip: i2s: Add support for set bclk ratio
ASoC: rockchip: i2s: Fixup clk div error
ASoC: rockchip: i2s: Improve dma data transfer efficiency
ASoC: rockchip: i2s: Fix regmap_ops hang
ASoC: rockchip: i2s: Fix concurrency between tx/rx
ASoC: rockchip: i2s: Reset the controller if soft reset failed
ASoC: dt-bindings: rockchip: Document reset property for i2s
ASoC: rockchip: i2s: Make playback/capture optional
ASoC: rockchip: i2s: Add compatible for more SoCs
ASoC: dt-bindings: rockchip: Add compatible strings for more SoCs
ASoC: rockchip: i2s: Add support for frame inversion
ASoC: dt-bindings: rockchip: i2s: Document property TRCM
Xiaotan Luo (1):
ASoC: rockchip: i2s: Fixup config for DAIFMT_DSP_A/B
Xing Zheng (1):
ASoC: rockchip: i2s: Add support for TRCM property
.../devicetree/bindings/sound/rockchip-i2s.yaml | 19 ++
sound/soc/rockchip/rockchip_i2s.c | 278 +++++++++++++++------
sound/soc/rockchip/rockchip_i2s.h | 10 +-
3 files changed, 224 insertions(+), 83 deletions(-)
--
2.7.4
There are two independent PCIe controllers in MT2712 and MT7622
platform. Each of them should contain an independent MSI domain.
In old dts architecture, MSI domain will be inherited from the root
bridge, and all of the devices will share the same MSI domain.
Hence that, the PCIe devices will not work properly if the irq number
which required is more than 32.
Split the PCIe node for MT2712 and MT7622 platform to comply with
the hardware design and fix MSI issue.
Link: https://lore.kernel.org/r/20210823032800.1660-2-chuanjia.liu@mediatek.com
Signed-off-by: Chuanjia Liu <chuanjia.liu@mediatek.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh+dt@kernel.org>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
There are 4 USB controllers on MT8195, the controllers (IP1~IP3,
exclude IP0) have a wrong default SOF/ITP interval which is
calculated from the frame counter clock 24Mhz by default, but
in fact, the frame counter clock is 48Mhz, so we should set
the accurate interval according to 48Mhz. Here add a new compatible
for MT8195, it's also supported in driver. But the first controller
(IP0) has no such issue, we prefer to use generic compatible,
e.g. mt8192's compatible.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1629189389-18779-2-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add support to disable specific usb2 host ports, it's useful when
a usb2 port is disabled on some platforms, but enabled on others for
the same SoC, another case is that the different package may support
different number of ports.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1629189389-18779-1-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
LiteETH is a small footprint and configurable Ethernet core for FPGA
based system on chips.
The hardware is parametrised by the size and number of the slots in it's
receive and send buffers. These are described as properties, with the
commonly used values set as the default.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add support for the SC7280 PDC Global and RZ/G2L USB/PHY reset
controllers, convert UniPhier glue device tree bindings to json-schema
and remove a leftover mention of ZTE zx2967 from Kconfig.
-----BEGIN PGP SIGNATURE-----
iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCYSOy1BcccC56YWJlbEBw
ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwKxPAQDYffSCcsiXIcZqwO8mpBspzw+R
rWTqcUeszNXJtPY0rwD/VFs7ESt2RijkKPJeP6VV7VvJkmzaRhFDtLB3MdyG1Qk=
=60wV
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEnXuMACgkQmmx57+YA
GNmunBAAv8XVaPA47KvXrsZ8Day6GI9j0EyQAYRvm7MkxD35lDBaooniPT/6bGNs
cfz6oolZPAzBtomErZUnqCADYGNKCta+Egsp836GCiX85M1sooic9gmidJW0oywQ
98d+BNjNJDF42RmBdLGqsE4UA/lB/1CgiRKtxkeTDgORQ+UKwwC2CZRwIhyr2ku9
/YsokNOLETSRf7UxERfZVQDoCpCY8rHn9Yk5Ldjf1a3wSNpEFcxY08TtK8wAxw1x
ZdnIVMbDX9P3Yowh5LayguXUwXX3ZSiJJKeIaqf4FGn+7e0ISyGX2LSRmsLEP1N/
gi0D3tS/C6GPiIIup92VAVgN60WwxPl7whwpon98ii7krY3LMr9BibqyL9QEkZF7
W64flH+HUqm6zzZC26d73Ub413Y5ndSBzcq8Q8nrcsj/lPfUv1xzQMKm0WVUymxU
7hIognQQCcVIdUk3Ht33wJ3MQOs4kgrQ/VdVqvNRlqE3JpWvd9X4L1D3eUXq9TWV
2nAQoDQC5LmdW8V1HiV4RKmWqQxdGBlIFXscwH8W4TmRLJXGHQbGi9M2sjch3ycr
RY0INAN3WpjhI/2saJxkGBeP1HmyQnmxNkfYZLbcFAvStXkgCBI5PIaO0flhevFK
K10jMPajFaojRZpkQTc9WOasyv8IGez0TrVIgA1WlJZE6BL+KoE=
=/KnZ
-----END PGP SIGNATURE-----
Merge tag 'reset-for-v5.15' of git://git.pengutronix.de/pza/linux into arm/drivers
Reset controller updates for v5.15
Add support for the SC7280 PDC Global and RZ/G2L USB/PHY reset
controllers, convert UniPhier glue device tree bindings to json-schema
and remove a leftover mention of ZTE zx2967 from Kconfig.
* tag 'reset-for-v5.15' of git://git.pengutronix.de/pza/linux:
reset: simple: remove ZTE details in Kconfig help
reset: renesas: Add RZ/G2L usbphy control driver
dt-bindings: reset: Document RZ/G2L USBPHY Control bindings
dt-bindings: reset: Convert UniPhier glue reset to json-schema
reset: qcom: Add PDC Global reset signals for WPSS
dt-bindings: reset: pdc: Add PDC Global bindings
dt-bindings: reset: aoss: Add AOSS reset controller binding
Link: https://lore.kernel.org/r/d42a75fc17ce718ef1b3fa4c5d3f5c7fb0bd2bc2.camel@pengutronix.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add support for handling the "linux,usable-memory-range" property in the
"/chosen" node to the FDT core code. This can co-exist safely with the
architecture-specific handling, until the latter has been removed.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/3bd69bada93ee59b7d23c38b3527fc1654e19343.1628670468.git.geert+renesas@glider.be
There are two methods to specify the location of the elf core headers:
using the "elfcorehdr=" kernel parameter, as handled by generic code in
kernel/crash_dump.c, or using the "linux,elfcorehdr" property under the
"/chosen" node in the Device Tree, as handled by architecture-specific
code in arch/arm64/mm/init.c.
Extend support for "linux,elfcorehdr" to all platforms supporting DT by
adding platform-agnostic handling for handling this property to the FDT
core code. This can co-exist safely with the architecture-specific
handling, until the latter has been removed.
This requires moving the call to of_scan_flat_dt() up, as the code
scanning the "/chosen" node now needs to be aware of the values of
"#address-cells" and "#size-cells".
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/c7e46e50aaf87ef49bdaa61358d25b122f32b7df.1628670468.git.geert+renesas@glider.be
Convert Samsung Exynos5422 SoC frequency and voltage scaling for
Dynamic Memory Controller to DT schema format using json-schema.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Lukasz Luba <lukasz.luba@arm.com>
Link: https://lore.kernel.org/r/20210820150353.161161-3-krzysztof.kozlowski@canonical.com
Signed-off-by: Rob Herring <robh@kernel.org>
Convert Samsung Exynos PPMU bindings to DT schema format using
json-schema. The example is quite different due to the nature of
dtschema examples parsing (no overriding via-label allowed).
New bindings contain copied description from previous bindings document,
therefore the license is set as GPL-2.0-only.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210820150353.161161-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Rob Herring <robh@kernel.org>
Convert Samsung Exynos NoC Probe bindings to DT schema format using
json-schema.
New bindings contain copied description from previous bindings document,
therefore the license is set as GPL-2.0-only.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210820150353.161161-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Rob Herring <robh@kernel.org>
This patch adds mt8195 audio afe document.
In order to support dynamic clock reparenting for ADDA and ETDM, PLL
and MUX clocks are requested even though they are not consumed by afe
directly.
Signed-off-by: Trevor Wu <trevor.wu@mediatek.com>
Link: https://lore.kernel.org/r/20210819084144.18483-8-trevor.wu@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
- Updates:
- Yaml conversion for Freescale imx8mq usb phy, TI AM654 SERDES phy,
Cadence torrent phy
- Updates for Amlogic Meson8b-usb2 phy, Samsung ufs phy
- New support:
- UFS phy for Qualcomm SM6115
- PCIe & USB/DP phy for Qualcomm sc8180x
- USB3 PHY support for Qualcomm IPQ6018
- Renesas USB2.0 PHY for RZ/G2L
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAmEkfloACgkQfBQHDyUj
g0dwzA/9G658xS6jZSLTQX3PzWSpxk+mmmC2IR7fkeB5ShVcrju83PGRD0OQnpkG
aRZRZy20iGbuKkrA/+oIliVgNEg44D32zqD5pojHAfmwMUNMUP6R4YmAFNreJ3Do
sHXLlS3p9hhRZONKbl6VMg6rS4yTre79ozTovNH6HGyTlSObezAaKVjUTCofuSaa
/AXL2/WCINJuCtZmm67/AHxgzptK/h7FSqJdg4JET7Dt6Y/HN/WrNCwcyOlloteQ
Dyc+C0cdBncRK6A1og83A3jw7oiOhl2/72paCyQFljvS4v0BW8B3Sth1hukE2rsE
RmtP4EYSLN8uWXdLsBjerS09WFfjZBlE8UeU46AhzffCWOwCwgRwdJFpqUjN/OCO
ain9X16yQY8SBHShjxQAQMt5OtTNJCb0qhfcDa+47D5b+NNVJxfMoUTjPzqg7dpB
JJZZzUgNyd2PxvLApzgkYj5yqv/PN1cXB6UYqOQN/YojmyZKtIB1U+9JvY01Qb8c
9Dj92M7rUGzgfmUqLl4WPWhUZu56e0W/VRlYftFNOgAbQ+SehyG9CREaEqJCNzzl
m9HAL4ZzpK8hGQbS5FHiWrplcX8IQWd+XF8vXhkVV+wiE+ryGiPB5LrkjKfvEmoa
AgfpzHBOSATpR2nuRL/bruMZeHFhj2kzFQpg0MXhyfZAr06Zq5U=
=3U1A
-----END PGP SIGNATURE-----
Merge tag 'phy-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-next
Vinod writes:
phy-for-5.15
- Updates:
- Yaml conversion for Freescale imx8mq usb phy, TI AM654 SERDES phy,
Cadence torrent phy
- Updates for Amlogic Meson8b-usb2 phy, Samsung ufs phy
- New support:
- UFS phy for Qualcomm SM6115
- PCIe & USB/DP phy for Qualcomm sc8180x
- USB3 PHY support for Qualcomm IPQ6018
- Renesas USB2.0 PHY for RZ/G2L
* tag 'phy-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (45 commits)
phy: qcom-qmp: Add support for SM6115 UFS phy
dt-bindings: phy: qcom,qmp: Add SM6115 UFS PHY bindings
phy: qmp: Provide unique clock names for DP clocks
phy: xilinx: zynqmp: skip PHY initialization and PLL lock for USB
phy: amlogic: meson8b-usb2: don't log an error on -EPROBE_DEFER
phy: amlogic: meson8b-usb2: Power off the PHY by putting it into reset mode
phy: phy-mtk-mipi-dsi: convert to devm_platform_ioremap_resource
phy: phy-mtk-mipi-dsi: remove dummy assignment of error number
phy: phy-mtk-hdmi: convert to devm_platform_ioremap_resource
phy: phy-mtk-ufs: use clock bulk to get clocks
phy: phy-mtk-tphy: remove error log of ioremap failure
phy: phy-mtk-tphy: print error log using child device
phy: phy-mtk-tphy: support type switch by pericfg
phy: phy-mtk-tphy: use clock bulk to get clocks
dt-bindings: phy: mediatek: tphy: support type switch by pericfg
phy: cadence-torrent: Check PIPE mode PHY status to be ready for operation
phy: cadence-torrent: Add debug information for PHY configuration
phy: cadence-torrent: Add separate functions for reusable code
phy: cadence-torrent: Add PHY configuration for DP with 100MHz ref clock
phy: cadence-torrent: Add PHY registers for DP in array format
...
Here are changes for the 5.15-rc1 merge window consisting of interconnect
core and driver updates.
Framework change:
- Add sanity check to detect if node is already added to provider.
Driver changes:
- RPMh drivers probe function consolidation
- Add driver for SC8180x platforms
- Add support for SC8180x OSM L3
- Use driver-specific naming in OSM L3
Signed-off-by: Georgi Djakov <djakov@kernel.org>
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJhI7tWAAoJEIDQzArG2BZjRWsQAIPaOLOBYGN7+aGLI0MO4aRx
u5P7i5QD/EJzSQ6z+MtNkzwgDV4+D6EzWxA2eyIPtHQsbpmift+qdWBVHPZcRFkD
sKV+B0NqJZSJe2W/RQ8u66yKaj931nbiSfxvCdpCB/Vamrfip8Bv7IO0hRsmFsSe
ji+UFg7SnCyou1C461visnl7+yGVwDB6e5BS7aXTYJ/3gl5lJ7IGooCwXs6w/EsS
FBBrvBqGU3ez61y6SYKrTQTI9MQEcioIUULXa0z8OGdAIqjfY3lWOIk6bhJTYFj8
snjowrGxMP+K7JzR9KgktB/eCivzYAdyMJKJrd6z1sPUS6vrAOLd0OZdHKVF87si
8s1ed6gUTkEK62Eg1OL1dIL3D6Ivf+UgGolz98hFqr2IxI/WRLGQ5oeuSHefiE8U
Rni13/vCNeM82mYIxk4e5VScM1PWPUdSPJl/40TgKELt7XvxKTPc0FO2u6mc+nRl
vsMJpnnVFszas0I40g0eIspWI4NYnukOFARP+2AXTpVuAylbf4YLkKSiwG1MN5TV
LdralsxcRLvp2ot9IliqmXjam+QJILK7GBpIqWe0jbo6ND4fGcd5ZN48pGmWxot6
mrNMXfq7cUbsG0aWrHIUZ8bISUEBlBBqqTSzKqVT4RtSZ8862lvQEHx5j72sQLj/
EYGoCI2F7tqFzs5P+qqm
=K/bk
-----END PGP SIGNATURE-----
Merge tag 'icc-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next
Georgi writes:
interconnect changes for 5.15
Here are changes for the 5.15-rc1 merge window consisting of interconnect
core and driver updates.
Framework change:
- Add sanity check to detect if node is already added to provider.
Driver changes:
- RPMh drivers probe function consolidation
- Add driver for SC8180x platforms
- Add support for SC8180x OSM L3
- Use driver-specific naming in OSM L3
Signed-off-by: Georgi Djakov <djakov@kernel.org>
* tag 'icc-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc:
interconnect: qcom: osm-l3: Use driver-specific naming
interconnect: qcom: osm-l3: Add sc8180x support
dt-bindings: interconnect: Add SC8180x to OSM L3 DT binding
interconnect: qcom: Add SC8180x providers
dt-bindings: interconnect: Add Qualcomm SC8180x DT bindings
interconnect: Sanity check that node isn't already on list
interconnect: qcom: icc-rpmh: Consolidate probe functions