78b3c83983
drm/amdgpu: use existing function amdgpu_bo_create_kernel
...
To simplify vce bo create
Signed-off-by: Leo Liu <leo.liu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-06-01 16:00:21 -04:00
0381631299
drm/amdgpu/vce4: enable ring & ib test for sriov
...
Now VCE block can work for SRIOV, enable ring & ib test.
Signed-off-by: Frank Min <Frank.Min@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-04-28 17:32:16 -04:00
a2f537e03b
drm/amdgpu/vce4: workaround VCE ring test slow issue
...
Add VCE ring test slow workaround for SRIOV.
Signed-off-by: Frank Min <Frank.Min@amd.com >
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-04-28 17:32:15 -04:00
a9f87f6452
drm/amdgpu: use a 64bit interval tree for VM management v2
...
This only makes a difference for 32-bit systems. The idea is to have a
fixed virtual address space size with 4-level page tables and to
minimize differences between 32 and 64-bit systems.
v2: Update commit message.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-04-04 13:40:32 -04:00
e76347b0c2
drm/amdgpu/vce4: Ignore vce ring/ib test temporarily
...
In order to not break SRIOV gfx development, will revert
this patch after vce proved working.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Monk Liu <Monk.Liu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:55:11 -04:00
d9af225942
drm/amdgpu: Don't touch PG&CG for SRIOV MM
...
For SRIOV, MM don't need to care about PG & CG, skip it.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Monk Liu <Monk.Liu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:55:08 -04:00
c1dc356a11
drm/amdgpu: add initial vce 4.0 support for vega10
...
Signed-off-by: Leo Liu <leo.liu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:47 -04:00
28ed5504ab
drm/amdgpu: when dpm disabled, also need to stop/start vce.
...
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-02-08 17:22:09 -05:00
50ddc75e32
drm/amd/amdgpu: remove the uncessary parameter for ib scheduler
...
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-01-27 12:20:37 -05:00
c4642a479f
drm/amd/amdgpu: add Polaris12 support (v3)
...
v2: agd: squash in various fixes
v3: agd: squash in:
drm/amdgpu: remove unnecessary smc sk firmware for polaris12
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-01-06 17:07:54 -05:00
220196b384
Merge tag 'topic/drm-misc-2016-10-27' of git://anongit.freedesktop.org/git/drm-intel into drm-next
...
Pull request already again to get the s/fence/dma_fence/ stuff in and
allow everyone to resync. Otherwise really just misc stuff all over, and a
new bridge driver.
* tag 'topic/drm-misc-2016-10-27' of git://anongit.freedesktop.org/git/drm-intel:
drm/bridge: fix platform_no_drv_owner.cocci warnings
drm/bridge: fix semicolon.cocci warnings
drm: Print some debug/error info during DP dual mode detect
drm: mark drm_of_component_match_add dummy inline
drm/bridge: add Silicon Image SiI8620 driver
dt-bindings: add Silicon Image SiI8620 bridge bindings
video: add header file for Mobile High-Definition Link (MHL) interface
drm: convert DT component matching to component_match_add_release()
dma-buf: Rename struct fence to dma_fence
dma-buf/fence: add an lockdep_assert_held()
drm/dp: Factor out helper to distinguish between branch and sink devices
drm/edid: Only print the bad edid when aborting
drm/msm: add missing header dependencies
drm/msm/adreno: move function declarations to header file
drm/i2c/tda998x: mark symbol static where possible
doc: add missing docbook parameter for fence-array
drm: RIP mode_config->rotation_property
drm/msm/mdp5: Advertize 180 degree rotation
drm/msm/mdp5: Use per-plane rotation property
2016-10-28 11:33:52 +10:00
9861470181
drm/amdgpu: add VCE VM session tracking
...
Fix the problems with killing VCE sessions in VM mode.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-and-Tested by: Leo Liu <leo.liu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-10-25 14:38:55 -04:00
45088efc85
drm/amdgpu: improve parse_cs handling a bit
...
This way we can use parse_cs and still keep VM mode enabled.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-and-Tested by: Leo Liu <leo.liu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-10-25 14:38:54 -04:00
e12f3d7a23
drm/amdgpu: move IB and frame size directly into the engine description
...
I should have suggested that on the initial patchset. This saves us a
few CPU cycles during CS and a bunch of loc.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-10-25 14:38:36 -04:00
03f48dd5d2
drm/amdgpu: add AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS flag v3
...
Add a flag noting that a BO must be created using linear VRAM
and set this flag on all in kernel users where appropriate.
Hopefully I haven't missed anything.
v2: add it in a few more places, fix CPU mapping.
v3: rename to VRAM_CONTIGUOUS, fix typo in CS code.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net >
Tested-by: Mike Lothian <mike@fireburn.co.uk >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-10-25 14:38:13 -04:00
f54d186700
dma-buf: Rename struct fence to dma_fence
...
I plan to usurp the short name of struct fence for a core kernel struct,
and so I need to rename the specialised fence/timeline for DMA
operations to make room.
A consensus was reached in
https://lists.freedesktop.org/archives/dri-devel/2016-July/113083.html
that making clear this fence applies to DMA operations was a good thing.
Since then the patch has grown a bit as usage increases, so hopefully it
remains a good thing!
(v2...: rebase, rerun spatch)
v3: Compile on msm, spotted a manual fixup that I broke.
v4: Try again for msm, sorry Daniel
coccinelle script:
@@
@@
- struct fence
+ struct dma_fence
@@
@@
- struct fence_ops
+ struct dma_fence_ops
@@
@@
- struct fence_cb
+ struct dma_fence_cb
@@
@@
- struct fence_array
+ struct dma_fence_array
@@
@@
- enum fence_flag_bits
+ enum dma_fence_flag_bits
@@
@@
(
- fence_init
+ dma_fence_init
|
- fence_release
+ dma_fence_release
|
- fence_free
+ dma_fence_free
|
- fence_get
+ dma_fence_get
|
- fence_get_rcu
+ dma_fence_get_rcu
|
- fence_put
+ dma_fence_put
|
- fence_signal
+ dma_fence_signal
|
- fence_signal_locked
+ dma_fence_signal_locked
|
- fence_default_wait
+ dma_fence_default_wait
|
- fence_add_callback
+ dma_fence_add_callback
|
- fence_remove_callback
+ dma_fence_remove_callback
|
- fence_enable_sw_signaling
+ dma_fence_enable_sw_signaling
|
- fence_is_signaled_locked
+ dma_fence_is_signaled_locked
|
- fence_is_signaled
+ dma_fence_is_signaled
|
- fence_is_later
+ dma_fence_is_later
|
- fence_later
+ dma_fence_later
|
- fence_wait_timeout
+ dma_fence_wait_timeout
|
- fence_wait_any_timeout
+ dma_fence_wait_any_timeout
|
- fence_wait
+ dma_fence_wait
|
- fence_context_alloc
+ dma_fence_context_alloc
|
- fence_array_create
+ dma_fence_array_create
|
- to_fence_array
+ to_dma_fence_array
|
- fence_is_array
+ dma_fence_is_array
|
- trace_fence_emit
+ trace_dma_fence_emit
|
- FENCE_TRACE
+ DMA_FENCE_TRACE
|
- FENCE_WARN
+ DMA_FENCE_WARN
|
- FENCE_ERR
+ DMA_FENCE_ERR
)
(
...
)
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk >
Acked-by: Sumit Semwal <sumit.semwal@linaro.org >
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch >
Link: http://patchwork.freedesktop.org/patch/msgid/20161025120045.28839-1-chris@chris-wilson.co.uk
2016-10-25 14:40:39 +02:00
5eeda8a481
drm/amdgpu/vce: add support for hw config packet (v2)
...
This is needed for proper VCE DPM on some APUs.
v2: fix the asic list
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-10-04 11:16:00 -04:00
4cd00d3755
drm/amdgpu/vce3: don't forget to tear down some rings
...
We can use .num_rings for that.
Fixes: 6f0359ff73
("vce3: add support for third vce ring")
Cc: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-09-27 13:00:52 -04:00
24c5fe56b2
drm/amdgpu/vce: take all rings into account for idle checks
...
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-09-27 13:00:50 -04:00
4f82778540
drm/amdgpu/vce: allow the clock table packet
...
This packet allows the user mode driver to specify
the required performance for specific use cases.
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-09-22 10:24:21 -04:00
a6f8d72867
drm/amdgpu/vce: add common ring callbacks for ib and dma frame size
...
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-09-16 15:53:01 -04:00
c855e25090
drm/amdgpu: bind GTT on demand
...
We don't really need the GTT table any more most of the time. So bind it
only on demand.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-09-14 15:10:30 -04:00
6f0359ff73
drm/amdgpu/vce3: add support for third vce ring
...
Not of much use at the moment (we don't really use
the second ring either), but may be useful later.
Reviewed-by: JimQu <Jim.Qu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-08-25 11:21:51 -04:00
7b4d3e297e
drm/amdgpu: use memcpy_toio for VCE firmware upload
...
Try to be clean here, even when it's a noop on x86.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-08-24 16:25:07 -04:00
99453a9e81
drm/amdgpu: add destroy session when generate VCE destroy msg.
...
Signed-off-by: David Mao <David.Mao@amd.com >
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-07-29 14:37:06 -04:00
bbec97aae6
drm/amdgpu: add a fence timeout for the IB tests v2
...
10ms should be enough for now.
v2: fix some typos in CIK code
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Chunming Zhou <david1.zhou@amd.com >
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-07-29 14:37:04 -04:00
ebff485e93
drm/amdgpu: use begin/end_use for VCE power/clock gating
...
This fixes turning power and clock on when it is actually needed.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-07-29 14:37:03 -04:00
22a77cf6d8
drm/amdgpu: cleanup hw reference handling in the IB tests
...
Reference should be taken when we make the assignment, not anywhere else.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-07-14 16:46:05 -04:00
e5223214b2
drm/amdgpu: allow multiple sessions in the same VCE IB
...
We always used updated firmware for amdgpu, so this actually should work fine.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-07-14 16:46:04 -04:00
182830a178
drm/amdgpu: cleanup VCE coding style
...
Fix 80 chars issues and remove some dead code as well.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-07-14 16:46:03 -04:00
d88bf583bd
drm/amdgpu: move VM fields into job
...
They are the same for all IBs.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-05-11 13:30:31 -04:00
f153d2867b
drm/amdgpu: move context switch handling into common code v2
...
It was a source of bugs to repeat that in each IP version.
v2: rename parameter
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-05-11 13:30:30 -04:00
edf600dac6
drm/amd: cleanup remaining spaces and tabs v2
...
This is the result of running the following commands:
find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/[ \t]\+$//' {} \;
find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/[ \t]\+$//' {} \;
find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/ \+\t/\t/' {} \;
find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/ \+\t/\t/' {} \;
v2: drop changes to DAL and internal headers
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-05-11 12:31:20 -04:00
c5637837ba
drm/amdgpu: keep vm in job instead of ib (v2)
...
ib.vm is a legacy way to get vm, after scheduler
implemented vm should be get from job, and all ibs
from one job share the same vm, no need to keep ib.vm
just move vm field to job.
this patch as well add job as paramter to ib_schedule
so it can get vm from job->vm.
v2: agd: sqaush in:
drm/amdgpu: check if ring emit_vm_flush exists in vm flush
No vm flush on engines that don't support VM.
bug:
https://bugs.freedesktop.org/show_bug.cgi?id=95195
Signed-off-by: Monk Liu <Monk.Liu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-05-11 12:31:16 -04:00
bafb86f5bc
Merge tag 'v4.6-rc7' into drm-next
...
Merge this back as we've built up a fair few conflicts, and I have
some newer trees to pull in.
2016-05-09 13:49:56 +10:00
2cc0c0b5cd
drm/amdgpu: change ELM/BAF to Polaris10/Polaris11
...
Adjust to preferred code names.
Signed-off-by: Flora Cui <Flora.Cui@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-05-04 20:27:57 -04:00
1b4eeea5f7
drm/amdgpu: add VCE support to ELM/BAF
...
Ellesmere and Baffin are VCE 3.4
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-05-04 20:25:29 -04:00
85cc88f02e
drm/amdgpu: when suspending, if uvd/vce was running. need to cancel delay work.
...
fix the issue that when resume back, uvd/vce
dpm was disabled and uvd/vce's performace
dropped.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
Cc: stable@vger.kernel.org
2016-04-14 00:26:30 -04:00
73cfa5f5ce
drm/amdgpu: move ib.fence to job.fence
...
Signed-off-by: Monk Liu <Monk.Liu@amd.com >
Reviewed-by: Chunming Zhou <david1.zhou@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-03-17 11:54:11 -04:00
336d1f5efe
drm/amdgpu: remove HW fence owner
...
Not used any more since we now always use the sheduler.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Chunming Zhou <david1.zhou@amd.com >
2016-03-08 11:01:47 -05:00
c594989cc0
drm/amdgpu: use separate scheduler entity for VCE submissions
...
This allows us to remove the kernel context and use a better
priority for the submissions.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
2016-02-12 15:41:01 -05:00
2bd9ccfa75
drm/amdgpu: use per VM entity for page table updates (v2)
...
Updates from different VMs can be processed independently.
v2: agd: rebase on upstream
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
2016-02-12 15:35:16 -05:00
e86f9ceee1
drm/amdgpu: move sync into job object
...
No need to keep that for every IB.
Signed-off-by: Christian König <christian.koenig@amd.com >
Acked-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-02-10 14:17:24 -05:00
9f2ade33e6
drm/amdgpu: send VCE IB tests directly to the ring again
...
We need the IB test for GPU resets as well and
the scheduler should be stoped then.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucer@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-02-10 14:17:24 -05:00
d71518b5aa
drm/amdgpu: cleanup in kernel job submission
...
Add a job_alloc_with_ib helper and proper job submission.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucer@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-02-10 14:17:22 -05:00
b07c60c065
drm/amdgpu: move ring from IBs into job
...
We can't submit to multiple rings at the same time anyway.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucer@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-02-10 14:17:20 -05:00
50838c8cc4
drm/amdgpu: add proper job alloc/free functions
...
And use them in the CS instead of allocating IBs and jobs separately.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucer@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-02-10 14:17:18 -05:00
7270f8391d
drm/amdgpu: add amdgpu_set_ib_value helper (v2)
...
And use it in UVD/VCE command patching.
v2: squash in Christian's fix
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-02-10 14:17:14 -05:00
a27de35caa
drm/amdgpu: remove the ring lock v2
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It's not needed any more because all access goes through the scheduler now.
v2: Update commit message.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Chunming Zhou <david1.zhou@amd.com >
Acked-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-02-10 14:16:58 -05:00
cadf97b196
drm/amdgpu: clean up non-scheduler code path (v2)
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Non-scheduler code is longer supported.
v2: agd: rebased on upstream
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com >
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com >
Reviewed-by: Monk Liu <monk.liu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2016-02-10 14:16:50 -05:00