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Add support for the TRNG firmware call introduced by Arm spec DEN0098.
* for-next/rng:
arm64: Add support for SMCCC TRNG entropy source
firmware: smccc: Introduce SMCCC TRNG framework
firmware: smccc: Add SMCCC TRNG function call IDs
Miscellaneous arm64 changes for 5.12.
* for-next/misc:
arm64: Make CPU_BIG_ENDIAN depend on ld.bfd or ld.lld 13.0.0+
arm64: vmlinux.ld.S: add assertion for tramp_pg_dir offset
arm64: vmlinux.ld.S: add assertion for reserved_pg_dir offset
arm64/ptdump:display the Linear Mapping start marker
arm64: ptrace: Fix missing return in hw breakpoint code
KVM: arm64: Move __hyp_set_vectors out of .hyp.text
arm64: Include linux/io.h in mm/mmap.c
arm64: cacheflush: Remove stale comment
arm64: mm: Remove unused header file
arm64/sparsemem: reduce SECTION_SIZE_BITS
arm64/mm: Add warning for outside range requests in vmemmap_populate()
arm64: Drop workaround for broken 'S' constraint with GCC 4.9
Significant steps along the road to leaving the MMU enabled during kexec
relocation.
* for-next/kexec:
arm64: hibernate: add __force attribute to gfp_t casting
arm64: kexec: arm64_relocate_new_kernel don't use x0 as temp
arm64: kexec: arm64_relocate_new_kernel clean-ups and optimizations
arm64: kexec: call kexec_image_info only once
arm64: kexec: move relocation function setup
arm64: trans_pgd: hibernate: idmap the single page that holds the copy page routines
arm64: mm: Always update TCR_EL1 from __cpu_set_tcr_t0sz()
arm64: trans_pgd: pass NULL instead of init_mm to *_populate functions
arm64: trans_pgd: pass allocator trans_pgd_create_copy
arm64: trans_pgd: make trans_pgd_map_page generic
arm64: hibernate: move page handling function to new trans_pgd.c
arm64: hibernate: variable pudp is used instead of pd4dp
arm64: kexec: make dtb_mem always enabled
Initialise prefaulted PTEs as 'old' for arm64 when hardware access-flag
updates are supported, which drastically improves vmscan performance.
* for-next/faultaround:
mm: filemap: Fix microblaze build failure with 'mmu_defconfig'
mm/nommu: Fix return type of filemap_map_pages()
mm: Mark anonymous struct field of 'struct vm_fault' as 'const'
mm: Use static initialisers for immutable fields of 'struct vm_fault'
mm: Avoid modifying vmf.address in __collapse_huge_page_swapin()
mm: Pass 'address' to map to do_set_pte() and drop FAULT_FLAG_PREFAULT
mm: Move immutable fields of 'struct vm_fault' into anonymous struct
arm64: mm: Implement arch_wants_old_prefaulted_pte()
mm: Allow architectures to request 'old' entries when prefaulting
mm: Cleanup faultaround and finish_fault() codepaths
Rework of the workaround for Cortex-A76 erratum 1463225 to fit in better
with the ongoing exception entry cleanups and changes to the detection
code for Cortex-A55 erratum 1024718 since it applies to all revisions of
the silicon.
* for-next/errata:
arm64: entry: consolidate Cortex-A76 erratum 1463225 workaround
arm64: Extend workaround for erratum 1024718 to all versions of Cortex-A55
Introduce a new macro to allow yielding the vector unit if preemption
is required. The initial users of this are being merged via the crypto
tree for 5.12.
* for-next/crypto:
arm64: assembler: add cond_yield macro
Support for overriding CPU ID register fields on the command-line, which
allows us to disable certain features which the kernel would otherwise
use unconditionally when detected.
* for-next/cpufeature: (22 commits)
arm64: cpufeatures: Allow disabling of Pointer Auth from the command-line
arm64: Defer enabling pointer authentication on boot core
arm64: cpufeatures: Allow disabling of BTI from the command-line
arm64: Move "nokaslr" over to the early cpufeature infrastructure
KVM: arm64: Document HVC_VHE_RESTART stub hypercall
arm64: Make kvm-arm.mode={nvhe, protected} an alias of id_aa64mmfr1.vh=0
arm64: Add an aliasing facility for the idreg override
arm64: Honor VHE being disabled from the command-line
arm64: Allow ID_AA64MMFR1_EL1.VH to be overridden from the command line
arm64: cpufeature: Add an early command-line cpufeature override facility
arm64: Extract early FDT mapping from kaslr_early_init()
arm64: cpufeature: Use IDreg override in __read_sysreg_by_encoding()
arm64: cpufeature: Add global feature override facility
arm64: Move SCTLR_EL1 initialisation to EL-agnostic code
arm64: Simplify init_el2_state to be non-VHE only
arm64: Move VHE-specific SPE setup to mutate_to_vhe()
arm64: Drop early setting of MDSCR_EL2.TPMS
arm64: Initialise as nVHE before switching to VHE
arm64: Provide an 'upgrade to VHE' stub hypercall
arm64: Turn the MMU-on sequence into a macro
...
- Don't allow tagged pointers to point to memslots
- Filter out ARMv8.1+ PMU events on v8.0 hardware
- Hide PMU registers from userspace when no PMU is configured
- More PMU cleanups
- Don't try to handle broken PSCI firmware
- More sys_reg() to reg_to_encoding() conversions
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Merge tag 'kvmarm-fixes-5.11-2' into kvmarm-master/next
KVM/arm64 fixes for 5.11, take #2
- Don't allow tagged pointers to point to memslots
- Filter out ARMv8.1+ PMU events on v8.0 hardware
- Hide PMU registers from userspace when no PMU is configured
- More PMU cleanups
- Don't try to handle broken PSCI firmware
- More sys_reg() to reg_to_encoding() conversions
Signed-off-by: Marc Zyngier <maz@kernel.org>
CM3 SRAM address space will be used for Flow Control configuration.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Acked-by: Marcin Wojtas <mw@semihalf.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Commit ccbef1674a15 ("Kbuild, lto: add ld-version and ld-ifversion
macros") introduced scripts/ld-version.sh for GCC LTO.
At that time, this script handled 5 version fields because GCC LTO
needed the downstream binutils. (https://lkml.org/lkml/2014/4/8/272)
The code snippet from the submitted patch was as follows:
# We need HJ Lu's Linux binutils because mainline binutils does not
# support mixing assembler and LTO code in the same ld -r object.
# XXX check if the gcc plugin ld is the expected one too
# XXX some Fedora binutils should also support it. How to check for that?
ifeq ($(call ld-ifversion,-ge,22710001,y),y)
...
However, GCC LTO was not merged into the mainline after all.
(https://lkml.org/lkml/2014/4/8/272)
So, the 4th and 5th fields were never used, and finally removed by
commit 0d61ed17dd30 ("ld-version: Drop the 4th and 5th version
components").
Since then, the last 4-digits returned by this script is always zeros.
Remove the meaningless last 4-digits. This makes the version format
consistent with GCC_VERSION, CLANG_VERSION, LLD_VERSION.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Acked-by: Will Deacon <will@kernel.org>
Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
include/asm-generic/qrwlock.h was trying to get arch_spin_is_locked via
asm-generic/qspinlock.h. However, this does not work because architectures
might be using queued rwlocks but not queued spinlocks (csky), or because they
might be defining their own queued_* macros before including asm/qspinlock.h.
To fix this, ensure that asm/spinlock.h always includes qrwlock.h after
defining arch_spin_is_locked (either directly for csky, or via
asm/qspinlock.h for other architectures). The only inclusion elsewhere
is in kernel/locking/qrwlock.c. That one is really unnecessary because
the file is only compiled in SMP configurations (config QUEUED_RWLOCKS
depends on SMP) and in that case linux/spinlock.h already includes
asm/qrwlock.h if needed, via asm/spinlock.h.
Reported-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Waiman Long <longman@redhat.com>
Fixes: 26128cb6c7e6 ("locking/rwlocks: Add contention detection for rwlocks")
Tested-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Ben Gardon <bgardon@google.com>
[Add arch/sparc and kernel/locking parts per discussion with Waiman. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Instead of yielding from the bowels of the asm routine if a reschedule
is needed, divide up the input into 4 KB chunks in the C glue. This
simplifies the code substantially, and avoids scheduling out the task
with the asm routine on the call stack, which is undesirable from a
CFI/instrumentation point of view.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
There is no need for elaborate yield handling in the bit-sliced NEON
implementation of AES, given that skciphers are naturally bounded by the
size of the chunks returned by the skcipher_walk API. So remove the
yield calls from the asm code.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Instead of calling into kernel_neon_end() and kernel_neon_begin() (and
potentially into schedule()) from the assembler code when running in
task mode and a reschedule is pending, perform only the preempt count
check in assembler, but simply return early in this case, and let the C
code deal with the consequences.
This reverts commit 6caf7adc5e458f77f550b6c6ca8effa152d61b4a.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Instead of calling into kernel_neon_end() and kernel_neon_begin() (and
potentially into schedule()) from the assembler code when running in
task mode and a reschedule is pending, perform only the preempt count
check in assembler, but simply return early in this case, and let the C
code deal with the consequences.
This reverts commit 7edc86cb1c18b4c274672232117586ea2bef1d9a.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Instead of calling into kernel_neon_end() and kernel_neon_begin() (and
potentially into schedule()) from the assembler code when running in
task mode and a reschedule is pending, perform only the preempt count
check in assembler, but simply return early in this case, and let the C
code deal with the consequences.
This reverts commit d82f37ab5e2426287013eba38b1212e8b71e5be3.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Instead of calling into kernel_neon_end() and kernel_neon_begin() (and
potentially into schedule()) from the assembler code when running in
task mode and a reschedule is pending, perform only the preempt count
check in assembler, but simply return early in this case, and let the C
code deal with the consequences.
This reverts commit 7df8d164753e6e6f229b72767595072bc6a71f48.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
More fixed indices for mmc nodes; removal of obsolete amba bus nodes;
nand-flash-controller nodes for px30 and rk3308; rk3399 pcie ranges fix;
board-level fixes for Helios64, NanoPi and Rock960; more sound support
for rock64 and rockpro64 and cleanups to make dt-bindings happier.
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Merge tag 'v5.12-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
New boards: Radxa Rock Pi E, NanoPi M4B
More fixed indices for mmc nodes; removal of obsolete amba bus nodes;
nand-flash-controller nodes for px30 and rk3308; rk3399 pcie ranges fix;
board-level fixes for Helios64, NanoPi and Rock960; more sound support
for rock64 and rockpro64 and cleanups to make dt-bindings happier.
* tag 'v5.12-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (24 commits)
arm64: dts: rockchip: more user friendly name of sound nodes
arm64: dts: rockchip: rename pinctrl nodename to gmac2io for nanopi-r2s board
arm64: dts: rockchip: assign a fixed index to mmc devices on rk3368 boards
arm64: dts: rockchip: assign a fixed index to mmc devices on rk3308 boards
arm64: dts: rockchip: assign a fixed index to mmc devices on px30 boards
arm64: dts: rockchip: cleanup cpu_thermal node of rk3399-rock960.dts
arm64: dts: rockchip: Remove bogus "amba" bus nodes
arm64: dts: rockchip: Light "sys" LED on NanoPi R2S
arm64: dts: rockchip: fix ranges property format for rk3399 pcie node
arm64: dts: rockchip: Rely on SoC external pull up on pmic-int-l on Helios64
arm64: dts: rockchip: Add NanoPi M4B board
arm64: dts: rockchip: Move ep-gpios property to nanopc-t4 from nanopi4
arm64: dts: rockchip: Add NFC node for PX30 SoC
arm64: dts: rockchip: Add NFC node for RK3308 SoC
arm64: dts: rockchip: rk3328: Add Radxa ROCK Pi E
dt-bindings: arm: rockchip: Add Radxa ROCK Pi E
arm64: dts: rockchip: rk3328: Add clock_in_out property to gmac2phy node
arm64: dts: rockchip: rename thermal subnodes for rk3399
arm64: dts: rockchip: rename thermal subnodes for rk3368
arm64: dts: rockchip: add SPDIF node for rk3399-rockpro64
...
Link: https://lore.kernel.org/r/12699743.uLZWGnKmhe@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- New board support: Beacon i.MX8M Nano development kit, i.MX8MM Nitrogen,
Gateworks i.MX 8M Mini Development Kits, phyBOARD-Pollux-i.MX8MP,
Librem5 Evergreen.
- Update imx8mm-beacon to drop unused clock-names reference, and add
more pinctrl states for USDHC1.
- Support soc unique ID read with NVMEM on i.MX8M SoCs.
- A series from Biwen Li to add interrupt line for RTC device on
Layerscape SoCs.
- A couple of patch sets to update imx8mq-librem5 support around
regulators, RTC, charger, display, etc.
- A series from Joakim Zhang to improve i.MX8M FEC device configuration.
- A series from Kuldeep Singh to enable flexcan support for LX2160A and
LS1028A.
- A series from Lucas Stach to update ZII devices around audio, USB, I2C
pin configuration and UCS1002 ALERT.
- A series from Michael Walle to update Layerscape device trees to use
constants in the clockgen phandle, add sl28 variant 1 and enable SATA.
- A few patches from Russell King to improve support for a couple of
LX2160A boards.
- A series from Shengjiu Wang to add more audio support for imx8mn-evk.
- Other small and random updates.
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Merge tag 'imx-dt64-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm64 device tree update for 5.12:
- New board support: Beacon i.MX8M Nano development kit, i.MX8MM Nitrogen,
Gateworks i.MX 8M Mini Development Kits, phyBOARD-Pollux-i.MX8MP,
Librem5 Evergreen.
- Update imx8mm-beacon to drop unused clock-names reference, and add
more pinctrl states for USDHC1.
- Support soc unique ID read with NVMEM on i.MX8M SoCs.
- A series from Biwen Li to add interrupt line for RTC device on
Layerscape SoCs.
- A couple of patch sets to update imx8mq-librem5 support around
regulators, RTC, charger, display, etc.
- A series from Joakim Zhang to improve i.MX8M FEC device configuration.
- A series from Kuldeep Singh to enable flexcan support for LX2160A and
LS1028A.
- A series from Lucas Stach to update ZII devices around audio, USB, I2C
pin configuration and UCS1002 ALERT.
- A series from Michael Walle to update Layerscape device trees to use
constants in the clockgen phandle, add sl28 variant 1 and enable SATA.
- A few patches from Russell King to improve support for a couple of
LX2160A boards.
- A series from Shengjiu Wang to add more audio support for imx8mn-evk.
- Other small and random updates.
* tag 'imx-dt64-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (71 commits)
arm64: dts: imx: Add i.mx8mm nitrogen basic dts support
arm64: dts: zii-rmb3: enable RMI4 reduced reporting
arm64: dts: zii-ultra: only trigger IRQ on falling edge ucs1002 ALERT pin
arm64: dts: zii-ultra: limit USB ports to USB2 speed
arm64: dts: zii-ultra: fix i2c pin configuration
arm64: dts: zii-ultra: add sound support
arm64: dts: ls1028a: Enable flexcan support for LS1028A-RDB/QDS
arm64: dts: ls1028a: Update flexcan properties
arm64: dts: lx2160a: Add flexcan support
arm64: dts: fsl-ls1012a-frdm: add spi-uart device
arm64: dts: fsl-ls1012a-rdb: add i2c devices
arm64: dts: imx8mn-beacon-som: Enable QSPI on SOM
arm64: dts: imx8mn: Add fspi node
arm64: dts: Add Librem5 Evergreen
arm64: dts: imx8mq-librem5: set regulators boot-on
arm64: dts: imx8mq-librem5: enable the LCD panel
arm64: dts: imx8mq-librem5: Add LCD_1V8 regulator
arm64: dts: imx8mq-librem5: Add usb-c chip as supplier for the charger
arm64: dts: imx8mq-librem5: Don't mark buck3 as always on
arm64: dts: imx8mq-librem5: Mark charger IRQ as High-Z
...
Link: https://lore.kernel.org/r/20210204120150.26186-5-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- A series from Oleksij Rempel to add i.MX6 based Plymovent, Protonic
and Kverneland boards.
- A series from Andreas Kemnade to improve UART support for ebook
readers.
- A series from Fabio Estevam to update imx6ul-14x14-evk device tree for
adding GPIO expander and camera support.
- A patch set from Lucas Stach to improve ZII RDU2 support, enabling
WDOG, tuning I2C drive-strength, RMI4 and UCS1002 ALERT.
- Other small and random updates on various boards.
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Merge tag 'imx-dt-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX device tree change for 5.12:
- A series from Oleksij Rempel to add i.MX6 based Plymovent, Protonic
and Kverneland boards.
- A series from Andreas Kemnade to improve UART support for ebook
readers.
- A series from Fabio Estevam to update imx6ul-14x14-evk device tree for
adding GPIO expander and camera support.
- A patch set from Lucas Stach to improve ZII RDU2 support, enabling
WDOG, tuning I2C drive-strength, RMI4 and UCS1002 ALERT.
- Other small and random updates on various boards.
* tag 'imx-dt-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (37 commits)
ARM: dts: imx6: RDU2: adjust audio devices nomenclature
ARM: dts: imx6: RDU2: only trigger IRQ on falling edge ucs1002 ALERT pin
ARM: dts: imx6: RDU2: enable RMI4 reduced reporting
ARM: dts: imx6: RDU2: reduce i2c drive-strength
ARM: dts: imx6: rdu2: enable WDOG1
ARM: dts: imx6-sr-som: increase at8035 PHY gigabit Tw parameter
ARM: dts: imx6: add wakeup support via magic packet
firmware: imx: select SOC_BUS to fix firmware build
arm64: dts: imx8mp: Correct the gpio ranges of gpio3
ARM: dts: imx6qdl-sr-som: fix some cubox-i platforms
ARM: dts: imx: e60k02: add second uart
ARM: dts: imx6sl-tolino-shine3: correct console uart pinmux
ARM: dts: imx6sl-tolino-shine2hd: add second uart
ARM: dts: imx6sl-tolino-shine2hd: correct console uart pinmux
ARM: imx: build suspend-imx6.S with arm instruction set
ARM: dts: imx7d-flex-concentrator: fix pcf2127 reset
ARM: dts: add Kverneland TGO board
ARM: dts: add Kverneland UT1, UT1Q and UT1P
ARM: dts: imx6ul-14x14-evk: Add camera support
ARM: dts: imx6ul-14x14-evk: Describe the KSZ8081 reset
...
Link: https://lore.kernel.org/r/20210204120150.26186-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This introduces initial support for the new SM8350 platform, aka
Snapdragon 888, and the MTP device for this.
It adds PCIe, audio, display, GPU, HDMI watchdog, LLCC and PMIC ADC
support to the SM8250 platform and RB5 in particular, as well as improve
the definition of CPUs, thermal zones and fixes a few smaller issues.
It introduces new Devicetree files for the Alcatel Idol 3, ASUS Zenfone
2 Laser and BQ Aquaris X5, based on the MSM8916 platform.
It contains an overhaul of the existing MSM8992 and MSM8994 platform
files and introduces RPM power domains and SMP2P nodes. It adds
touchscreen, additional regulators, microSD card support and adds the
Sony Mobile Ivy, Karin, Suzuran and Satsuki devices. It joins the common
parts of the Lumia 950 and 950XL and extend these with support for
sensors, NFC, bluetooth, audio, microSD and Type-C mux pins.
It introduces support for the OnePlus6 and 6t, adds the missing higher
frequences for the SDM850 laptops, adds CPU cluster idle support on
SM8150 and a few tweaks to the SC7180 platform.
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Merge tag 'qcom-arm64-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM64 DT updates for 5.12
This introduces initial support for the new SM8350 platform, aka
Snapdragon 888, and the MTP device for this.
It adds PCIe, audio, display, GPU, HDMI watchdog, LLCC and PMIC ADC
support to the SM8250 platform and RB5 in particular, as well as improve
the definition of CPUs, thermal zones and fixes a few smaller issues.
It introduces new Devicetree files for the Alcatel Idol 3, ASUS Zenfone
2 Laser and BQ Aquaris X5, based on the MSM8916 platform.
It contains an overhaul of the existing MSM8992 and MSM8994 platform
files and introduces RPM power domains and SMP2P nodes. It adds
touchscreen, additional regulators, microSD card support and adds the
Sony Mobile Ivy, Karin, Suzuran and Satsuki devices. It joins the common
parts of the Lumia 950 and 950XL and extend these with support for
sensors, NFC, bluetooth, audio, microSD and Type-C mux pins.
It introduces support for the OnePlus6 and 6t, adds the missing higher
frequences for the SDM850 laptops, adds CPU cluster idle support on
SM8150 and a few tweaks to the SC7180 platform.
* tag 'qcom-arm64-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (100 commits)
arm64: dts: qcom: msm8998: Use rpmpd definitions for opp table levels
arm64: dts: qcom: msm8996: Add missing device_type under pcie[01]
arm64: dts: qcom: sc7180: Add support for gpu fuse
arm64: dts: qcom: msm8998: Disable some components by default
arm64: dts: qcom: msm8998: Add capacity-dmips-mhz to CPU cores
arm64: dts: qcom: msm8998: Add I2C pinctrl and fix BLSP2_I2C naming
arm64: dts: qcom: msm8998: Add DMA to I2C hosts
arm64: dts: qcom: msm8998: Merge in msm8998-pins.dtsi to msm8998.dtsi
arm64: dts: msm8916: Fix reserved and rfsa nodes unit address
arm64: dts: qcom: msm8994-octagon: Add AD7147 and APDS9930 sensors
arm64: dts: qcom: msm8994-octagon: Add TAS2553 codec
arm64: dts: qcom: msm8994-octagon: Add sensors on blsp1_i2c5
arm64: dts: qcom: msm8994-octagon: Add NXP NFC node
arm64: dts: qcom: msm8994-octagon: Add FM Radio and DDR regulator nodes
arm64: dts: qcom: msm8994-octagon: Configure PON keys
arm64: dts: qcom: msm8994-octagon: Configure Lattice iCE40 FPGA
arm64: dts: qcom: msm8994-octagon: Add uSD card and disable HS400 on eMMC
arm64: dts: qcom: msm8994-octagon: Configure HD3SS460 Type-C mux pins
arm64: dts: qcom: msm8994-octagon: Add QCA6174 bluetooth
arm64: dts: qcom: msm8994-octagon: Configure regulators
...
Link: https://lore.kernel.org/r/20210204052043.388621-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Similar to commit 28187dc8ebd9 ("ARM: 9025/1: Kconfig: CPU_BIG_ENDIAN
depends on !LD_IS_LLD"), ld.lld prior to 13.0.0 does not properly
support aarch64 big endian, leading to the following build error when
CONFIG_CPU_BIG_ENDIAN is selected:
ld.lld: error: unknown emulation: aarch64linuxb
This has been resolved in LLVM 13. To avoid errors like this, only allow
CONFIG_CPU_BIG_ENDIAN to be selected if using ld.bfd or ld.lld 13.0.0
and newer.
While we are here, the indentation of this symbol used spaces since its
introduction in commit a872013d6d03 ("arm64: kconfig: allow
CPU_BIG_ENDIAN to be selected"). Change it to tabs to be consistent with
kernel coding style.
Link: https://github.com/ClangBuiltLinux/linux/issues/380
Link: https://github.com/ClangBuiltLinux/linux/issues/1288
Link: 7605a9a009
Link: eea34aae2e
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Link: https://lore.kernel.org/r/20210209005719.803608-1-nathan@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
In order to be able to disable Pointer Authentication at runtime,
whether it is for testing purposes, or to work around HW issues,
let's add support for overriding the ID_AA64ISAR1_EL1.{GPI,GPA,API,APA}
fields.
This is further mapped on the arm64.nopauth command-line alias.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: David Brazdil <dbrazdil@google.com>
Tested-by: Srinivas Ramana <sramana@codeaurora.org>
Link: https://lore.kernel.org/r/20210208095732.3267263-23-maz@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Defer enabling pointer authentication on boot core until
after its required to be enabled by cpufeature framework.
This will help in controlling the feature dynamically
with a boot parameter.
Signed-off-by: Ajay Patil <pajay@qti.qualcomm.com>
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/1610152163-16554-2-git-send-email-sramana@codeaurora.org
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: David Brazdil <dbrazdil@google.com>
Link: https://lore.kernel.org/r/20210208095732.3267263-22-maz@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
In order to be able to disable BTI at runtime, whether it is
for testing purposes, or to work around HW issues, let's add
support for overriding the ID_AA64PFR1_EL1.BTI field.
This is further mapped on the arm64.nobti command-line alias.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: David Brazdil <dbrazdil@google.com>
Tested-by: Srinivas Ramana <sramana@codeaurora.org>
Link: https://lore.kernel.org/r/20210208095732.3267263-21-maz@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Given that the early cpufeature infrastructure has borrowed quite
a lot of code from the kaslr implementation, let's reimplement
the matching of the "nokaslr" option with it.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: David Brazdil <dbrazdil@google.com>
Link: https://lore.kernel.org/r/20210208095732.3267263-20-maz@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Admitedly, passing id_aa64mmfr1.vh=0 on the command-line isn't
that easy to understand, and it is likely that users would much
prefer write "kvm-arm.mode=nvhe", or "...=protected".
So here you go. This has the added advantage that we can now
always honor the "kvm-arm.mode=protected" option, even when
booting on a VHE system.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: David Brazdil <dbrazdil@google.com>
Link: https://lore.kernel.org/r/20210208095732.3267263-18-maz@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
In order to map the override of idregs to options that a user
can easily understand, let's introduce yet another option
array, which maps an option to the corresponding idreg options.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: David Brazdil <dbrazdil@google.com>
Link: https://lore.kernel.org/r/20210208095732.3267263-17-maz@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Finally we can check whether VHE is disabled on the command line,
and not enable it if that's the user's wish.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: David Brazdil <dbrazdil@google.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20210208095732.3267263-16-maz@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
As we want to be able to disable VHE at runtime, let's match
"id_aa64mmfr1.vh=" from the command line as an override.
This doesn't have much effect yet as our boot code doesn't look
at the cpufeature, but only at the HW registers.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: David Brazdil <dbrazdil@google.com>
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20210208095732.3267263-15-maz@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
In order to be able to override CPU features at boot time,
let's add a command line parser that matches options of the
form "cpureg.feature=value", and store the corresponding
value into the override val/mask pair.
No features are currently defined, so no expected change in
functionality.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: David Brazdil <dbrazdil@google.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20210208095732.3267263-14-maz@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
As we want to parse more options very early in the kernel lifetime,
let's always map the FDT early. This is achieved by moving that
code out of kaslr_early_init().
No functional change expected.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: David Brazdil <dbrazdil@google.com>
Link: https://lore.kernel.org/r/20210208095732.3267263-13-maz@kernel.org
[will: Ensue KASAN is enabled before running C code]
Signed-off-by: Will Deacon <will@kernel.org>
__read_sysreg_by_encoding() is used by a bunch of cpufeature helpers,
which should take the feature override into account. Let's do that.
For a good measure (and because we are likely to need to further
down the line), make this helper available to the rest of the
non-modular kernel.
Code that needs to know the *real* features of a CPU can still
use read_sysreg_s(), and find the bare, ugly truth.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Acked-by: David Brazdil <dbrazdil@google.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20210208095732.3267263-12-maz@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Add a facility to globally override a feature, no matter what
the HW says. Yes, this sounds dangerous, but we do respect the
"safe" value for a given feature. This doesn't mean the user
doesn't need to know what they are doing.
Nothing uses this yet, so we are pretty safe. For now.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Acked-by: David Brazdil <dbrazdil@google.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20210208095732.3267263-11-maz@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
We can now move the initial SCTLR_EL1 setup to be used for both
EL1 and EL2 setup.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: David Brazdil <dbrazdil@google.com>
Link: https://lore.kernel.org/r/20210208095732.3267263-10-maz@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
